2 $Id: fore200e.c,v 1.5 2000/04/14 10:10:34 davem Exp $
4 A FORE Systems 200E-series driver for ATM on Linux.
5 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2003.
7 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de).
9 This driver simultaneously supports PCA-200E and SBA-200E adapters
10 on i386, alpha (untested), powerpc, sparc and sparc64 architectures.
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 #include <linux/config.h>
29 #include <linux/kernel.h>
30 #include <linux/slab.h>
31 #include <linux/init.h>
32 #include <linux/capability.h>
33 #include <linux/sched.h>
34 #include <linux/interrupt.h>
35 #include <linux/bitops.h>
36 #include <linux/pci.h>
37 #include <linux/module.h>
38 #include <linux/atmdev.h>
39 #include <linux/sonet.h>
40 #include <linux/atm_suni.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/delay.h>
44 #include <asm/string.h>
48 #include <asm/byteorder.h>
49 #include <asm/uaccess.h>
50 #include <asm/atomic.h>
52 #ifdef CONFIG_ATM_FORE200E_SBA
53 #include <asm/idprom.h>
55 #include <asm/openprom.h>
56 #include <asm/oplib.h>
57 #include <asm/pgtable.h>
60 #if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet */
61 #define FORE200E_USE_TASKLET
64 #if 0 /* enable the debugging code of the buffer supply queues */
65 #define FORE200E_BSQ_DEBUG
68 #if 1 /* ensure correct handling of 52-byte AAL0 SDUs expected by atmdump-like apps */
69 #define FORE200E_52BYTE_AAL0_SDU
75 #define FORE200E_VERSION "0.3e"
77 #define FORE200E "fore200e: "
79 #if 0 /* override .config */
80 #define CONFIG_ATM_FORE200E_DEBUG 1
82 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
83 #define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
84 printk(FORE200E format, ##args); } while (0)
86 #define DPRINTK(level, format, args...) do {} while (0)
90 #define FORE200E_ALIGN(addr, alignment) \
91 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
93 #define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
95 #define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
97 #define FORE200E_NEXT_ENTRY(index, modulo) (index = ++(index) % (modulo))
100 #define ASSERT(expr) if (!(expr)) { \
101 printk(FORE200E "assertion failed! %s[%d]: %s\n", \
102 __FUNCTION__, __LINE__, #expr); \
103 panic(FORE200E "%s", __FUNCTION__); \
106 #define ASSERT(expr) do {} while (0)
110 static const struct atmdev_ops fore200e_ops;
111 static const struct fore200e_bus fore200e_bus[];
113 static LIST_HEAD(fore200e_boards);
116 MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
117 MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
118 MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
121 static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
122 { BUFFER_S1_NBR, BUFFER_L1_NBR },
123 { BUFFER_S2_NBR, BUFFER_L2_NBR }
126 static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
127 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
128 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
132 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
133 static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
137 #if 0 /* currently unused */
139 fore200e_fore2atm_aal(enum fore200e_aal aal)
142 case FORE200E_AAL0: return ATM_AAL0;
143 case FORE200E_AAL34: return ATM_AAL34;
144 case FORE200E_AAL5: return ATM_AAL5;
152 static enum fore200e_aal
153 fore200e_atm2fore_aal(int aal)
156 case ATM_AAL0: return FORE200E_AAL0;
157 case ATM_AAL34: return FORE200E_AAL34;
160 case ATM_AAL5: return FORE200E_AAL5;
168 fore200e_irq_itoa(int irq)
170 #if defined(__sparc_v9__)
171 return __irq_itoa(irq);
174 sprintf(str, "%d", irq);
181 fore200e_kmalloc(int size, int flags)
183 void* chunk = kmalloc(size, flags);
186 memset(chunk, 0x00, size);
188 printk(FORE200E "kmalloc() failed, requested size = %d, flags = 0x%x\n", size, flags);
195 fore200e_kfree(void* chunk)
201 /* allocate and align a chunk of memory intended to hold the data behing exchanged
202 between the driver and the adapter (using streaming DVMA) */
205 fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
207 unsigned long offset = 0;
209 if (alignment <= sizeof(int))
212 chunk->alloc_size = size + alignment;
213 chunk->align_size = size;
214 chunk->direction = direction;
216 chunk->alloc_addr = fore200e_kmalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA);
217 if (chunk->alloc_addr == NULL)
221 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
223 chunk->align_addr = chunk->alloc_addr + offset;
225 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction);
231 /* free a chunk of memory */
234 fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
236 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction);
238 fore200e_kfree(chunk->alloc_addr);
243 fore200e_spin(int msecs)
245 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
246 while (time_before(jiffies, timeout));
251 fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
253 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
258 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
261 } while (time_before(jiffies, timeout));
265 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
275 fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs)
277 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
281 if ((ok = (fore200e->bus->read(addr) == val)))
284 } while (time_before(jiffies, timeout));
288 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
289 fore200e->bus->read(addr), val);
298 fore200e_free_rx_buf(struct fore200e* fore200e)
300 int scheme, magn, nbr;
301 struct buffer* buffer;
303 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
304 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
306 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
308 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
310 struct chunk* data = &buffer[ nbr ].data;
312 if (data->alloc_addr != NULL)
313 fore200e_chunk_free(fore200e, data);
322 fore200e_uninit_bs_queue(struct fore200e* fore200e)
326 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
327 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
329 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
330 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
332 if (status->alloc_addr)
333 fore200e->bus->dma_chunk_free(fore200e, status);
335 if (rbd_block->alloc_addr)
336 fore200e->bus->dma_chunk_free(fore200e, rbd_block);
343 fore200e_reset(struct fore200e* fore200e, int diag)
347 fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET;
349 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
351 fore200e->bus->reset(fore200e);
354 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
357 printk(FORE200E "device %s self-test failed\n", fore200e->name);
361 printk(FORE200E "device %s self-test passed\n", fore200e->name);
363 fore200e->state = FORE200E_STATE_RESET;
371 fore200e_shutdown(struct fore200e* fore200e)
373 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
374 fore200e->name, fore200e->phys_base,
375 fore200e_irq_itoa(fore200e->irq));
377 if (fore200e->state > FORE200E_STATE_RESET) {
378 /* first, reset the board to prevent further interrupts or data transfers */
379 fore200e_reset(fore200e, 0);
382 /* then, release all allocated resources */
383 switch(fore200e->state) {
385 case FORE200E_STATE_COMPLETE:
386 kfree(fore200e->stats);
388 case FORE200E_STATE_IRQ:
389 free_irq(fore200e->irq, fore200e->atm_dev);
391 case FORE200E_STATE_ALLOC_BUF:
392 fore200e_free_rx_buf(fore200e);
394 case FORE200E_STATE_INIT_BSQ:
395 fore200e_uninit_bs_queue(fore200e);
397 case FORE200E_STATE_INIT_RXQ:
398 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status);
399 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
401 case FORE200E_STATE_INIT_TXQ:
402 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status);
403 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
405 case FORE200E_STATE_INIT_CMDQ:
406 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
408 case FORE200E_STATE_INITIALIZE:
409 /* nothing to do for that state */
411 case FORE200E_STATE_START_FW:
412 /* nothing to do for that state */
414 case FORE200E_STATE_LOAD_FW:
415 /* nothing to do for that state */
417 case FORE200E_STATE_RESET:
418 /* nothing to do for that state */
420 case FORE200E_STATE_MAP:
421 fore200e->bus->unmap(fore200e);
423 case FORE200E_STATE_CONFIGURE:
424 /* nothing to do for that state */
426 case FORE200E_STATE_REGISTER:
427 /* XXX shouldn't we *start* by deregistering the device? */
428 atm_dev_deregister(fore200e->atm_dev);
430 case FORE200E_STATE_BLANK:
431 /* nothing to do for that state */
437 #ifdef CONFIG_ATM_FORE200E_PCA
439 static u32 fore200e_pca_read(volatile u32 __iomem *addr)
441 /* on big-endian hosts, the board is configured to convert
442 the endianess of slave RAM accesses */
443 return le32_to_cpu(readl(addr));
447 static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr)
449 /* on big-endian hosts, the board is configured to convert
450 the endianess of slave RAM accesses */
451 writel(cpu_to_le32(val), addr);
456 fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
458 u32 dma_addr = pci_map_single((struct pci_dev*)fore200e->bus_dev, virt_addr, size, direction);
460 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n",
461 virt_addr, size, direction, dma_addr);
468 fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
470 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n",
471 dma_addr, size, direction);
473 pci_unmap_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
478 fore200e_pca_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
480 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
482 pci_dma_sync_single_for_cpu((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
486 fore200e_pca_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
488 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
490 pci_dma_sync_single_for_device((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
494 /* allocate a DMA consistent chunk of memory intended to act as a communication mechanism
495 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
498 fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
499 int size, int nbr, int alignment)
501 /* returned chunks are page-aligned */
502 chunk->alloc_size = size * nbr;
503 chunk->alloc_addr = pci_alloc_consistent((struct pci_dev*)fore200e->bus_dev,
507 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
510 chunk->align_addr = chunk->alloc_addr;
516 /* free a DMA consistent chunk of memory */
519 fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
521 pci_free_consistent((struct pci_dev*)fore200e->bus_dev,
529 fore200e_pca_irq_check(struct fore200e* fore200e)
531 /* this is a 1 bit register */
532 int irq_posted = readl(fore200e->regs.pca.psr);
534 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2)
535 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
536 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number);
545 fore200e_pca_irq_ack(struct fore200e* fore200e)
547 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
552 fore200e_pca_reset(struct fore200e* fore200e)
554 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
556 writel(0, fore200e->regs.pca.hcr);
561 fore200e_pca_map(struct fore200e* fore200e)
563 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
565 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
567 if (fore200e->virt_base == NULL) {
568 printk(FORE200E "can't map device %s\n", fore200e->name);
572 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
574 /* gain access to the PCA specific registers */
575 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET;
576 fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET;
577 fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET;
579 fore200e->state = FORE200E_STATE_MAP;
585 fore200e_pca_unmap(struct fore200e* fore200e)
587 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
589 if (fore200e->virt_base != NULL)
590 iounmap(fore200e->virt_base);
595 fore200e_pca_configure(struct fore200e* fore200e)
597 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
598 u8 master_ctrl, latency;
600 DPRINTK(2, "device %s being configured\n", fore200e->name);
602 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
603 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
607 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
609 master_ctrl = master_ctrl
610 #if defined(__BIG_ENDIAN)
611 /* request the PCA board to convert the endianess of slave RAM accesses */
612 | PCA200E_CTRL_CONVERT_ENDIAN
615 | PCA200E_CTRL_DIS_CACHE_RD
616 | PCA200E_CTRL_DIS_WRT_INVAL
617 | PCA200E_CTRL_ENA_CONT_REQ_MODE
618 | PCA200E_CTRL_2_CACHE_WRT_INVAL
620 | PCA200E_CTRL_LARGE_PCI_BURSTS;
622 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
624 /* raise latency from 32 (default) to 192, as this seems to prevent NIC
625 lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition.
626 this may impact the performances of other PCI devices on the same bus, though */
628 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
630 fore200e->state = FORE200E_STATE_CONFIGURE;
636 fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
638 struct host_cmdq* cmdq = &fore200e->host_cmdq;
639 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
640 struct prom_opcode opcode;
644 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
646 opcode.opcode = OPCODE_GET_PROM;
649 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), DMA_FROM_DEVICE);
651 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
653 *entry->status = STATUS_PENDING;
655 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode);
657 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
659 *entry->status = STATUS_FREE;
661 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE);
664 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
668 #if defined(__BIG_ENDIAN)
670 #define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
672 /* MAC address is stored as little-endian */
673 swap_here(&prom->mac_addr[0]);
674 swap_here(&prom->mac_addr[4]);
682 fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
684 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
686 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
687 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
690 #endif /* CONFIG_ATM_FORE200E_PCA */
693 #ifdef CONFIG_ATM_FORE200E_SBA
696 fore200e_sba_read(volatile u32 __iomem *addr)
698 return sbus_readl(addr);
703 fore200e_sba_write(u32 val, volatile u32 __iomem *addr)
705 sbus_writel(val, addr);
710 fore200e_sba_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
712 u32 dma_addr = sbus_map_single((struct sbus_dev*)fore200e->bus_dev, virt_addr, size, direction);
714 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n",
715 virt_addr, size, direction, dma_addr);
722 fore200e_sba_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
724 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n",
725 dma_addr, size, direction);
727 sbus_unmap_single((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
732 fore200e_sba_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
734 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
736 sbus_dma_sync_single_for_cpu((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
740 fore200e_sba_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
742 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
744 sbus_dma_sync_single_for_device((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
748 /* allocate a DVMA consistent chunk of memory intended to act as a communication mechanism
749 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
752 fore200e_sba_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
753 int size, int nbr, int alignment)
755 chunk->alloc_size = chunk->align_size = size * nbr;
757 /* returned chunks are page-aligned */
758 chunk->alloc_addr = sbus_alloc_consistent((struct sbus_dev*)fore200e->bus_dev,
762 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
765 chunk->align_addr = chunk->alloc_addr;
771 /* free a DVMA consistent chunk of memory */
774 fore200e_sba_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
776 sbus_free_consistent((struct sbus_dev*)fore200e->bus_dev,
784 fore200e_sba_irq_enable(struct fore200e* fore200e)
786 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
787 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
792 fore200e_sba_irq_check(struct fore200e* fore200e)
794 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
799 fore200e_sba_irq_ack(struct fore200e* fore200e)
801 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
802 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
807 fore200e_sba_reset(struct fore200e* fore200e)
809 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
811 fore200e->bus->write(0, fore200e->regs.sba.hcr);
816 fore200e_sba_map(struct fore200e* fore200e)
818 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev;
821 /* gain access to the SBA specific registers */
822 fore200e->regs.sba.hcr = sbus_ioremap(&sbus_dev->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
823 fore200e->regs.sba.bsr = sbus_ioremap(&sbus_dev->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
824 fore200e->regs.sba.isr = sbus_ioremap(&sbus_dev->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
825 fore200e->virt_base = sbus_ioremap(&sbus_dev->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
827 if (fore200e->virt_base == NULL) {
828 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
832 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
834 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */
836 /* get the supported DVMA burst sizes */
837 bursts = prom_getintdefault(sbus_dev->bus->prom_node, "burst-sizes", 0x00);
839 if (sbus_can_dma_64bit(sbus_dev))
840 sbus_set_sbus64(sbus_dev, bursts);
842 fore200e->state = FORE200E_STATE_MAP;
848 fore200e_sba_unmap(struct fore200e* fore200e)
850 sbus_iounmap(fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
851 sbus_iounmap(fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
852 sbus_iounmap(fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
853 sbus_iounmap(fore200e->virt_base, SBA200E_RAM_LENGTH);
858 fore200e_sba_configure(struct fore200e* fore200e)
860 fore200e->state = FORE200E_STATE_CONFIGURE;
865 static struct fore200e* __init
866 fore200e_sba_detect(const struct fore200e_bus* bus, int index)
868 struct fore200e* fore200e;
869 struct sbus_bus* sbus_bus;
870 struct sbus_dev* sbus_dev = NULL;
872 unsigned int count = 0;
874 for_each_sbus (sbus_bus) {
875 for_each_sbusdev (sbus_dev, sbus_bus) {
876 if (strcmp(sbus_dev->prom_name, SBA200E_PROM_NAME) == 0) {
886 if (sbus_dev->num_registers != 4) {
887 printk(FORE200E "this %s device has %d instead of 4 registers\n",
888 bus->model_name, sbus_dev->num_registers);
892 fore200e = fore200e_kmalloc(sizeof(struct fore200e), GFP_KERNEL);
893 if (fore200e == NULL)
897 fore200e->bus_dev = sbus_dev;
898 fore200e->irq = sbus_dev->irqs[ 0 ];
900 fore200e->phys_base = (unsigned long)sbus_dev;
902 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
909 fore200e_sba_prom_read(struct fore200e* fore200e, struct prom_data* prom)
911 struct sbus_dev* sbus_dev = (struct sbus_dev*) fore200e->bus_dev;
914 len = prom_getproperty(sbus_dev->prom_node, "macaddrlo2", &prom->mac_addr[ 4 ], 4);
918 len = prom_getproperty(sbus_dev->prom_node, "macaddrhi4", &prom->mac_addr[ 2 ], 4);
922 prom_getproperty(sbus_dev->prom_node, "serialnumber",
923 (char*)&prom->serial_number, sizeof(prom->serial_number));
925 prom_getproperty(sbus_dev->prom_node, "promversion",
926 (char*)&prom->hw_revision, sizeof(prom->hw_revision));
933 fore200e_sba_proc_read(struct fore200e* fore200e, char *page)
935 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev;
937 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n", sbus_dev->slot, sbus_dev->prom_name);
939 #endif /* CONFIG_ATM_FORE200E_SBA */
943 fore200e_tx_irq(struct fore200e* fore200e)
945 struct host_txq* txq = &fore200e->host_txq;
946 struct host_txq_entry* entry;
948 struct fore200e_vc_map* vc_map;
950 if (fore200e->host_txq.txing == 0)
955 entry = &txq->host_entry[ txq->tail ];
957 if ((*entry->status & STATUS_COMPLETE) == 0) {
961 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n",
962 entry, txq->tail, entry->vc_map, entry->skb);
964 /* free copy of misaligned data */
967 /* remove DMA mapping */
968 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
971 vc_map = entry->vc_map;
973 /* vcc closed since the time the entry was submitted for tx? */
974 if ((vc_map->vcc == NULL) ||
975 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
977 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n",
978 fore200e->atm_dev->number);
980 dev_kfree_skb_any(entry->skb);
985 /* vcc closed then immediately re-opened? */
986 if (vc_map->incarn != entry->incarn) {
988 /* when a vcc is closed, some PDUs may be still pending in the tx queue.
989 if the same vcc is immediately re-opened, those pending PDUs must
990 not be popped after the completion of their emission, as they refer
991 to the prior incarnation of that vcc. otherwise, sk_atm(vcc)->sk_wmem_alloc
992 would be decremented by the size of the (unrelated) skb, possibly
993 leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc.
994 we thus bind the tx entry to the current incarnation of the vcc
995 when the entry is submitted for tx. When the tx later completes,
996 if the incarnation number of the tx entry does not match the one
997 of the vcc, then this implies that the vcc has been closed then re-opened.
998 we thus just drop the skb here. */
1000 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n",
1001 fore200e->atm_dev->number);
1003 dev_kfree_skb_any(entry->skb);
1009 /* notify tx completion */
1011 vcc->pop(vcc, entry->skb);
1014 dev_kfree_skb_any(entry->skb);
1017 /* race fixed by the above incarnation mechanism, but... */
1018 if (atomic_read(&sk_atm(vcc)->sk_wmem_alloc) < 0) {
1019 atomic_set(&sk_atm(vcc)->sk_wmem_alloc, 0);
1022 /* check error condition */
1023 if (*entry->status & STATUS_ERROR)
1024 atomic_inc(&vcc->stats->tx_err);
1026 atomic_inc(&vcc->stats->tx);
1030 *entry->status = STATUS_FREE;
1032 fore200e->host_txq.txing--;
1034 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX);
1039 #ifdef FORE200E_BSQ_DEBUG
1040 int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn)
1042 struct buffer* buffer;
1045 buffer = bsq->freebuf;
1048 if (buffer->supplied) {
1049 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n",
1050 where, scheme, magn, buffer->index);
1053 if (buffer->magn != magn) {
1054 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n",
1055 where, scheme, magn, buffer->index, buffer->magn);
1058 if (buffer->scheme != scheme) {
1059 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n",
1060 where, scheme, magn, buffer->index, buffer->scheme);
1063 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) {
1064 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n",
1065 where, scheme, magn, buffer->index);
1069 buffer = buffer->next;
1072 if (count != bsq->freebuf_count) {
1073 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n",
1074 where, scheme, magn, count, bsq->freebuf_count);
1082 fore200e_supply(struct fore200e* fore200e)
1084 int scheme, magn, i;
1086 struct host_bsq* bsq;
1087 struct host_bsq_entry* entry;
1088 struct buffer* buffer;
1090 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1091 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1093 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1095 #ifdef FORE200E_BSQ_DEBUG
1096 bsq_audit(1, bsq, scheme, magn);
1098 while (bsq->freebuf_count >= RBD_BLK_SIZE) {
1100 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n",
1101 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count);
1103 entry = &bsq->host_entry[ bsq->head ];
1105 for (i = 0; i < RBD_BLK_SIZE; i++) {
1107 /* take the first buffer in the free buffer list */
1108 buffer = bsq->freebuf;
1110 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n",
1111 scheme, magn, bsq->freebuf_count);
1114 bsq->freebuf = buffer->next;
1116 #ifdef FORE200E_BSQ_DEBUG
1117 if (buffer->supplied)
1118 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n",
1119 scheme, magn, buffer->index);
1120 buffer->supplied = 1;
1122 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
1123 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
1126 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
1128 /* decrease accordingly the number of free rx buffers */
1129 bsq->freebuf_count -= RBD_BLK_SIZE;
1131 *entry->status = STATUS_PENDING;
1132 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
1140 fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd)
1142 struct sk_buff* skb;
1143 struct buffer* buffer;
1144 struct fore200e_vcc* fore200e_vcc;
1146 #ifdef FORE200E_52BYTE_AAL0_SDU
1147 u32 cell_header = 0;
1152 fore200e_vcc = FORE200E_VCC(vcc);
1153 ASSERT(fore200e_vcc);
1155 #ifdef FORE200E_52BYTE_AAL0_SDU
1156 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
1158 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
1159 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
1160 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
1161 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
1162 rpd->atm_header.clp;
1167 /* compute total PDU length */
1168 for (i = 0; i < rpd->nseg; i++)
1169 pdu_len += rpd->rsd[ i ].length;
1171 skb = alloc_skb(pdu_len, GFP_ATOMIC);
1173 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
1175 atomic_inc(&vcc->stats->rx_drop);
1179 __net_timestamp(skb);
1181 #ifdef FORE200E_52BYTE_AAL0_SDU
1183 *((u32*)skb_put(skb, 4)) = cell_header;
1187 /* reassemble segments */
1188 for (i = 0; i < rpd->nseg; i++) {
1190 /* rebuild rx buffer address from rsd handle */
1191 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1193 /* Make device DMA transfer visible to CPU. */
1194 fore200e->bus->dma_sync_for_cpu(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1196 memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length);
1198 /* Now let the device get at it again. */
1199 fore200e->bus->dma_sync_for_device(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1202 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1204 if (pdu_len < fore200e_vcc->rx_min_pdu)
1205 fore200e_vcc->rx_min_pdu = pdu_len;
1206 if (pdu_len > fore200e_vcc->rx_max_pdu)
1207 fore200e_vcc->rx_max_pdu = pdu_len;
1208 fore200e_vcc->rx_pdu++;
1211 if (atm_charge(vcc, skb->truesize) == 0) {
1213 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1214 vcc->itf, vcc->vpi, vcc->vci);
1216 dev_kfree_skb_any(skb);
1218 atomic_inc(&vcc->stats->rx_drop);
1222 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1224 vcc->push(vcc, skb);
1225 atomic_inc(&vcc->stats->rx);
1227 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1234 fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1236 struct host_bsq* bsq;
1237 struct buffer* buffer;
1240 for (i = 0; i < rpd->nseg; i++) {
1242 /* rebuild rx buffer address from rsd handle */
1243 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1245 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ];
1247 #ifdef FORE200E_BSQ_DEBUG
1248 bsq_audit(2, bsq, buffer->scheme, buffer->magn);
1250 if (buffer->supplied == 0)
1251 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n",
1252 buffer->scheme, buffer->magn, buffer->index);
1253 buffer->supplied = 0;
1256 /* re-insert the buffer into the free buffer list */
1257 buffer->next = bsq->freebuf;
1258 bsq->freebuf = buffer;
1260 /* then increment the number of free rx buffers */
1261 bsq->freebuf_count++;
1267 fore200e_rx_irq(struct fore200e* fore200e)
1269 struct host_rxq* rxq = &fore200e->host_rxq;
1270 struct host_rxq_entry* entry;
1271 struct atm_vcc* vcc;
1272 struct fore200e_vc_map* vc_map;
1276 entry = &rxq->host_entry[ rxq->head ];
1278 /* no more received PDUs */
1279 if ((*entry->status & STATUS_COMPLETE) == 0)
1282 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1284 if ((vc_map->vcc == NULL) ||
1285 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
1287 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n",
1288 fore200e->atm_dev->number,
1289 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1295 if ((*entry->status & STATUS_ERROR) == 0) {
1297 fore200e_push_rpd(fore200e, vcc, entry->rpd);
1300 DPRINTK(2, "damaged PDU on %d.%d.%d\n",
1301 fore200e->atm_dev->number,
1302 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1303 atomic_inc(&vcc->stats->rx_err);
1307 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1309 fore200e_collect_rpd(fore200e, entry->rpd);
1311 /* rewrite the rpd address to ack the received PDU */
1312 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1313 *entry->status = STATUS_FREE;
1315 fore200e_supply(fore200e);
1320 #ifndef FORE200E_USE_TASKLET
1322 fore200e_irq(struct fore200e* fore200e)
1324 unsigned long flags;
1326 spin_lock_irqsave(&fore200e->q_lock, flags);
1327 fore200e_rx_irq(fore200e);
1328 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1330 spin_lock_irqsave(&fore200e->q_lock, flags);
1331 fore200e_tx_irq(fore200e);
1332 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1338 fore200e_interrupt(int irq, void* dev, struct pt_regs* regs)
1340 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1342 if (fore200e->bus->irq_check(fore200e) == 0) {
1344 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number);
1347 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number);
1349 #ifdef FORE200E_USE_TASKLET
1350 tasklet_schedule(&fore200e->tx_tasklet);
1351 tasklet_schedule(&fore200e->rx_tasklet);
1353 fore200e_irq(fore200e);
1356 fore200e->bus->irq_ack(fore200e);
1361 #ifdef FORE200E_USE_TASKLET
1363 fore200e_tx_tasklet(unsigned long data)
1365 struct fore200e* fore200e = (struct fore200e*) data;
1366 unsigned long flags;
1368 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1370 spin_lock_irqsave(&fore200e->q_lock, flags);
1371 fore200e_tx_irq(fore200e);
1372 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1377 fore200e_rx_tasklet(unsigned long data)
1379 struct fore200e* fore200e = (struct fore200e*) data;
1380 unsigned long flags;
1382 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1384 spin_lock_irqsave(&fore200e->q_lock, flags);
1385 fore200e_rx_irq((struct fore200e*) data);
1386 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1392 fore200e_select_scheme(struct atm_vcc* vcc)
1394 /* fairly balance the VCs over (identical) buffer schemes */
1395 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1397 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n",
1398 vcc->itf, vcc->vpi, vcc->vci, scheme);
1405 fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1407 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1408 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1409 struct activate_opcode activ_opcode;
1410 struct deactivate_opcode deactiv_opcode;
1413 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1415 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1418 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1420 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1421 activ_opcode.aal = aal;
1422 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1423 activ_opcode.pad = 0;
1426 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1427 deactiv_opcode.pad = 0;
1430 vpvc.vci = vcc->vci;
1431 vpvc.vpi = vcc->vpi;
1433 *entry->status = STATUS_PENDING;
1437 #ifdef FORE200E_52BYTE_AAL0_SDU
1440 /* the MTU is not used by the cp, except in the case of AAL0 */
1441 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1442 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc);
1443 fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode);
1446 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc);
1447 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode);
1450 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1452 *entry->status = STATUS_FREE;
1455 printk(FORE200E "unable to %s VC %d.%d.%d\n",
1456 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci);
1460 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci,
1461 activate ? "open" : "clos");
1467 #define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */
1470 fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1472 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1474 /* compute the data cells to idle cells ratio from the tx PCR */
1475 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1476 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1479 /* disable rate control */
1480 rate->data_cells = rate->idle_cells = 0;
1486 fore200e_open(struct atm_vcc *vcc)
1488 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1489 struct fore200e_vcc* fore200e_vcc;
1490 struct fore200e_vc_map* vc_map;
1491 unsigned long flags;
1493 short vpi = vcc->vpi;
1495 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS));
1496 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS));
1498 spin_lock_irqsave(&fore200e->q_lock, flags);
1500 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci);
1503 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1505 printk(FORE200E "VC %d.%d.%d already in use\n",
1506 fore200e->atm_dev->number, vpi, vci);
1513 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1515 fore200e_vcc = fore200e_kmalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC);
1516 if (fore200e_vcc == NULL) {
1521 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1522 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1523 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1524 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1525 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1526 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1527 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1529 /* pseudo-CBR bandwidth requested? */
1530 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1532 down(&fore200e->rate_sf);
1533 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1534 up(&fore200e->rate_sf);
1536 fore200e_kfree(fore200e_vcc);
1541 /* reserve bandwidth */
1542 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1543 up(&fore200e->rate_sf);
1546 vcc->itf = vcc->dev->number;
1548 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1549 set_bit(ATM_VF_ADDR, &vcc->flags);
1551 vcc->dev_data = fore200e_vcc;
1553 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1557 clear_bit(ATM_VF_ADDR, &vcc->flags);
1558 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1560 vcc->dev_data = NULL;
1562 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1564 fore200e_kfree(fore200e_vcc);
1568 /* compute rate control parameters */
1569 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1571 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1572 set_bit(ATM_VF_HASQOS, &vcc->flags);
1574 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1575 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1576 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1577 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1580 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1;
1581 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1582 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0;
1584 /* new incarnation of the vcc */
1585 vc_map->incarn = ++fore200e->incarn_count;
1587 /* VC unusable before this flag is set */
1588 set_bit(ATM_VF_READY, &vcc->flags);
1595 fore200e_close(struct atm_vcc* vcc)
1597 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1598 struct fore200e_vcc* fore200e_vcc;
1599 struct fore200e_vc_map* vc_map;
1600 unsigned long flags;
1603 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS));
1604 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS));
1606 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1608 clear_bit(ATM_VF_READY, &vcc->flags);
1610 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1612 spin_lock_irqsave(&fore200e->q_lock, flags);
1614 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1616 /* the vc is no longer considered as "in use" by fore200e_open() */
1619 vcc->itf = vcc->vci = vcc->vpi = 0;
1621 fore200e_vcc = FORE200E_VCC(vcc);
1622 vcc->dev_data = NULL;
1624 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1626 /* release reserved bandwidth, if any */
1627 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1629 down(&fore200e->rate_sf);
1630 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1631 up(&fore200e->rate_sf);
1633 clear_bit(ATM_VF_HASQOS, &vcc->flags);
1636 clear_bit(ATM_VF_ADDR, &vcc->flags);
1637 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1639 ASSERT(fore200e_vcc);
1640 fore200e_kfree(fore200e_vcc);
1645 fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1647 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1648 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1649 struct fore200e_vc_map* vc_map;
1650 struct host_txq* txq = &fore200e->host_txq;
1651 struct host_txq_entry* entry;
1653 struct tpd_haddr tpd_haddr;
1654 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1656 int tx_len = skb->len;
1657 u32* cell_header = NULL;
1658 unsigned char* skb_data;
1660 unsigned char* data;
1661 unsigned long flags;
1664 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1666 ASSERT(fore200e_vcc);
1668 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1669 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi);
1670 dev_kfree_skb_any(skb);
1674 #ifdef FORE200E_52BYTE_AAL0_SDU
1675 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1676 cell_header = (u32*) skb->data;
1677 skb_data = skb->data + 4; /* skip 4-byte cell header */
1678 skb_len = tx_len = skb->len - 4;
1680 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header);
1685 skb_data = skb->data;
1689 if (((unsigned long)skb_data) & 0x3) {
1691 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1696 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1698 /* this simply NUKES the PCA board */
1699 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1701 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1705 data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA);
1711 dev_kfree_skb_any(skb);
1716 memcpy(data, skb_data, skb_len);
1717 if (skb_len < tx_len)
1718 memset(data + skb_len, 0x00, tx_len - skb_len);
1724 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1725 ASSERT(vc_map->vcc == vcc);
1729 spin_lock_irqsave(&fore200e->q_lock, flags);
1731 entry = &txq->host_entry[ txq->head ];
1733 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) {
1735 /* try to free completed tx queue entries */
1736 fore200e_tx_irq(fore200e);
1738 if (*entry->status != STATUS_FREE) {
1740 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1742 /* retry once again? */
1748 atomic_inc(&vcc->stats->tx_err);
1751 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1752 fore200e->name, fore200e->cp_queues->heartbeat);
1757 dev_kfree_skb_any(skb);
1767 entry->incarn = vc_map->incarn;
1768 entry->vc_map = vc_map;
1770 entry->data = tx_copy ? data : NULL;
1773 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, DMA_TO_DEVICE);
1774 tpd->tsd[ 0 ].length = tx_len;
1776 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1779 /* The dma_map call above implies a dma_sync so the device can use it,
1780 * thus no explicit dma_sync call is necessary here.
1783 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1784 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1785 tpd->tsd[0].length, skb_len);
1787 if (skb_len < fore200e_vcc->tx_min_pdu)
1788 fore200e_vcc->tx_min_pdu = skb_len;
1789 if (skb_len > fore200e_vcc->tx_max_pdu)
1790 fore200e_vcc->tx_max_pdu = skb_len;
1791 fore200e_vcc->tx_pdu++;
1793 /* set tx rate control information */
1794 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1795 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1798 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1799 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1800 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1801 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1802 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1805 /* set the ATM header, common to all cells conveying the PDU */
1806 tpd->atm_header.clp = 0;
1807 tpd->atm_header.plt = 0;
1808 tpd->atm_header.vci = vcc->vci;
1809 tpd->atm_header.vpi = vcc->vpi;
1810 tpd->atm_header.gfc = 0;
1813 tpd->spec.length = tx_len;
1815 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1818 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT); /* size is expressed in 32 byte blocks */
1820 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */
1822 *entry->status = STATUS_PENDING;
1823 fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr);
1825 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1832 fore200e_getstats(struct fore200e* fore200e)
1834 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1835 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1836 struct stats_opcode opcode;
1840 if (fore200e->stats == NULL) {
1841 fore200e->stats = fore200e_kmalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA);
1842 if (fore200e->stats == NULL)
1846 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats,
1847 sizeof(struct stats), DMA_FROM_DEVICE);
1849 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1851 opcode.opcode = OPCODE_GET_STATS;
1854 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1856 *entry->status = STATUS_PENDING;
1858 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode);
1860 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1862 *entry->status = STATUS_FREE;
1864 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE);
1867 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1876 fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen)
1878 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1880 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1881 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1888 fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen)
1890 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1892 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1893 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1899 #if 0 /* currently unused */
1901 fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1903 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1904 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1905 struct oc3_opcode opcode;
1907 u32 oc3_regs_dma_addr;
1909 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1911 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1913 opcode.opcode = OPCODE_GET_OC3;
1918 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1920 *entry->status = STATUS_PENDING;
1922 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1924 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1926 *entry->status = STATUS_FREE;
1928 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1931 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
1941 fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1943 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1944 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1945 struct oc3_opcode opcode;
1948 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask);
1950 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1952 opcode.opcode = OPCODE_SET_OC3;
1954 opcode.value = value;
1957 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1959 *entry->status = STATUS_PENDING;
1961 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode);
1963 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1965 *entry->status = STATUS_FREE;
1968 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
1977 fore200e_setloop(struct fore200e* fore200e, int loop_mode)
1979 u32 mct_value, mct_mask;
1982 if (!capable(CAP_NET_ADMIN))
1985 switch (loop_mode) {
1989 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
1992 case ATM_LM_LOC_PHY:
1993 mct_value = mct_mask = SUNI_MCT_DLE;
1996 case ATM_LM_RMT_PHY:
1997 mct_value = mct_mask = SUNI_MCT_LLE;
2004 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
2006 fore200e->loop_mode = loop_mode;
2012 static inline unsigned int
2013 fore200e_swap(unsigned int in)
2015 #if defined(__LITTLE_ENDIAN)
2024 fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg)
2026 struct sonet_stats tmp;
2028 if (fore200e_getstats(fore200e) < 0)
2031 tmp.section_bip = fore200e_swap(fore200e->stats->oc3.section_bip8_errors);
2032 tmp.line_bip = fore200e_swap(fore200e->stats->oc3.line_bip24_errors);
2033 tmp.path_bip = fore200e_swap(fore200e->stats->oc3.path_bip8_errors);
2034 tmp.line_febe = fore200e_swap(fore200e->stats->oc3.line_febe_errors);
2035 tmp.path_febe = fore200e_swap(fore200e->stats->oc3.path_febe_errors);
2036 tmp.corr_hcs = fore200e_swap(fore200e->stats->oc3.corr_hcs_errors);
2037 tmp.uncorr_hcs = fore200e_swap(fore200e->stats->oc3.ucorr_hcs_errors);
2038 tmp.tx_cells = fore200e_swap(fore200e->stats->aal0.cells_transmitted) +
2039 fore200e_swap(fore200e->stats->aal34.cells_transmitted) +
2040 fore200e_swap(fore200e->stats->aal5.cells_transmitted);
2041 tmp.rx_cells = fore200e_swap(fore200e->stats->aal0.cells_received) +
2042 fore200e_swap(fore200e->stats->aal34.cells_received) +
2043 fore200e_swap(fore200e->stats->aal5.cells_received);
2046 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
2053 fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg)
2055 struct fore200e* fore200e = FORE200E_DEV(dev);
2057 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
2062 return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg);
2065 return put_user(0, (int __user *)arg) ? -EFAULT : 0;
2068 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
2071 return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0;
2074 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0;
2077 return -ENOSYS; /* not implemented */
2082 fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
2084 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
2085 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
2087 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
2088 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi);
2092 DPRINTK(2, "change_qos %d.%d.%d, "
2093 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
2094 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
2095 "available_cell_rate = %u",
2096 vcc->itf, vcc->vpi, vcc->vci,
2097 fore200e_traffic_class[ qos->txtp.traffic_class ],
2098 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
2099 fore200e_traffic_class[ qos->rxtp.traffic_class ],
2100 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
2101 flags, fore200e->available_cell_rate);
2103 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
2105 down(&fore200e->rate_sf);
2106 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
2107 up(&fore200e->rate_sf);
2111 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
2112 fore200e->available_cell_rate -= qos->txtp.max_pcr;
2114 up(&fore200e->rate_sf);
2116 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
2118 /* update rate control parameters */
2119 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
2121 set_bit(ATM_VF_HASQOS, &vcc->flags);
2131 fore200e_irq_request(struct fore200e* fore200e)
2133 if (request_irq(fore200e->irq, fore200e_interrupt, SA_SHIRQ, fore200e->name, fore200e->atm_dev) < 0) {
2135 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
2136 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2140 printk(FORE200E "IRQ %s reserved for device %s\n",
2141 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2143 #ifdef FORE200E_USE_TASKLET
2144 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e);
2145 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e);
2148 fore200e->state = FORE200E_STATE_IRQ;
2154 fore200e_get_esi(struct fore200e* fore200e)
2156 struct prom_data* prom = fore200e_kmalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA);
2162 ok = fore200e->bus->prom_read(fore200e, prom);
2164 fore200e_kfree(prom);
2168 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %02x:%02x:%02x:%02x:%02x:%02x\n",
2170 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */
2171 prom->serial_number & 0xFFFF,
2172 prom->mac_addr[ 2 ], prom->mac_addr[ 3 ], prom->mac_addr[ 4 ],
2173 prom->mac_addr[ 5 ], prom->mac_addr[ 6 ], prom->mac_addr[ 7 ]);
2175 for (i = 0; i < ESI_LEN; i++) {
2176 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
2179 fore200e_kfree(prom);
2186 fore200e_alloc_rx_buf(struct fore200e* fore200e)
2188 int scheme, magn, nbr, size, i;
2190 struct host_bsq* bsq;
2191 struct buffer* buffer;
2193 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2194 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2196 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2198 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
2199 size = fore200e_rx_buf_size[ scheme ][ magn ];
2201 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
2203 /* allocate the array of receive buffers */
2204 buffer = bsq->buffer = fore200e_kmalloc(nbr * sizeof(struct buffer), GFP_KERNEL);
2209 bsq->freebuf = NULL;
2211 for (i = 0; i < nbr; i++) {
2213 buffer[ i ].scheme = scheme;
2214 buffer[ i ].magn = magn;
2215 #ifdef FORE200E_BSQ_DEBUG
2216 buffer[ i ].index = i;
2217 buffer[ i ].supplied = 0;
2220 /* allocate the receive buffer body */
2221 if (fore200e_chunk_alloc(fore200e,
2222 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2223 DMA_FROM_DEVICE) < 0) {
2226 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2227 fore200e_kfree(buffer);
2232 /* insert the buffer into the free buffer list */
2233 buffer[ i ].next = bsq->freebuf;
2234 bsq->freebuf = &buffer[ i ];
2236 /* all the buffers are free, initially */
2237 bsq->freebuf_count = nbr;
2239 #ifdef FORE200E_BSQ_DEBUG
2240 bsq_audit(3, bsq, scheme, magn);
2245 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2251 fore200e_init_bs_queue(struct fore200e* fore200e)
2253 int scheme, magn, i;
2255 struct host_bsq* bsq;
2256 struct cp_bsq_entry __iomem * cp_entry;
2258 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2259 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2261 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2263 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2265 /* allocate and align the array of status words */
2266 if (fore200e->bus->dma_chunk_alloc(fore200e,
2268 sizeof(enum status),
2270 fore200e->bus->status_alignment) < 0) {
2274 /* allocate and align the array of receive buffer descriptors */
2275 if (fore200e->bus->dma_chunk_alloc(fore200e,
2277 sizeof(struct rbd_block),
2279 fore200e->bus->descr_alignment) < 0) {
2281 fore200e->bus->dma_chunk_free(fore200e, &bsq->status);
2285 /* get the base address of the cp resident buffer supply queue entries */
2286 cp_entry = fore200e->virt_base +
2287 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]);
2289 /* fill the host resident and cp resident buffer supply queue entries */
2290 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2292 bsq->host_entry[ i ].status =
2293 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2294 bsq->host_entry[ i ].rbd_block =
2295 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2296 bsq->host_entry[ i ].rbd_block_dma =
2297 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2298 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2300 *bsq->host_entry[ i ].status = STATUS_FREE;
2302 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2303 &cp_entry[ i ].status_haddr);
2308 fore200e->state = FORE200E_STATE_INIT_BSQ;
2314 fore200e_init_rx_queue(struct fore200e* fore200e)
2316 struct host_rxq* rxq = &fore200e->host_rxq;
2317 struct cp_rxq_entry __iomem * cp_entry;
2320 DPRINTK(2, "receive queue is being initialized\n");
2322 /* allocate and align the array of status words */
2323 if (fore200e->bus->dma_chunk_alloc(fore200e,
2325 sizeof(enum status),
2327 fore200e->bus->status_alignment) < 0) {
2331 /* allocate and align the array of receive PDU descriptors */
2332 if (fore200e->bus->dma_chunk_alloc(fore200e,
2336 fore200e->bus->descr_alignment) < 0) {
2338 fore200e->bus->dma_chunk_free(fore200e, &rxq->status);
2342 /* get the base address of the cp resident rx queue entries */
2343 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq);
2345 /* fill the host resident and cp resident rx entries */
2346 for (i=0; i < QUEUE_SIZE_RX; i++) {
2348 rxq->host_entry[ i ].status =
2349 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2350 rxq->host_entry[ i ].rpd =
2351 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2352 rxq->host_entry[ i ].rpd_dma =
2353 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2354 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2356 *rxq->host_entry[ i ].status = STATUS_FREE;
2358 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2359 &cp_entry[ i ].status_haddr);
2361 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2362 &cp_entry[ i ].rpd_haddr);
2365 /* set the head entry of the queue */
2368 fore200e->state = FORE200E_STATE_INIT_RXQ;
2374 fore200e_init_tx_queue(struct fore200e* fore200e)
2376 struct host_txq* txq = &fore200e->host_txq;
2377 struct cp_txq_entry __iomem * cp_entry;
2380 DPRINTK(2, "transmit queue is being initialized\n");
2382 /* allocate and align the array of status words */
2383 if (fore200e->bus->dma_chunk_alloc(fore200e,
2385 sizeof(enum status),
2387 fore200e->bus->status_alignment) < 0) {
2391 /* allocate and align the array of transmit PDU descriptors */
2392 if (fore200e->bus->dma_chunk_alloc(fore200e,
2396 fore200e->bus->descr_alignment) < 0) {
2398 fore200e->bus->dma_chunk_free(fore200e, &txq->status);
2402 /* get the base address of the cp resident tx queue entries */
2403 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq);
2405 /* fill the host resident and cp resident tx entries */
2406 for (i=0; i < QUEUE_SIZE_TX; i++) {
2408 txq->host_entry[ i ].status =
2409 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2410 txq->host_entry[ i ].tpd =
2411 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2412 txq->host_entry[ i ].tpd_dma =
2413 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2414 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2416 *txq->host_entry[ i ].status = STATUS_FREE;
2418 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2419 &cp_entry[ i ].status_haddr);
2421 /* although there is a one-to-one mapping of tx queue entries and tpds,
2422 we do not write here the DMA (physical) base address of each tpd into
2423 the related cp resident entry, because the cp relies on this write
2424 operation to detect that a new pdu has been submitted for tx */
2427 /* set the head and tail entries of the queue */
2431 fore200e->state = FORE200E_STATE_INIT_TXQ;
2437 fore200e_init_cmd_queue(struct fore200e* fore200e)
2439 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2440 struct cp_cmdq_entry __iomem * cp_entry;
2443 DPRINTK(2, "command queue is being initialized\n");
2445 /* allocate and align the array of status words */
2446 if (fore200e->bus->dma_chunk_alloc(fore200e,
2448 sizeof(enum status),
2450 fore200e->bus->status_alignment) < 0) {
2454 /* get the base address of the cp resident cmd queue entries */
2455 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq);
2457 /* fill the host resident and cp resident cmd entries */
2458 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2460 cmdq->host_entry[ i ].status =
2461 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2462 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2464 *cmdq->host_entry[ i ].status = STATUS_FREE;
2466 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2467 &cp_entry[ i ].status_haddr);
2470 /* set the head entry of the queue */
2473 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2479 fore200e_param_bs_queue(struct fore200e* fore200e,
2480 enum buffer_scheme scheme, enum buffer_magn magn,
2481 int queue_length, int pool_size, int supply_blksize)
2483 struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2485 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2486 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2487 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2488 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2493 fore200e_initialize(struct fore200e* fore200e)
2495 struct cp_queues __iomem * cpq;
2496 int ok, scheme, magn;
2498 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2500 init_MUTEX(&fore200e->rate_sf);
2501 spin_lock_init(&fore200e->q_lock);
2503 cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET;
2505 /* enable cp to host interrupts */
2506 fore200e->bus->write(1, &cpq->imask);
2508 if (fore200e->bus->irq_enable)
2509 fore200e->bus->irq_enable(fore200e);
2511 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2513 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2514 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2515 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2517 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2518 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2520 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2521 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2522 fore200e_param_bs_queue(fore200e, scheme, magn,
2524 fore200e_rx_buf_nbr[ scheme ][ magn ],
2527 /* issue the initialize command */
2528 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2529 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2531 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2533 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2537 printk(FORE200E "device %s initialized\n", fore200e->name);
2539 fore200e->state = FORE200E_STATE_INITIALIZE;
2545 fore200e_monitor_putc(struct fore200e* fore200e, char c)
2547 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2552 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2557 fore200e_monitor_getc(struct fore200e* fore200e)
2559 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2560 unsigned long timeout = jiffies + msecs_to_jiffies(50);
2563 while (time_before(jiffies, timeout)) {
2565 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2567 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2569 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2571 printk("%c", c & 0xFF);
2582 fore200e_monitor_puts(struct fore200e* fore200e, char* str)
2586 /* the i960 monitor doesn't accept any new character if it has something to say */
2587 while (fore200e_monitor_getc(fore200e) >= 0);
2589 fore200e_monitor_putc(fore200e, *str++);
2592 while (fore200e_monitor_getc(fore200e) >= 0);
2597 fore200e_start_fw(struct fore200e* fore200e)
2601 struct fw_header* fw_header = (struct fw_header*) fore200e->bus->fw_data;
2603 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2605 #if defined(__sparc_v9__)
2606 /* reported to be required by SBA cards on some sparc64 hosts */
2610 sprintf(cmd, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2612 fore200e_monitor_puts(fore200e, cmd);
2614 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000);
2616 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2620 printk(FORE200E "device %s firmware started\n", fore200e->name);
2622 fore200e->state = FORE200E_STATE_START_FW;
2628 fore200e_load_fw(struct fore200e* fore200e)
2630 u32* fw_data = (u32*) fore200e->bus->fw_data;
2631 u32 fw_size = (u32) *fore200e->bus->fw_size / sizeof(u32);
2633 struct fw_header* fw_header = (struct fw_header*) fw_data;
2635 u32 __iomem *load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2637 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2638 fore200e->name, load_addr, fw_size);
2640 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2641 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2645 for (; fw_size--; fw_data++, load_addr++)
2646 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2648 fore200e->state = FORE200E_STATE_LOAD_FW;
2654 fore200e_register(struct fore200e* fore200e)
2656 struct atm_dev* atm_dev;
2658 DPRINTK(2, "device %s being registered\n", fore200e->name);
2660 atm_dev = atm_dev_register(fore200e->bus->proc_name, &fore200e_ops, -1,
2662 if (atm_dev == NULL) {
2663 printk(FORE200E "unable to register device %s\n", fore200e->name);
2667 atm_dev->dev_data = fore200e;
2668 fore200e->atm_dev = atm_dev;
2670 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS;
2671 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS;
2673 fore200e->available_cell_rate = ATM_OC3_PCR;
2675 fore200e->state = FORE200E_STATE_REGISTER;
2681 fore200e_init(struct fore200e* fore200e)
2683 if (fore200e_register(fore200e) < 0)
2686 if (fore200e->bus->configure(fore200e) < 0)
2689 if (fore200e->bus->map(fore200e) < 0)
2692 if (fore200e_reset(fore200e, 1) < 0)
2695 if (fore200e_load_fw(fore200e) < 0)
2698 if (fore200e_start_fw(fore200e) < 0)
2701 if (fore200e_initialize(fore200e) < 0)
2704 if (fore200e_init_cmd_queue(fore200e) < 0)
2707 if (fore200e_init_tx_queue(fore200e) < 0)
2710 if (fore200e_init_rx_queue(fore200e) < 0)
2713 if (fore200e_init_bs_queue(fore200e) < 0)
2716 if (fore200e_alloc_rx_buf(fore200e) < 0)
2719 if (fore200e_get_esi(fore200e) < 0)
2722 if (fore200e_irq_request(fore200e) < 0)
2725 fore200e_supply(fore200e);
2727 /* all done, board initialization is now complete */
2728 fore200e->state = FORE200E_STATE_COMPLETE;
2733 static int __devinit
2734 fore200e_pca_detect(struct pci_dev *pci_dev, const struct pci_device_id *pci_ent)
2736 const struct fore200e_bus* bus = (struct fore200e_bus*) pci_ent->driver_data;
2737 struct fore200e* fore200e;
2739 static int index = 0;
2741 if (pci_enable_device(pci_dev)) {
2746 fore200e = fore200e_kmalloc(sizeof(struct fore200e), GFP_KERNEL);
2747 if (fore200e == NULL) {
2752 fore200e->bus = bus;
2753 fore200e->bus_dev = pci_dev;
2754 fore200e->irq = pci_dev->irq;
2755 fore200e->phys_base = pci_resource_start(pci_dev, 0);
2757 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
2759 pci_set_master(pci_dev);
2761 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
2762 fore200e->bus->model_name,
2763 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2765 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2767 err = fore200e_init(fore200e);
2769 fore200e_shutdown(fore200e);
2774 pci_set_drvdata(pci_dev, fore200e);
2782 pci_disable_device(pci_dev);
2787 static void __devexit fore200e_pca_remove_one(struct pci_dev *pci_dev)
2789 struct fore200e *fore200e;
2791 fore200e = pci_get_drvdata(pci_dev);
2793 fore200e_shutdown(fore200e);
2795 pci_disable_device(pci_dev);
2799 #ifdef CONFIG_ATM_FORE200E_PCA
2800 static struct pci_device_id fore200e_pca_tbl[] = {
2801 { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID,
2802 0, 0, (unsigned long) &fore200e_bus[0] },
2806 MODULE_DEVICE_TABLE(pci, fore200e_pca_tbl);
2808 static struct pci_driver fore200e_pca_driver = {
2809 .name = "fore_200e",
2810 .probe = fore200e_pca_detect,
2811 .remove = __devexit_p(fore200e_pca_remove_one),
2812 .id_table = fore200e_pca_tbl,
2818 fore200e_module_init(void)
2820 const struct fore200e_bus* bus;
2821 struct fore200e* fore200e;
2824 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n");
2826 /* for each configured bus interface */
2827 for (bus = fore200e_bus; bus->model_name; bus++) {
2829 /* detect all boards present on that bus */
2830 for (index = 0; bus->detect && (fore200e = bus->detect(bus, index)); index++) {
2832 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
2833 fore200e->bus->model_name,
2834 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2836 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2838 if (fore200e_init(fore200e) < 0) {
2840 fore200e_shutdown(fore200e);
2844 list_add(&fore200e->entry, &fore200e_boards);
2848 #ifdef CONFIG_ATM_FORE200E_PCA
2849 if (!pci_register_driver(&fore200e_pca_driver))
2853 if (!list_empty(&fore200e_boards))
2861 fore200e_module_cleanup(void)
2863 struct fore200e *fore200e, *next;
2865 #ifdef CONFIG_ATM_FORE200E_PCA
2866 pci_unregister_driver(&fore200e_pca_driver);
2869 list_for_each_entry_safe(fore200e, next, &fore200e_boards, entry) {
2870 fore200e_shutdown(fore200e);
2873 DPRINTK(1, "module being removed\n");
2878 fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page)
2880 struct fore200e* fore200e = FORE200E_DEV(dev);
2881 struct fore200e_vcc* fore200e_vcc;
2882 struct atm_vcc* vcc;
2883 int i, len, left = *pos;
2884 unsigned long flags;
2888 if (fore200e_getstats(fore200e) < 0)
2891 len = sprintf(page,"\n"
2893 " internal name:\t\t%s\n", fore200e->name);
2895 /* print bus-specific information */
2896 if (fore200e->bus->proc_read)
2897 len += fore200e->bus->proc_read(fore200e, page + len);
2899 len += sprintf(page + len,
2900 " interrupt line:\t\t%s\n"
2901 " physical base address:\t0x%p\n"
2902 " virtual base address:\t0x%p\n"
2903 " factory address (ESI):\t%02x:%02x:%02x:%02x:%02x:%02x\n"
2904 " board serial number:\t\t%d\n\n",
2905 fore200e_irq_itoa(fore200e->irq),
2906 (void*)fore200e->phys_base,
2907 fore200e->virt_base,
2908 fore200e->esi[0], fore200e->esi[1], fore200e->esi[2],
2909 fore200e->esi[3], fore200e->esi[4], fore200e->esi[5],
2910 fore200e->esi[4] * 256 + fore200e->esi[5]);
2916 return sprintf(page,
2917 " free small bufs, scheme 1:\t%d\n"
2918 " free large bufs, scheme 1:\t%d\n"
2919 " free small bufs, scheme 2:\t%d\n"
2920 " free large bufs, scheme 2:\t%d\n",
2921 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count,
2922 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count,
2923 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count,
2924 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count);
2927 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2929 len = sprintf(page,"\n\n"
2930 " cell processor:\n"
2931 " heartbeat state:\t\t");
2933 if (hb >> 16 != 0xDEAD)
2934 len += sprintf(page + len, "0x%08x\n", hb);
2936 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2942 static const char* media_name[] = {
2943 "unshielded twisted pair",
2944 "multimode optical fiber ST",
2945 "multimode optical fiber SC",
2946 "single-mode optical fiber ST",
2947 "single-mode optical fiber SC",
2951 static const char* oc3_mode[] = {
2953 "diagnostic loopback",
2958 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2959 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2960 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2961 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2964 if ((media_index < 0) || (media_index > 4))
2967 switch (fore200e->loop_mode) {
2968 case ATM_LM_NONE: oc3_index = 0;
2970 case ATM_LM_LOC_PHY: oc3_index = 1;
2972 case ATM_LM_RMT_PHY: oc3_index = 2;
2974 default: oc3_index = 3;
2977 return sprintf(page,
2978 " firmware release:\t\t%d.%d.%d\n"
2979 " monitor release:\t\t%d.%d\n"
2980 " media type:\t\t\t%s\n"
2981 " OC-3 revision:\t\t0x%x\n"
2982 " OC-3 mode:\t\t\t%s",
2983 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2984 mon960_release >> 16, mon960_release << 16 >> 16,
2985 media_name[ media_index ],
2987 oc3_mode[ oc3_index ]);
2991 struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor;
2993 return sprintf(page,
2996 " version number:\t\t%d\n"
2997 " boot status word:\t\t0x%08x\n",
2998 fore200e->bus->read(&cp_monitor->mon_version),
2999 fore200e->bus->read(&cp_monitor->bstat));
3003 return sprintf(page,
3005 " device statistics:\n"
3007 " crc_header_errors:\t\t%10u\n"
3008 " framing_errors:\t\t%10u\n",
3009 fore200e_swap(fore200e->stats->phy.crc_header_errors),
3010 fore200e_swap(fore200e->stats->phy.framing_errors));
3013 return sprintf(page, "\n"
3015 " section_bip8_errors:\t%10u\n"
3016 " path_bip8_errors:\t\t%10u\n"
3017 " line_bip24_errors:\t\t%10u\n"
3018 " line_febe_errors:\t\t%10u\n"
3019 " path_febe_errors:\t\t%10u\n"
3020 " corr_hcs_errors:\t\t%10u\n"
3021 " ucorr_hcs_errors:\t\t%10u\n",
3022 fore200e_swap(fore200e->stats->oc3.section_bip8_errors),
3023 fore200e_swap(fore200e->stats->oc3.path_bip8_errors),
3024 fore200e_swap(fore200e->stats->oc3.line_bip24_errors),
3025 fore200e_swap(fore200e->stats->oc3.line_febe_errors),
3026 fore200e_swap(fore200e->stats->oc3.path_febe_errors),
3027 fore200e_swap(fore200e->stats->oc3.corr_hcs_errors),
3028 fore200e_swap(fore200e->stats->oc3.ucorr_hcs_errors));
3031 return sprintf(page,"\n"
3032 " ATM:\t\t\t\t cells\n"
3035 " vpi out of range:\t\t%10u\n"
3036 " vpi no conn:\t\t%10u\n"
3037 " vci out of range:\t\t%10u\n"
3038 " vci no conn:\t\t%10u\n",
3039 fore200e_swap(fore200e->stats->atm.cells_transmitted),
3040 fore200e_swap(fore200e->stats->atm.cells_received),
3041 fore200e_swap(fore200e->stats->atm.vpi_bad_range),
3042 fore200e_swap(fore200e->stats->atm.vpi_no_conn),
3043 fore200e_swap(fore200e->stats->atm.vci_bad_range),
3044 fore200e_swap(fore200e->stats->atm.vci_no_conn));
3047 return sprintf(page,"\n"
3048 " AAL0:\t\t\t cells\n"
3051 " dropped:\t\t\t%10u\n",
3052 fore200e_swap(fore200e->stats->aal0.cells_transmitted),
3053 fore200e_swap(fore200e->stats->aal0.cells_received),
3054 fore200e_swap(fore200e->stats->aal0.cells_dropped));
3057 return sprintf(page,"\n"
3059 " SAR sublayer:\t\t cells\n"
3062 " dropped:\t\t\t%10u\n"
3063 " CRC errors:\t\t%10u\n"
3064 " protocol errors:\t\t%10u\n\n"
3065 " CS sublayer:\t\t PDUs\n"
3068 " dropped:\t\t\t%10u\n"
3069 " protocol errors:\t\t%10u\n",
3070 fore200e_swap(fore200e->stats->aal34.cells_transmitted),
3071 fore200e_swap(fore200e->stats->aal34.cells_received),
3072 fore200e_swap(fore200e->stats->aal34.cells_dropped),
3073 fore200e_swap(fore200e->stats->aal34.cells_crc_errors),
3074 fore200e_swap(fore200e->stats->aal34.cells_protocol_errors),
3075 fore200e_swap(fore200e->stats->aal34.cspdus_transmitted),
3076 fore200e_swap(fore200e->stats->aal34.cspdus_received),
3077 fore200e_swap(fore200e->stats->aal34.cspdus_dropped),
3078 fore200e_swap(fore200e->stats->aal34.cspdus_protocol_errors));
3081 return sprintf(page,"\n"
3083 " SAR sublayer:\t\t cells\n"
3086 " dropped:\t\t\t%10u\n"
3087 " congestions:\t\t%10u\n\n"
3088 " CS sublayer:\t\t PDUs\n"
3091 " dropped:\t\t\t%10u\n"
3092 " CRC errors:\t\t%10u\n"
3093 " protocol errors:\t\t%10u\n",
3094 fore200e_swap(fore200e->stats->aal5.cells_transmitted),
3095 fore200e_swap(fore200e->stats->aal5.cells_received),
3096 fore200e_swap(fore200e->stats->aal5.cells_dropped),
3097 fore200e_swap(fore200e->stats->aal5.congestion_experienced),
3098 fore200e_swap(fore200e->stats->aal5.cspdus_transmitted),
3099 fore200e_swap(fore200e->stats->aal5.cspdus_received),
3100 fore200e_swap(fore200e->stats->aal5.cspdus_dropped),
3101 fore200e_swap(fore200e->stats->aal5.cspdus_crc_errors),
3102 fore200e_swap(fore200e->stats->aal5.cspdus_protocol_errors));
3105 return sprintf(page,"\n"
3106 " AUX:\t\t allocation failures\n"
3107 " small b1:\t\t\t%10u\n"
3108 " large b1:\t\t\t%10u\n"
3109 " small b2:\t\t\t%10u\n"
3110 " large b2:\t\t\t%10u\n"
3111 " RX PDUs:\t\t\t%10u\n"
3112 " TX PDUs:\t\t\t%10lu\n",
3113 fore200e_swap(fore200e->stats->aux.small_b1_failed),
3114 fore200e_swap(fore200e->stats->aux.large_b1_failed),
3115 fore200e_swap(fore200e->stats->aux.small_b2_failed),
3116 fore200e_swap(fore200e->stats->aux.large_b2_failed),
3117 fore200e_swap(fore200e->stats->aux.rpd_alloc_failed),
3121 return sprintf(page,"\n"
3122 " receive carrier:\t\t\t%s\n",
3123 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
3126 return sprintf(page,"\n"
3127 " VCCs:\n address VPI VCI AAL "
3128 "TX PDUs TX min/max size RX PDUs RX min/max size\n");
3131 for (i = 0; i < NBR_CONNECT; i++) {
3133 vcc = fore200e->vc_map[i].vcc;
3138 spin_lock_irqsave(&fore200e->q_lock, flags);
3140 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) {
3142 fore200e_vcc = FORE200E_VCC(vcc);
3143 ASSERT(fore200e_vcc);
3146 " %08x %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n",
3147 (u32)(unsigned long)vcc,
3148 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
3149 fore200e_vcc->tx_pdu,
3150 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
3151 fore200e_vcc->tx_max_pdu,
3152 fore200e_vcc->rx_pdu,
3153 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
3154 fore200e_vcc->rx_max_pdu);
3156 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3160 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3166 module_init(fore200e_module_init);
3167 module_exit(fore200e_module_cleanup);
3170 static const struct atmdev_ops fore200e_ops =
3172 .open = fore200e_open,
3173 .close = fore200e_close,
3174 .ioctl = fore200e_ioctl,
3175 .getsockopt = fore200e_getsockopt,
3176 .setsockopt = fore200e_setsockopt,
3177 .send = fore200e_send,
3178 .change_qos = fore200e_change_qos,
3179 .proc_read = fore200e_proc_read,
3180 .owner = THIS_MODULE
3184 #ifdef CONFIG_ATM_FORE200E_PCA
3185 extern const unsigned char _fore200e_pca_fw_data[];
3186 extern const unsigned int _fore200e_pca_fw_size;
3188 #ifdef CONFIG_ATM_FORE200E_SBA
3189 extern const unsigned char _fore200e_sba_fw_data[];
3190 extern const unsigned int _fore200e_sba_fw_size;
3193 static const struct fore200e_bus fore200e_bus[] = {
3194 #ifdef CONFIG_ATM_FORE200E_PCA
3195 { "PCA-200E", "pca200e", 32, 4, 32,
3196 _fore200e_pca_fw_data, &_fore200e_pca_fw_size,
3199 fore200e_pca_dma_map,
3200 fore200e_pca_dma_unmap,
3201 fore200e_pca_dma_sync_for_cpu,
3202 fore200e_pca_dma_sync_for_device,
3203 fore200e_pca_dma_chunk_alloc,
3204 fore200e_pca_dma_chunk_free,
3206 fore200e_pca_configure,
3209 fore200e_pca_prom_read,
3212 fore200e_pca_irq_check,
3213 fore200e_pca_irq_ack,
3214 fore200e_pca_proc_read,
3217 #ifdef CONFIG_ATM_FORE200E_SBA
3218 { "SBA-200E", "sba200e", 32, 64, 32,
3219 _fore200e_sba_fw_data, &_fore200e_sba_fw_size,
3222 fore200e_sba_dma_map,
3223 fore200e_sba_dma_unmap,
3224 fore200e_sba_dma_sync_for_cpu,
3225 fore200e_sba_dma_sync_for_device,
3226 fore200e_sba_dma_chunk_alloc,
3227 fore200e_sba_dma_chunk_free,
3228 fore200e_sba_detect,
3229 fore200e_sba_configure,
3232 fore200e_sba_prom_read,
3234 fore200e_sba_irq_enable,
3235 fore200e_sba_irq_check,
3236 fore200e_sba_irq_ack,
3237 fore200e_sba_proc_read,
3243 #ifdef MODULE_LICENSE
3244 MODULE_LICENSE("GPL");