2 * Common code for mac80211 Prism54 drivers
4 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
5 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
6 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
9 * - the islsm (softmac prism54) driver, which is:
10 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
12 * C
\ 2 Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
19 #include <linux/init.h>
20 #include <linux/firmware.h>
21 #include <linux/etherdevice.h>
23 #include <net/mac80211.h>
26 #include "p54common.h"
28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
29 MODULE_DESCRIPTION("Softmac Prism54 common code");
30 MODULE_LICENSE("GPL");
31 MODULE_ALIAS("prism54common");
33 static struct ieee80211_rate p54_bgrates[] = {
34 { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
35 { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
36 { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
37 { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
38 { .bitrate = 60, .hw_value = 4, },
39 { .bitrate = 90, .hw_value = 5, },
40 { .bitrate = 120, .hw_value = 6, },
41 { .bitrate = 180, .hw_value = 7, },
42 { .bitrate = 240, .hw_value = 8, },
43 { .bitrate = 360, .hw_value = 9, },
44 { .bitrate = 480, .hw_value = 10, },
45 { .bitrate = 540, .hw_value = 11, },
48 static struct ieee80211_channel p54_bgchannels[] = {
49 { .center_freq = 2412, .hw_value = 1, },
50 { .center_freq = 2417, .hw_value = 2, },
51 { .center_freq = 2422, .hw_value = 3, },
52 { .center_freq = 2427, .hw_value = 4, },
53 { .center_freq = 2432, .hw_value = 5, },
54 { .center_freq = 2437, .hw_value = 6, },
55 { .center_freq = 2442, .hw_value = 7, },
56 { .center_freq = 2447, .hw_value = 8, },
57 { .center_freq = 2452, .hw_value = 9, },
58 { .center_freq = 2457, .hw_value = 10, },
59 { .center_freq = 2462, .hw_value = 11, },
60 { .center_freq = 2467, .hw_value = 12, },
61 { .center_freq = 2472, .hw_value = 13, },
62 { .center_freq = 2484, .hw_value = 14, },
65 static struct ieee80211_supported_band band_2GHz = {
66 .channels = p54_bgchannels,
67 .n_channels = ARRAY_SIZE(p54_bgchannels),
68 .bitrates = p54_bgrates,
69 .n_bitrates = ARRAY_SIZE(p54_bgrates),
72 static struct ieee80211_rate p54_arates[] = {
73 { .bitrate = 60, .hw_value = 4, },
74 { .bitrate = 90, .hw_value = 5, },
75 { .bitrate = 120, .hw_value = 6, },
76 { .bitrate = 180, .hw_value = 7, },
77 { .bitrate = 240, .hw_value = 8, },
78 { .bitrate = 360, .hw_value = 9, },
79 { .bitrate = 480, .hw_value = 10, },
80 { .bitrate = 540, .hw_value = 11, },
83 static struct ieee80211_channel p54_achannels[] = {
84 { .center_freq = 4920 },
85 { .center_freq = 4940 },
86 { .center_freq = 4960 },
87 { .center_freq = 4980 },
88 { .center_freq = 5040 },
89 { .center_freq = 5060 },
90 { .center_freq = 5080 },
91 { .center_freq = 5170 },
92 { .center_freq = 5180 },
93 { .center_freq = 5190 },
94 { .center_freq = 5200 },
95 { .center_freq = 5210 },
96 { .center_freq = 5220 },
97 { .center_freq = 5230 },
98 { .center_freq = 5240 },
99 { .center_freq = 5260 },
100 { .center_freq = 5280 },
101 { .center_freq = 5300 },
102 { .center_freq = 5320 },
103 { .center_freq = 5500 },
104 { .center_freq = 5520 },
105 { .center_freq = 5540 },
106 { .center_freq = 5560 },
107 { .center_freq = 5580 },
108 { .center_freq = 5600 },
109 { .center_freq = 5620 },
110 { .center_freq = 5640 },
111 { .center_freq = 5660 },
112 { .center_freq = 5680 },
113 { .center_freq = 5700 },
114 { .center_freq = 5745 },
115 { .center_freq = 5765 },
116 { .center_freq = 5785 },
117 { .center_freq = 5805 },
118 { .center_freq = 5825 },
121 static struct ieee80211_supported_band band_5GHz = {
122 .channels = p54_achannels,
123 .n_channels = ARRAY_SIZE(p54_achannels),
124 .bitrates = p54_arates,
125 .n_bitrates = ARRAY_SIZE(p54_arates),
128 int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
130 struct p54_common *priv = dev->priv;
131 struct bootrec_exp_if *exp_if;
132 struct bootrec *bootrec;
133 u32 *data = (u32 *)fw->data;
134 u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
135 u8 *fw_version = NULL;
142 while (data < end_data && *data)
145 while (data < end_data && !*data)
148 bootrec = (struct bootrec *) data;
150 while (bootrec->data <= end_data &&
151 (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
152 u32 code = le32_to_cpu(bootrec->code);
154 case BR_CODE_COMPONENT_ID:
155 priv->fw_interface = be32_to_cpup((__be32 *)
157 switch (priv->fw_interface) {
159 printk(KERN_INFO "p54: FreeMAC firmware\n");
162 printk(KERN_INFO "p54: LM20 firmware\n");
165 printk(KERN_INFO "p54: LM86 firmware\n");
168 printk(KERN_INFO "p54: LM87 firmware\n");
171 printk(KERN_INFO "p54: unknown firmware\n");
175 case BR_CODE_COMPONENT_VERSION:
176 /* 24 bytes should be enough for all firmwares */
177 if (strnlen((unsigned char*)bootrec->data, 24) < 24)
178 fw_version = (unsigned char*)bootrec->data;
180 case BR_CODE_DESCR: {
181 struct bootrec_desc *desc =
182 (struct bootrec_desc *)bootrec->data;
183 priv->rx_start = le32_to_cpu(desc->rx_start);
184 /* FIXME add sanity checking */
185 priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
186 priv->headroom = desc->headroom;
187 priv->tailroom = desc->tailroom;
188 if (le32_to_cpu(bootrec->len) == 11)
189 priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
191 priv->rx_mtu = (size_t)
192 0x620 - priv->tx_hdr_len;
195 case BR_CODE_EXPOSED_IF:
196 exp_if = (struct bootrec_exp_if *) bootrec->data;
197 for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
198 if (exp_if[i].if_id == cpu_to_le16(0x1a))
199 priv->fw_var = le16_to_cpu(exp_if[i].variant);
201 case BR_CODE_DEPENDENT_IF:
203 case BR_CODE_END_OF_BRA:
204 case LEGACY_BR_CODE_END_OF_BRA:
210 bootrec = (struct bootrec *)&bootrec->data[len];
214 printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
215 fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
217 if (priv->fw_var >= 0x300) {
218 /* Firmware supports QoS, use it! */
219 priv->tx_stats[4].limit = 3;
220 priv->tx_stats[5].limit = 4;
221 priv->tx_stats[6].limit = 3;
222 priv->tx_stats[7].limit = 1;
228 EXPORT_SYMBOL_GPL(p54_parse_firmware);
230 static int p54_convert_rev0(struct ieee80211_hw *dev,
231 struct pda_pa_curve_data *curve_data)
233 struct p54_common *priv = dev->priv;
234 struct p54_pa_curve_data_sample *dst;
235 struct pda_pa_curve_data_sample_rev0 *src;
236 size_t cd_len = sizeof(*curve_data) +
237 (curve_data->points_per_channel*sizeof(*dst) + 2) *
238 curve_data->channels;
240 void *source, *target;
242 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
243 if (!priv->curve_data)
246 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
247 source = curve_data->data;
248 target = priv->curve_data->data;
249 for (i = 0; i < curve_data->channels; i++) {
250 __le16 *freq = source;
251 source += sizeof(__le16);
252 *((__le16 *)target) = *freq;
253 target += sizeof(__le16);
254 for (j = 0; j < curve_data->points_per_channel; j++) {
258 dst->rf_power = src->rf_power;
259 dst->pa_detector = src->pa_detector;
260 dst->data_64qam = src->pcv;
261 /* "invent" the points for the other modulations */
262 #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
263 dst->data_16qam = SUB(src->pcv, 12);
264 dst->data_qpsk = SUB(dst->data_16qam, 12);
265 dst->data_bpsk = SUB(dst->data_qpsk, 12);
266 dst->data_barker = SUB(dst->data_bpsk, 14);
268 target += sizeof(*dst);
269 source += sizeof(*src);
276 static int p54_convert_rev1(struct ieee80211_hw *dev,
277 struct pda_pa_curve_data *curve_data)
279 struct p54_common *priv = dev->priv;
280 struct p54_pa_curve_data_sample *dst;
281 struct pda_pa_curve_data_sample_rev1 *src;
282 size_t cd_len = sizeof(*curve_data) +
283 (curve_data->points_per_channel*sizeof(*dst) + 2) *
284 curve_data->channels;
286 void *source, *target;
288 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
289 if (!priv->curve_data)
292 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
293 source = curve_data->data;
294 target = priv->curve_data->data;
295 for (i = 0; i < curve_data->channels; i++) {
296 __le16 *freq = source;
297 source += sizeof(__le16);
298 *((__le16 *)target) = *freq;
299 target += sizeof(__le16);
300 for (j = 0; j < curve_data->points_per_channel; j++) {
301 memcpy(target, source, sizeof(*src));
303 target += sizeof(*dst);
304 source += sizeof(*src);
312 static const char *p54_rf_chips[] = { "NULL", "Duette3", "Duette2",
313 "Frisbee", "Xbow", "Longbow", "NULL", "NULL" };
314 static int p54_init_xbow_synth(struct ieee80211_hw *dev);
316 static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
318 struct p54_common *priv = dev->priv;
319 struct eeprom_pda_wrap *wrap = NULL;
320 struct pda_entry *entry;
321 unsigned int data_len, entry_len;
324 u8 *end = (u8 *)eeprom + len;
327 wrap = (struct eeprom_pda_wrap *) eeprom;
328 entry = (void *)wrap->data + le16_to_cpu(wrap->len);
330 /* verify that at least the entry length/code fits */
331 while ((u8 *)entry <= end - sizeof(*entry)) {
332 entry_len = le16_to_cpu(entry->len);
333 data_len = ((entry_len - 1) << 1);
335 /* abort if entry exceeds whole structure */
336 if ((u8 *)entry + sizeof(*entry) + data_len > end)
339 switch (le16_to_cpu(entry->code)) {
340 case PDR_MAC_ADDRESS:
341 SET_IEEE80211_PERM_ADDR(dev, entry->data);
343 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
349 if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
354 priv->output_limit = kmalloc(entry->data[1] *
355 sizeof(*priv->output_limit), GFP_KERNEL);
357 if (!priv->output_limit) {
362 memcpy(priv->output_limit, &entry->data[2],
363 entry->data[1]*sizeof(*priv->output_limit));
364 priv->output_limit_len = entry->data[1];
366 case PDR_PRISM_PA_CAL_CURVE_DATA: {
367 struct pda_pa_curve_data *curve_data =
368 (struct pda_pa_curve_data *)entry->data;
369 if (data_len < sizeof(*curve_data)) {
374 switch (curve_data->cal_method_rev) {
376 err = p54_convert_rev0(dev, curve_data);
379 err = p54_convert_rev1(dev, curve_data);
382 printk(KERN_ERR "p54: unknown curve data "
384 curve_data->cal_method_rev);
392 case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
393 priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
394 if (!priv->iq_autocal) {
399 memcpy(priv->iq_autocal, entry->data, data_len);
400 priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
402 case PDR_INTERFACE_LIST:
404 while ((u8 *)tmp < entry->data + data_len) {
405 struct bootrec_exp_if *exp_if = tmp;
406 if (le16_to_cpu(exp_if->if_id) == 0xf)
407 synth = le16_to_cpu(exp_if->variant);
408 tmp += sizeof(struct bootrec_exp_if);
411 case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
412 priv->version = *(u8 *)(entry->data + 1);
415 /* make it overrun */
419 printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
420 le16_to_cpu(entry->code));
424 entry = (void *)entry + (entry_len + 1)*2;
427 if (!synth || !priv->iq_autocal || !priv->output_limit ||
429 printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
434 priv->rxhw = synth & 0x07;
436 p54_init_xbow_synth(dev);
438 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
440 dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
442 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
443 u8 perm_addr[ETH_ALEN];
445 printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
446 wiphy_name(dev->wiphy));
447 random_ether_addr(perm_addr);
448 SET_IEEE80211_PERM_ADDR(dev, perm_addr);
451 printk(KERN_INFO "%s: hwaddr %pM, MAC:isl38%02x RF:%s\n",
452 wiphy_name(dev->wiphy),
453 dev->wiphy->perm_addr,
454 priv->version, p54_rf_chips[priv->rxhw]);
459 if (priv->iq_autocal) {
460 kfree(priv->iq_autocal);
461 priv->iq_autocal = NULL;
464 if (priv->output_limit) {
465 kfree(priv->output_limit);
466 priv->output_limit = NULL;
469 if (priv->curve_data) {
470 kfree(priv->curve_data);
471 priv->curve_data = NULL;
474 printk(KERN_ERR "p54: eeprom parse failed!\n");
478 static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
480 /* TODO: get the rssi_add & rssi_mul data from the eeprom */
481 return ((rssi * 0x83) / 64 - 400) / 4;
484 static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
486 struct p54_common *priv = dev->priv;
487 struct p54_rx_data *hdr = (struct p54_rx_data *) skb->data;
488 struct ieee80211_rx_status rx_status = {0};
489 u16 freq = le16_to_cpu(hdr->freq);
490 size_t header_len = sizeof(*hdr);
493 if (!(hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_IN_FCS_GOOD))) {
494 if (priv->filter_flags & FIF_FCSFAIL)
495 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
500 rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
501 rx_status.noise = priv->noise;
503 rx_status.qual = (100 * hdr->rssi) / 127;
504 rx_status.rate_idx = (dev->conf.channel->band == IEEE80211_BAND_2GHZ ?
505 hdr->rate : (hdr->rate - 4)) & 0xf;
506 rx_status.freq = freq;
507 rx_status.band = dev->conf.channel->band;
508 rx_status.antenna = hdr->antenna;
510 tsf32 = le32_to_cpu(hdr->tsf32);
511 if (tsf32 < priv->tsf_low32)
513 rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
514 priv->tsf_low32 = tsf32;
516 rx_status.flag |= RX_FLAG_TSFT;
518 if (hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
519 header_len += hdr->align[0];
521 skb_pull(skb, header_len);
522 skb_trim(skb, le16_to_cpu(hdr->len));
524 ieee80211_rx_irqsafe(dev, skb, &rx_status);
529 static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
531 struct p54_common *priv = dev->priv;
534 if (priv->mode == NL80211_IFTYPE_UNSPECIFIED)
537 for (i = 0; i < dev->queues; i++)
538 if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
539 ieee80211_wake_queue(dev, i);
542 void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb)
544 struct p54_common *priv = dev->priv;
545 struct ieee80211_tx_info *info;
546 struct memrecord *range;
548 u32 freed = 0, last_addr = priv->rx_start;
553 spin_lock_irqsave(&priv->tx_queue.lock, flags);
554 info = IEEE80211_SKB_CB(skb);
555 range = (void *)info->rate_driver_data;
556 if (skb->prev != (struct sk_buff *)&priv->tx_queue) {
557 struct ieee80211_tx_info *ni;
558 struct memrecord *mr;
560 ni = IEEE80211_SKB_CB(skb->prev);
561 mr = (struct memrecord *)ni->rate_driver_data;
562 last_addr = mr->end_addr;
564 if (skb->next != (struct sk_buff *)&priv->tx_queue) {
565 struct ieee80211_tx_info *ni;
566 struct memrecord *mr;
568 ni = IEEE80211_SKB_CB(skb->next);
569 mr = (struct memrecord *)ni->rate_driver_data;
570 freed = mr->start_addr - last_addr;
572 freed = priv->rx_end - last_addr;
573 __skb_unlink(skb, &priv->tx_queue);
574 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
577 if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 +
578 IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
579 p54_wake_free_queues(dev);
581 EXPORT_SYMBOL_GPL(p54_free_skb);
583 static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
585 struct p54_common *priv = dev->priv;
586 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
587 struct p54_frame_sent *payload = (struct p54_frame_sent *) hdr->data;
588 struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
589 u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
590 struct memrecord *range = NULL;
592 u32 last_addr = priv->rx_start;
596 spin_lock_irqsave(&priv->tx_queue.lock, flags);
597 while (entry != (struct sk_buff *)&priv->tx_queue) {
598 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
599 struct p54_hdr *entry_hdr;
600 struct p54_tx_data *entry_data;
603 range = (void *)info->rate_driver_data;
604 if (range->start_addr != addr) {
605 last_addr = range->end_addr;
610 if (entry->next != (struct sk_buff *)&priv->tx_queue) {
611 struct ieee80211_tx_info *ni;
612 struct memrecord *mr;
614 ni = IEEE80211_SKB_CB(entry->next);
615 mr = (struct memrecord *)ni->rate_driver_data;
616 freed = mr->start_addr - last_addr;
618 freed = priv->rx_end - last_addr;
620 last_addr = range->end_addr;
621 __skb_unlink(entry, &priv->tx_queue);
622 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
625 * Clear manually, ieee80211_tx_info_clear_status would
626 * clear the counts too and we need them.
628 memset(&info->status.ampdu_ack_len, 0,
629 sizeof(struct ieee80211_tx_info) -
630 offsetof(struct ieee80211_tx_info, status.ampdu_ack_len));
631 BUILD_BUG_ON(offsetof(struct ieee80211_tx_info,
632 status.ampdu_ack_len) != 23);
634 entry_hdr = (struct p54_hdr *) entry->data;
635 entry_data = (struct p54_tx_data *) entry_hdr->data;
636 if (entry_hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
637 pad = entry_data->align[0];
639 /* walk through the rates array and adjust the counts */
640 count = payload->tries;
641 for (idx = 0; idx < 4; idx++) {
642 if (count >= info->status.rates[idx].count) {
643 count -= info->status.rates[idx].count;
644 } else if (count > 0) {
645 info->status.rates[idx].count = count;
648 info->status.rates[idx].idx = -1;
649 info->status.rates[idx].count = 0;
653 priv->tx_stats[entry_data->hw_queue].len--;
654 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
656 info->flags |= IEEE80211_TX_STAT_ACK;
657 if (payload->status & 0x02)
658 info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
659 info->status.ack_signal = p54_rssi_to_dbm(dev,
660 (int)payload->ack_rssi);
661 skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
662 ieee80211_tx_status_irqsafe(dev, entry);
665 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
668 if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 +
669 IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
670 p54_wake_free_queues(dev);
673 static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
676 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
677 struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
678 struct p54_common *priv = dev->priv;
683 memcpy(priv->eeprom, eeprom->data, le16_to_cpu(eeprom->len));
685 complete(&priv->eeprom_comp);
688 static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
690 struct p54_common *priv = dev->priv;
691 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
692 struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
693 u32 tsf32 = le32_to_cpu(stats->tsf32);
695 if (tsf32 < priv->tsf_low32)
697 priv->tsf_low32 = tsf32;
699 priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
700 priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
701 priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
703 priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
704 complete(&priv->stats_comp);
706 mod_timer(&priv->stats_timer, jiffies + 5 * HZ);
709 static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
711 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
713 switch (le16_to_cpu(hdr->type)) {
714 case P54_CONTROL_TYPE_TXDONE:
715 p54_rx_frame_sent(dev, skb);
717 case P54_CONTROL_TYPE_BBP:
719 case P54_CONTROL_TYPE_STAT_READBACK:
720 p54_rx_stats(dev, skb);
722 case P54_CONTROL_TYPE_EEPROM_READBACK:
723 p54_rx_eeprom_readback(dev, skb);
726 printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
727 wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
734 /* returns zero if skb can be reused */
735 int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
737 u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
740 return p54_rx_control(dev, skb);
742 return p54_rx_data(dev, skb);
744 EXPORT_SYMBOL_GPL(p54_rx);
747 * So, the firmware is somewhat stupid and doesn't know what places in its
748 * memory incoming data should go to. By poking around in the firmware, we
749 * can find some unused memory to upload our packets to. However, data that we
750 * want the card to TX needs to stay intact until the card has told us that
751 * it is done with it. This function finds empty places we can upload to and
752 * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
755 static int p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
756 struct p54_hdr *data, u32 len)
758 struct p54_common *priv = dev->priv;
759 struct sk_buff *entry = priv->tx_queue.next;
760 struct sk_buff *target_skb = NULL;
761 struct ieee80211_tx_info *info;
762 struct memrecord *range;
763 u32 last_addr = priv->rx_start;
764 u32 largest_hole = 0;
765 u32 target_addr = priv->rx_start;
768 len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
773 spin_lock_irqsave(&priv->tx_queue.lock, flags);
774 left = skb_queue_len(&priv->tx_queue);
777 info = IEEE80211_SKB_CB(entry);
778 range = (void *)info->rate_driver_data;
779 hole_size = range->start_addr - last_addr;
780 if (!target_skb && hole_size >= len) {
781 target_skb = entry->prev;
783 target_addr = last_addr;
785 largest_hole = max(largest_hole, hole_size);
786 last_addr = range->end_addr;
789 if (!target_skb && priv->rx_end - last_addr >= len) {
790 target_skb = priv->tx_queue.prev;
791 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
792 if (!skb_queue_empty(&priv->tx_queue)) {
793 info = IEEE80211_SKB_CB(target_skb);
794 range = (void *)info->rate_driver_data;
795 target_addr = range->end_addr;
798 largest_hole = max(largest_hole, priv->rx_end - last_addr);
801 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
802 ieee80211_stop_queues(dev);
806 info = IEEE80211_SKB_CB(skb);
807 range = (void *)info->rate_driver_data;
808 range->start_addr = target_addr;
809 range->end_addr = target_addr + len;
810 __skb_queue_after(&priv->tx_queue, target_skb, skb);
811 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
813 if (largest_hole < priv->headroom + sizeof(struct p54_hdr) +
814 48 + IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
815 ieee80211_stop_queues(dev);
817 data->req_id = cpu_to_le32(target_addr + priv->headroom);
821 static struct sk_buff *p54_alloc_skb(struct ieee80211_hw *dev,
822 u16 hdr_flags, u16 len, u16 type, gfp_t memflags)
824 struct p54_common *priv = dev->priv;
828 skb = __dev_alloc_skb(len + priv->tx_hdr_len, memflags);
831 skb_reserve(skb, priv->tx_hdr_len);
833 hdr = (struct p54_hdr *) skb_put(skb, sizeof(*hdr));
834 hdr->flags = cpu_to_le16(hdr_flags);
835 hdr->len = cpu_to_le16(len - sizeof(*hdr));
836 hdr->type = cpu_to_le16(type);
837 hdr->tries = hdr->rts_tries = 0;
839 if (unlikely(p54_assign_address(dev, skb, hdr, len))) {
846 int p54_read_eeprom(struct ieee80211_hw *dev)
848 struct p54_common *priv = dev->priv;
849 struct p54_hdr *hdr = NULL;
850 struct p54_eeprom_lm86 *eeprom_hdr;
852 size_t eeprom_size = 0x2020, offset = 0, blocksize;
856 skb = p54_alloc_skb(dev, 0x8000, sizeof(*hdr) + sizeof(*eeprom_hdr) +
858 P54_CONTROL_TYPE_EEPROM_READBACK, GFP_KERNEL);
861 priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
864 eeprom = kzalloc(eeprom_size, GFP_KERNEL);
868 eeprom_hdr = (struct p54_eeprom_lm86 *) skb_put(skb,
869 sizeof(*eeprom_hdr) + EEPROM_READBACK_LEN);
871 while (eeprom_size) {
872 blocksize = min(eeprom_size, (size_t)EEPROM_READBACK_LEN);
873 eeprom_hdr->offset = cpu_to_le16(offset);
874 eeprom_hdr->len = cpu_to_le16(blocksize);
875 priv->tx(dev, skb, 0);
877 if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
878 printk(KERN_ERR "%s: device does not respond!\n",
879 wiphy_name(dev->wiphy));
884 memcpy(eeprom + offset, priv->eeprom, blocksize);
886 eeprom_size -= blocksize;
889 ret = p54_parse_eeprom(dev, eeprom, offset);
893 p54_free_skb(dev, skb);
898 EXPORT_SYMBOL_GPL(p54_read_eeprom);
900 static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
902 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
903 struct ieee80211_tx_queue_stats *current_queue;
904 struct p54_common *priv = dev->priv;
906 struct p54_tx_data *txhdr;
912 u8 calculated_tries[4];
913 u8 nrates = 0, nremaining = 8;
915 current_queue = &priv->tx_stats[skb_get_queue_mapping(skb) + 4];
916 if (unlikely(current_queue->len > current_queue->limit))
917 return NETDEV_TX_BUSY;
918 current_queue->len++;
919 current_queue->count++;
920 if (current_queue->len == current_queue->limit)
921 ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
923 padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
926 txhdr = (struct p54_tx_data *) skb_push(skb, sizeof(*txhdr) + padding);
927 hdr = (struct p54_hdr *) skb_push(skb, sizeof(*hdr));
930 hdr->flags = cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN);
932 hdr->flags = cpu_to_le16(0);
933 hdr->len = cpu_to_le16(len);
934 hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1);
935 hdr->rts_tries = info->control.rates[0].count;
938 * we register the rates in perfect order, and
939 * RTS/CTS won't happen on 5 GHz
941 cts_rate = info->control.rts_cts_rate_idx;
943 memset(&txhdr->rateset, 0, sizeof(txhdr->rateset));
945 /* see how many rates got used */
946 for (i = 0; i < 4; i++) {
947 if (info->control.rates[i].idx < 0)
952 /* limit tries to 8/nrates per rate */
953 for (i = 0; i < nrates; i++) {
955 * The magic expression here is equivalent to 8/nrates for
956 * all values that matter, but avoids division and jumps.
957 * Note that nrates can only take the values 1 through 4.
959 calculated_tries[i] = min_t(int, ((15 >> nrates) | 1) + 1,
960 info->control.rates[i].count);
961 nremaining -= calculated_tries[i];
964 /* if there are tries left, distribute from back to front */
965 for (i = nrates - 1; nremaining > 0 && i >= 0; i--) {
966 int tmp = info->control.rates[i].count - calculated_tries[i];
970 /* RC requested more tries at this rate */
972 tmp = min_t(int, tmp, nremaining);
973 calculated_tries[i] += tmp;
978 for (i = 0; i < nrates && ridx < 8; i++) {
979 /* we register the rates in perfect order */
980 rate = info->control.rates[i].idx;
981 if (info->band == IEEE80211_BAND_5GHZ)
984 /* store the count we actually calculated for TX status */
985 info->control.rates[i].count = calculated_tries[i];
987 rc_flags = info->control.rates[i].flags;
988 if (rc_flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) {
992 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
994 else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
996 for (j = 0; j < calculated_tries[i] && ridx < 8; j++) {
997 txhdr->rateset[ridx] = rate;
1002 txhdr->crypt_offset = 0;
1003 txhdr->rts_rate_idx = 0;
1004 txhdr->key_type = 0;
1006 txhdr->hw_queue = skb_get_queue_mapping(skb) + 4;
1007 txhdr->backlog = 32;
1008 memset(txhdr->durations, 0, sizeof(txhdr->durations));
1009 txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
1010 2 : info->antenna_sel_tx - 1;
1011 txhdr->output_power = priv->output_power;
1012 txhdr->cts_rate = cts_rate;
1014 txhdr->align[0] = padding;
1016 /* modifies skb->cb and with it info, so must be last! */
1017 if (unlikely(p54_assign_address(dev, skb, hdr, skb->len))) {
1018 skb_pull(skb, sizeof(*hdr) + sizeof(*txhdr) + padding);
1019 return NETDEV_TX_BUSY;
1021 priv->tx(dev, skb, 0);
1025 static int p54_setup_mac(struct ieee80211_hw *dev, u16 mode, const u8 *bssid)
1027 struct p54_common *priv = dev->priv;
1028 struct sk_buff *skb;
1029 struct p54_setup_mac *setup;
1031 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*setup) +
1032 sizeof(struct p54_hdr), P54_CONTROL_TYPE_SETUP,
1037 setup = (struct p54_setup_mac *) skb_put(skb, sizeof(*setup));
1038 priv->mac_mode = mode;
1039 setup->mac_mode = cpu_to_le16(mode);
1040 memcpy(setup->mac_addr, priv->mac_addr, ETH_ALEN);
1042 memset(setup->bssid, ~0, ETH_ALEN);
1044 memcpy(setup->bssid, bssid, ETH_ALEN);
1045 setup->rx_antenna = priv->rx_antenna;
1046 if (priv->fw_var < 0x500) {
1047 setup->v1.basic_rate_mask = cpu_to_le32(0x15f);
1048 setup->v1.rx_addr = cpu_to_le32(priv->rx_end);
1049 setup->v1.max_rx = cpu_to_le16(priv->rx_mtu);
1050 setup->v1.rxhw = cpu_to_le16(priv->rxhw);
1051 setup->v1.wakeup_timer = cpu_to_le16(500);
1052 setup->v1.unalloc0 = cpu_to_le16(0);
1054 setup->v2.rx_addr = cpu_to_le32(priv->rx_end);
1055 setup->v2.max_rx = cpu_to_le16(priv->rx_mtu);
1056 setup->v2.rxhw = cpu_to_le16(priv->rxhw);
1057 setup->v2.timer = cpu_to_le16(1000);
1058 setup->v2.truncate = cpu_to_le16(48896);
1059 setup->v2.basic_rate_mask = cpu_to_le32(0x15f);
1060 setup->v2.sbss_offset = 0;
1061 setup->v2.mcast_window = 0;
1062 setup->v2.rx_rssi_threshold = 0;
1063 setup->v2.rx_ed_threshold = 0;
1064 setup->v2.ref_clock = cpu_to_le32(644245094);
1065 setup->v2.lpf_bandwidth = cpu_to_le16(65535);
1066 setup->v2.osc_start_delay = cpu_to_le16(65535);
1068 priv->tx(dev, skb, 1);
1072 static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
1074 struct p54_common *priv = dev->priv;
1075 struct sk_buff *skb;
1076 struct p54_scan *chan;
1080 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*chan) +
1081 sizeof(struct p54_hdr), P54_CONTROL_TYPE_SCAN,
1086 chan = (struct p54_scan *) skb_put(skb, sizeof(*chan));
1087 memset(chan->padding1, 0, sizeof(chan->padding1));
1088 chan->mode = cpu_to_le16(P54_SCAN_EXIT);
1089 chan->dwell = cpu_to_le16(0x0);
1091 for (i = 0; i < priv->iq_autocal_len; i++) {
1092 if (priv->iq_autocal[i].freq != freq)
1095 memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
1096 sizeof(*priv->iq_autocal));
1099 if (i == priv->iq_autocal_len)
1102 for (i = 0; i < priv->output_limit_len; i++) {
1103 if (priv->output_limit[i].freq != freq)
1106 chan->val_barker = 0x38;
1107 chan->val_bpsk = chan->dup_bpsk =
1108 priv->output_limit[i].val_bpsk;
1109 chan->val_qpsk = chan->dup_qpsk =
1110 priv->output_limit[i].val_qpsk;
1111 chan->val_16qam = chan->dup_16qam =
1112 priv->output_limit[i].val_16qam;
1113 chan->val_64qam = chan->dup_64qam =
1114 priv->output_limit[i].val_64qam;
1117 if (i == priv->output_limit_len)
1120 entry = priv->curve_data->data;
1121 for (i = 0; i < priv->curve_data->channels; i++) {
1122 if (*((__le16 *)entry) != freq) {
1123 entry += sizeof(__le16);
1124 entry += sizeof(struct p54_pa_curve_data_sample) *
1125 priv->curve_data->points_per_channel;
1129 entry += sizeof(__le16);
1130 chan->pa_points_per_curve =
1131 min(priv->curve_data->points_per_channel, (u8) 8);
1133 memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
1134 chan->pa_points_per_curve);
1138 if (priv->fw_var < 0x500) {
1139 chan->v1.rssical_mul = cpu_to_le16(130);
1140 chan->v1.rssical_add = cpu_to_le16(0xfe70);
1142 chan->v2.rssical_mul = cpu_to_le16(130);
1143 chan->v2.rssical_add = cpu_to_le16(0xfe70);
1144 chan->v2.basic_rate_mask = cpu_to_le32(0x15f);
1145 memset(chan->v2.rts_rates, 0, 8);
1147 priv->tx(dev, skb, 1);
1151 printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
1156 static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
1158 struct p54_common *priv = dev->priv;
1159 struct sk_buff *skb;
1160 struct p54_led *led;
1162 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*led) +
1163 sizeof(struct p54_hdr), P54_CONTROL_TYPE_LED,
1168 led = (struct p54_led *)skb_put(skb, sizeof(*led));
1169 led->mode = cpu_to_le16(mode);
1170 led->led_permanent = cpu_to_le16(link);
1171 led->led_temporary = cpu_to_le16(act);
1172 led->duration = cpu_to_le16(1000);
1173 priv->tx(dev, skb, 1);
1177 #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
1179 queue.aifs = cpu_to_le16(ai_fs); \
1180 queue.cwmin = cpu_to_le16(cw_min); \
1181 queue.cwmax = cpu_to_le16(cw_max); \
1182 queue.txop = cpu_to_le16(_txop); \
1185 static int p54_set_edcf(struct ieee80211_hw *dev)
1187 struct p54_common *priv = dev->priv;
1188 struct sk_buff *skb;
1189 struct p54_edcf *edcf;
1191 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*edcf) +
1192 sizeof(struct p54_hdr), P54_CONTROL_TYPE_DCFINIT,
1197 edcf = (struct p54_edcf *)skb_put(skb, sizeof(*edcf));
1198 if (priv->use_short_slot) {
1201 edcf->eofpad = 0x00;
1203 edcf->slottime = 20;
1205 edcf->eofpad = 0x06;
1207 /* (see prism54/isl_oid.h for further details) */
1208 edcf->frameburst = cpu_to_le16(0);
1209 edcf->round_trip_delay = cpu_to_le16(0);
1210 memset(edcf->mapping, 0, sizeof(edcf->mapping));
1211 memcpy(edcf->queue, priv->qos_params, sizeof(edcf->queue));
1212 priv->tx(dev, skb, 1);
1216 static int p54_init_stats(struct ieee80211_hw *dev)
1218 struct p54_common *priv = dev->priv;
1220 priv->cached_stats = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL,
1221 sizeof(struct p54_hdr) + sizeof(struct p54_statistics),
1222 P54_CONTROL_TYPE_STAT_READBACK, GFP_KERNEL);
1223 if (!priv->cached_stats)
1226 mod_timer(&priv->stats_timer, jiffies + HZ);
1230 static int p54_start(struct ieee80211_hw *dev)
1232 struct p54_common *priv = dev->priv;
1235 err = priv->open(dev);
1237 priv->mode = NL80211_IFTYPE_MONITOR;
1238 P54_SET_QUEUE(priv->qos_params[0], 0x0002, 0x0003, 0x0007, 47);
1239 P54_SET_QUEUE(priv->qos_params[1], 0x0002, 0x0007, 0x000f, 94);
1240 P54_SET_QUEUE(priv->qos_params[2], 0x0003, 0x000f, 0x03ff, 0);
1241 P54_SET_QUEUE(priv->qos_params[3], 0x0007, 0x000f, 0x03ff, 0);
1242 err = p54_set_edcf(dev);
1244 err = p54_init_stats(dev);
1249 static void p54_stop(struct ieee80211_hw *dev)
1251 struct p54_common *priv = dev->priv;
1252 struct sk_buff *skb;
1254 del_timer(&priv->stats_timer);
1255 p54_free_skb(dev, priv->cached_stats);
1256 priv->cached_stats = NULL;
1257 while ((skb = skb_dequeue(&priv->tx_queue)))
1261 priv->tsf_high32 = priv->tsf_low32 = 0;
1262 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1265 static int p54_add_interface(struct ieee80211_hw *dev,
1266 struct ieee80211_if_init_conf *conf)
1268 struct p54_common *priv = dev->priv;
1270 if (priv->mode != NL80211_IFTYPE_MONITOR)
1273 switch (conf->type) {
1274 case NL80211_IFTYPE_STATION:
1275 priv->mode = conf->type;
1281 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
1283 p54_setup_mac(dev, P54_FILTER_TYPE_NONE, NULL);
1285 switch (conf->type) {
1286 case NL80211_IFTYPE_STATION:
1287 p54_setup_mac(dev, P54_FILTER_TYPE_STATION, NULL);
1290 BUG(); /* impossible */
1294 p54_set_leds(dev, 1, 0, 0);
1299 static void p54_remove_interface(struct ieee80211_hw *dev,
1300 struct ieee80211_if_init_conf *conf)
1302 struct p54_common *priv = dev->priv;
1303 priv->mode = NL80211_IFTYPE_MONITOR;
1304 memset(priv->mac_addr, 0, ETH_ALEN);
1305 p54_setup_mac(dev, P54_FILTER_TYPE_NONE, NULL);
1308 static int p54_config(struct ieee80211_hw *dev, u32 changed)
1311 struct p54_common *priv = dev->priv;
1312 struct ieee80211_conf *conf = &dev->conf;
1314 mutex_lock(&priv->conf_mutex);
1315 priv->rx_antenna = 2; /* automatic */
1316 priv->output_power = conf->power_level << 2;
1317 ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
1319 ret = p54_set_edcf(dev);
1320 mutex_unlock(&priv->conf_mutex);
1324 static int p54_config_interface(struct ieee80211_hw *dev,
1325 struct ieee80211_vif *vif,
1326 struct ieee80211_if_conf *conf)
1328 struct p54_common *priv = dev->priv;
1330 mutex_lock(&priv->conf_mutex);
1331 p54_setup_mac(dev, P54_FILTER_TYPE_STATION, conf->bssid);
1332 p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
1333 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
1334 mutex_unlock(&priv->conf_mutex);
1338 static void p54_configure_filter(struct ieee80211_hw *dev,
1339 unsigned int changed_flags,
1340 unsigned int *total_flags,
1341 int mc_count, struct dev_mc_list *mclist)
1343 struct p54_common *priv = dev->priv;
1345 *total_flags &= FIF_BCN_PRBRESP_PROMISC |
1346 FIF_PROMISC_IN_BSS |
1349 priv->filter_flags = *total_flags;
1351 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1352 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1353 p54_setup_mac(dev, priv->mac_mode, NULL);
1355 p54_setup_mac(dev, priv->mac_mode, priv->bssid);
1358 if (changed_flags & FIF_PROMISC_IN_BSS) {
1359 if (*total_flags & FIF_PROMISC_IN_BSS)
1360 p54_setup_mac(dev, priv->mac_mode | 0x8, NULL);
1362 p54_setup_mac(dev, priv->mac_mode & ~0x8, priv->bssid);
1366 static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
1367 const struct ieee80211_tx_queue_params *params)
1369 struct p54_common *priv = dev->priv;
1371 if ((params) && !(queue > 4)) {
1372 P54_SET_QUEUE(priv->qos_params[queue], params->aifs,
1373 params->cw_min, params->cw_max, params->txop);
1377 return p54_set_edcf(dev);
1380 static int p54_init_xbow_synth(struct ieee80211_hw *dev)
1382 struct p54_common *priv = dev->priv;
1383 struct sk_buff *skb;
1384 struct p54_xbow_synth *xbow;
1386 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*xbow) +
1387 sizeof(struct p54_hdr),
1388 P54_CONTROL_TYPE_XBOW_SYNTH_CFG,
1393 xbow = (struct p54_xbow_synth *)skb_put(skb, sizeof(*xbow));
1394 xbow->magic1 = cpu_to_le16(0x1);
1395 xbow->magic2 = cpu_to_le16(0x2);
1396 xbow->freq = cpu_to_le16(5390);
1397 memset(xbow->padding, 0, sizeof(xbow->padding));
1398 priv->tx(dev, skb, 1);
1402 static void p54_statistics_timer(unsigned long data)
1404 struct ieee80211_hw *dev = (struct ieee80211_hw *) data;
1405 struct p54_common *priv = dev->priv;
1407 BUG_ON(!priv->cached_stats);
1409 priv->tx(dev, priv->cached_stats, 0);
1412 static int p54_get_stats(struct ieee80211_hw *dev,
1413 struct ieee80211_low_level_stats *stats)
1415 struct p54_common *priv = dev->priv;
1417 del_timer(&priv->stats_timer);
1418 p54_statistics_timer((unsigned long)dev);
1420 if (!wait_for_completion_interruptible_timeout(&priv->stats_comp, HZ)) {
1421 printk(KERN_ERR "%s: device does not respond!\n",
1422 wiphy_name(dev->wiphy));
1426 memcpy(stats, &priv->stats, sizeof(*stats));
1431 static int p54_get_tx_stats(struct ieee80211_hw *dev,
1432 struct ieee80211_tx_queue_stats *stats)
1434 struct p54_common *priv = dev->priv;
1436 memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
1441 static void p54_bss_info_changed(struct ieee80211_hw *dev,
1442 struct ieee80211_vif *vif,
1443 struct ieee80211_bss_conf *info,
1446 struct p54_common *priv = dev->priv;
1448 if (changed & BSS_CHANGED_ERP_SLOT) {
1449 priv->use_short_slot = info->use_short_slot;
1454 static const struct ieee80211_ops p54_ops = {
1458 .add_interface = p54_add_interface,
1459 .remove_interface = p54_remove_interface,
1460 .config = p54_config,
1461 .config_interface = p54_config_interface,
1462 .bss_info_changed = p54_bss_info_changed,
1463 .configure_filter = p54_configure_filter,
1464 .conf_tx = p54_conf_tx,
1465 .get_stats = p54_get_stats,
1466 .get_tx_stats = p54_get_tx_stats
1469 struct ieee80211_hw *p54_init_common(size_t priv_data_len)
1471 struct ieee80211_hw *dev;
1472 struct p54_common *priv;
1474 dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
1479 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1480 skb_queue_head_init(&priv->tx_queue);
1481 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
1482 IEEE80211_HW_RX_INCLUDES_FCS |
1483 IEEE80211_HW_SIGNAL_DBM |
1484 IEEE80211_HW_NOISE_DBM;
1487 * XXX: when this driver gets support for any mode that
1488 * requires beacons (AP, MESH, IBSS) then it must
1489 * implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1491 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1493 dev->channel_change_time = 1000; /* TODO: find actual value */
1494 priv->tx_stats[0].limit = 1;
1495 priv->tx_stats[1].limit = 1;
1496 priv->tx_stats[2].limit = 1;
1497 priv->tx_stats[3].limit = 1;
1498 priv->tx_stats[4].limit = 5;
1502 * We support at most 8 tries no matter which rate they're at,
1503 * we cannot support max_rates * max_rate_tries as we set it
1504 * here, but setting it correctly to 4/2 or so would limit us
1505 * artificially if the RC algorithm wants just two rates, so
1506 * let's say 4/7, we'll redistribute it at TX time, see the
1510 dev->max_rate_tries = 7;
1511 dev->extra_tx_headroom = sizeof(struct p54_hdr) + 4 +
1512 sizeof(struct p54_tx_data);
1514 mutex_init(&priv->conf_mutex);
1515 init_completion(&priv->eeprom_comp);
1516 init_completion(&priv->stats_comp);
1517 setup_timer(&priv->stats_timer, p54_statistics_timer,
1518 (unsigned long)dev);
1522 EXPORT_SYMBOL_GPL(p54_init_common);
1524 void p54_free_common(struct ieee80211_hw *dev)
1526 struct p54_common *priv = dev->priv;
1527 del_timer(&priv->stats_timer);
1528 kfree_skb(priv->cached_stats);
1529 kfree(priv->iq_autocal);
1530 kfree(priv->output_limit);
1531 kfree(priv->curve_data);
1533 EXPORT_SYMBOL_GPL(p54_free_common);
1535 static int __init p54_init(void)
1540 static void __exit p54_exit(void)
1544 module_init(p54_init);
1545 module_exit(p54_exit);