2 * linux/arch/arm/mach-omap2/id.c
4 * OMAP2 CPU identification code
6 * Copyright (C) 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
20 #if defined(CONFIG_ARCH_OMAP2420)
21 #define OMAP24XX_TAP_BASE io_p2v(0x48014000)
24 #if defined(CONFIG_ARCH_OMAP2430)
25 #define OMAP24XX_TAP_BASE io_p2v(0x4900A000)
28 #define OMAP_TAP_IDCODE 0x0204
29 #define OMAP_TAP_PROD_ID 0x0208
31 #define OMAP_TAP_DIE_ID_0 0x0218
32 #define OMAP_TAP_DIE_ID_1 0x021C
33 #define OMAP_TAP_DIE_ID_2 0x0220
34 #define OMAP_TAP_DIE_ID_3 0x0224
36 /* system_rev fields for OMAP2 processors:
37 * CPU id bits [31:16],
38 * CPU device type [15:12], (unprg,normal,POP)
39 * CPU revision [11:08]
40 * CPU class bits [07:00]
44 u16 hawkeye; /* Silicon type (Hawkeye id) */
45 u8 dev; /* Device type from production_id reg */
46 u32 type; /* combined type id copied to system_rev */
49 /* Register values to detect the OMAP version */
50 static struct omap_id omap_ids[] __initdata = {
51 { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200000 },
52 { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201000 },
53 { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202000 },
54 { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220000 },
55 { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230000 },
56 { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300000 },
59 static u32 __init read_tap_reg(int reg)
61 return __raw_readl(OMAP24XX_TAP_BASE + reg);
64 void __init omap2_check_revision(void)
73 idcode = read_tap_reg(OMAP_TAP_IDCODE);
74 prod_id = read_tap_reg(OMAP_TAP_PROD_ID);
75 hawkeye = (idcode >> 12) & 0xffff;
76 rev = (idcode >> 28) & 0x0f;
77 dev_type = (prod_id >> 16) & 0x0f;
80 printk(KERN_DEBUG "OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
81 idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
82 printk(KERN_DEBUG "OMAP_TAP_DIE_ID_0: 0x%08x\n",
83 read_tap_reg(OMAP_TAP_DIE_ID_0));
84 printk(KERN_DEBUG "OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
85 read_tap_reg(OMAP_TAP_DIE_ID_1),
86 (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf);
87 printk(KERN_DEBUG "OMAP_TAP_DIE_ID_2: 0x%08x\n",
88 read_tap_reg(OMAP_TAP_DIE_ID_2));
89 printk(KERN_DEBUG "OMAP_TAP_DIE_ID_3: 0x%08x\n",
90 read_tap_reg(OMAP_TAP_DIE_ID_3));
91 printk(KERN_DEBUG "OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
95 /* Check hawkeye ids */
96 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
97 if (hawkeye == omap_ids[i].hawkeye)
101 if (i == ARRAY_SIZE(omap_ids)) {
102 printk(KERN_ERR "Unknown OMAP CPU id\n");
106 for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
107 if (dev_type == omap_ids[j].dev)
111 if (j == ARRAY_SIZE(omap_ids)) {
112 printk(KERN_ERR "Unknown OMAP device type. "
113 "Handling it as OMAP%04x\n",
114 omap_ids[i].type >> 16);
117 system_rev = omap_ids[j].type;
119 system_rev |= rev << 8;
121 /* Add the cpu class info (24xx) */
124 pr_info("OMAP%04x", system_rev >> 16);
125 if ((system_rev >> 8) & 0x0f)
126 printk("%x", (system_rev >> 8) & 0x0f);