3 * TI 3410/5052 USB Serial Driver Header
5 * Copyright (C) 2004 Texas Instruments
7 * This driver is based on the Linux io_ti driver, which is
8 * Copyright (C) 2000-2002 Inside Out Networks
9 * Copyright (C) 2001-2002 Greg Kroah-Hartman
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * For questions or problems with this driver, contact Texas Instruments
17 * technical support, or Al Borchers <alborchers@steinerpoint.com>, or
18 * Peter Berger <pberger@brimson.com>.
21 #ifndef _TI_3410_5052_H_
22 #define _TI_3410_5052_H_
24 /* Configuration ids */
25 #define TI_BOOT_CONFIG 1
26 #define TI_ACTIVE_CONFIG 2
28 /* Vendor and product ids */
29 #define TI_VENDOR_ID 0x0451
30 #define TI_3410_PRODUCT_ID 0x3410
31 #define TI_3410_EZ430_ID 0xF430 /* TI ez430 development tool */
32 #define TI_5052_BOOT_PRODUCT_ID 0x5052 /* no EEPROM, no firmware */
33 #define TI_5152_BOOT_PRODUCT_ID 0x5152 /* no EEPROM, no firmware */
34 #define TI_5052_EEPROM_PRODUCT_ID 0x505A /* EEPROM, no firmware */
35 #define TI_5052_FIRMWARE_PRODUCT_ID 0x505F /* firmware is running */
37 /* Multi-Tech vendor and product ids */
38 #define MTS_VENDOR_ID 0x06E0
39 #define MTS_GSM_NO_FW_PRODUCT_ID 0xF108
40 #define MTS_CDMA_NO_FW_PRODUCT_ID 0xF109
41 #define MTS_CDMA_PRODUCT_ID 0xF110
42 #define MTS_GSM_PRODUCT_ID 0xF111
43 #define MTS_EDGE_PRODUCT_ID 0xF112
46 #define TI_GET_VERSION 0x01
47 #define TI_GET_PORT_STATUS 0x02
48 #define TI_GET_PORT_DEV_INFO 0x03
49 #define TI_GET_CONFIG 0x04
50 #define TI_SET_CONFIG 0x05
51 #define TI_OPEN_PORT 0x06
52 #define TI_CLOSE_PORT 0x07
53 #define TI_START_PORT 0x08
54 #define TI_STOP_PORT 0x09
55 #define TI_TEST_PORT 0x0A
56 #define TI_PURGE_PORT 0x0B
57 #define TI_RESET_EXT_DEVICE 0x0C
58 #define TI_WRITE_DATA 0x80
59 #define TI_READ_DATA 0x81
60 #define TI_REQ_TYPE_CLASS 0x82
62 /* Module identifiers */
63 #define TI_I2C_PORT 0x01
64 #define TI_IEEE1284_PORT 0x02
65 #define TI_UART1_PORT 0x03
66 #define TI_UART2_PORT 0x04
67 #define TI_RAM_PORT 0x05
70 #define TI_MSR_DELTA_CTS 0x01
71 #define TI_MSR_DELTA_DSR 0x02
72 #define TI_MSR_DELTA_RI 0x04
73 #define TI_MSR_DELTA_CD 0x08
74 #define TI_MSR_CTS 0x10
75 #define TI_MSR_DSR 0x20
76 #define TI_MSR_RI 0x40
77 #define TI_MSR_CD 0x80
78 #define TI_MSR_DELTA_MASK 0x0F
79 #define TI_MSR_MASK 0xF0
82 #define TI_LSR_OVERRUN_ERROR 0x01
83 #define TI_LSR_PARITY_ERROR 0x02
84 #define TI_LSR_FRAMING_ERROR 0x04
85 #define TI_LSR_BREAK 0x08
86 #define TI_LSR_ERROR 0x0F
87 #define TI_LSR_RX_FULL 0x10
88 #define TI_LSR_TX_EMPTY 0x20
91 #define TI_LCR_BREAK 0x40
94 #define TI_MCR_LOOP 0x04
95 #define TI_MCR_DTR 0x10
96 #define TI_MCR_RTS 0x20
99 #define TI_UART_ENABLE_RTS_IN 0x0001
100 #define TI_UART_DISABLE_RTS 0x0002
101 #define TI_UART_ENABLE_PARITY_CHECKING 0x0008
102 #define TI_UART_ENABLE_DSR_OUT 0x0010
103 #define TI_UART_ENABLE_CTS_OUT 0x0020
104 #define TI_UART_ENABLE_X_OUT 0x0040
105 #define TI_UART_ENABLE_XA_OUT 0x0080
106 #define TI_UART_ENABLE_X_IN 0x0100
107 #define TI_UART_ENABLE_DTR_IN 0x0800
108 #define TI_UART_DISABLE_DTR 0x1000
109 #define TI_UART_ENABLE_MS_INTS 0x2000
110 #define TI_UART_ENABLE_AUTO_START_DMA 0x4000
113 #define TI_UART_NO_PARITY 0x00
114 #define TI_UART_ODD_PARITY 0x01
115 #define TI_UART_EVEN_PARITY 0x02
116 #define TI_UART_MARK_PARITY 0x03
117 #define TI_UART_SPACE_PARITY 0x04
120 #define TI_UART_1_STOP_BITS 0x00
121 #define TI_UART_1_5_STOP_BITS 0x01
122 #define TI_UART_2_STOP_BITS 0x02
124 /* Bits per character */
125 #define TI_UART_5_DATA_BITS 0x00
126 #define TI_UART_6_DATA_BITS 0x01
127 #define TI_UART_7_DATA_BITS 0x02
128 #define TI_UART_8_DATA_BITS 0x03
131 #define TI_UART_232 0x00
132 #define TI_UART_485_RECEIVER_DISABLED 0x01
133 #define TI_UART_485_RECEIVER_ENABLED 0x02
135 /* Pipe transfer mode and timeout */
136 #define TI_PIPE_MODE_CONTINOUS 0x01
137 #define TI_PIPE_MODE_MASK 0x03
138 #define TI_PIPE_TIMEOUT_MASK 0x7C
139 #define TI_PIPE_TIMEOUT_ENABLE 0x80
142 struct ti_uart_config {
151 } __attribute__((packed));
153 /* Get port status */
154 struct ti_port_status {
160 } __attribute__((packed));
163 #define TI_PURGE_OUTPUT 0x00
164 #define TI_PURGE_INPUT 0x80
166 /* Read/Write data */
167 #define TI_RW_DATA_ADDR_SFR 0x10
168 #define TI_RW_DATA_ADDR_IDATA 0x20
169 #define TI_RW_DATA_ADDR_XDATA 0x30
170 #define TI_RW_DATA_ADDR_CODE 0x40
171 #define TI_RW_DATA_ADDR_GPIO 0x50
172 #define TI_RW_DATA_ADDR_I2C 0x60
173 #define TI_RW_DATA_ADDR_FLASH 0x70
174 #define TI_RW_DATA_ADDR_DSP 0x80
176 #define TI_RW_DATA_UNSPECIFIED 0x00
177 #define TI_RW_DATA_BYTE 0x01
178 #define TI_RW_DATA_WORD 0x02
179 #define TI_RW_DATA_DOUBLE_WORD 0x04
181 struct ti_write_data_bytes {
188 } __attribute__((packed));
190 struct ti_read_data_request {
196 } __attribute__((packed));
198 struct ti_read_data_bytes {
203 } __attribute__((packed));
205 /* Interrupt struct */
206 struct ti_interrupt {
209 } __attribute__((packed));
211 /* Interrupt codes */
212 #define TI_GET_PORT_FROM_CODE(c) (((c) >> 4) - 3)
213 #define TI_GET_FUNC_FROM_CODE(c) ((c) & 0x0f)
214 #define TI_CODE_HARDWARE_ERROR 0xFF
215 #define TI_CODE_DATA_ERROR 0x03
216 #define TI_CODE_MODEM_STATUS 0x04
218 /* Download firmware max packet size */
219 #define TI_DOWNLOAD_MAX_PACKET_SIZE 64
221 /* Firmware image header */
222 struct ti_firmware_header {
225 } __attribute__((packed));
228 #define TI_UART1_BASE_ADDR 0xFFA0 /* UART 1 base address */
229 #define TI_UART2_BASE_ADDR 0xFFB0 /* UART 2 base address */
230 #define TI_UART_OFFSET_LCR 0x0002 /* UART MCR register offset */
231 #define TI_UART_OFFSET_MCR 0x0004 /* UART MCR register offset */
233 #endif /* _TI_3410_5052_H_ */