2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Code to handle x86 style IRQs plus some generic interrupt stuff.
8 * Copyright (C) 1992 Linus Torvalds
9 * Copyright (C) 1994 - 2000 Ralf Baechle
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <linux/ioport.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/spinlock.h>
17 #include <linux/sysdev.h>
19 #include <asm/i8259.h>
22 void enable_8259A_irq(unsigned int irq);
23 void disable_8259A_irq(unsigned int irq);
26 * This is the 'legacy' 8259A Programmable Interrupt Controller,
27 * present in the majority of PC/AT boxes.
28 * plus some generic x86 specific things if generic specifics makes
30 * this file should become arch/i386/kernel/irq.c when the old irq.c
31 * moves to arch independent land
34 spinlock_t DEFINE_SPINLOCK(i8259A_lock);
36 static void end_8259A_irq (unsigned int irq)
38 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) &&
40 enable_8259A_irq(irq);
43 #define shutdown_8259A_irq disable_8259A_irq
45 void mask_and_ack_8259A(unsigned int);
47 static unsigned int startup_8259A_irq(unsigned int irq)
49 enable_8259A_irq(irq);
51 return 0; /* never anything pending */
54 static struct hw_interrupt_type i8259A_irq_type = {
56 .startup = startup_8259A_irq,
57 .shutdown = shutdown_8259A_irq,
58 .enable = enable_8259A_irq,
59 .disable = disable_8259A_irq,
60 .ack = mask_and_ack_8259A,
65 * 8259A PIC functions to handle ISA devices:
69 * This contains the irq mask for both 8259A irq controllers,
71 static unsigned int cached_irq_mask = 0xffff;
73 #define cached_21 (cached_irq_mask)
74 #define cached_A1 (cached_irq_mask >> 8)
76 void disable_8259A_irq(unsigned int irq)
78 unsigned int mask = 1 << irq;
81 spin_lock_irqsave(&i8259A_lock, flags);
82 cached_irq_mask |= mask;
87 spin_unlock_irqrestore(&i8259A_lock, flags);
90 void enable_8259A_irq(unsigned int irq)
92 unsigned int mask = ~(1 << irq);
95 spin_lock_irqsave(&i8259A_lock, flags);
96 cached_irq_mask &= mask;
100 outb(cached_21,0x21);
101 spin_unlock_irqrestore(&i8259A_lock, flags);
104 int i8259A_irq_pending(unsigned int irq)
106 unsigned int mask = 1 << irq;
110 spin_lock_irqsave(&i8259A_lock, flags);
112 ret = inb(0x20) & mask;
114 ret = inb(0xA0) & (mask >> 8);
115 spin_unlock_irqrestore(&i8259A_lock, flags);
120 void make_8259A_irq(unsigned int irq)
122 disable_irq_nosync(irq);
123 irq_desc[irq].handler = &i8259A_irq_type;
128 * This function assumes to be called rarely. Switching between
129 * 8259A registers is slow.
130 * This has to be protected by the irq controller spinlock
131 * before being called.
133 static inline int i8259A_irq_real(unsigned int irq)
136 int irqmask = 1 << irq;
139 outb(0x0B,0x20); /* ISR register */
140 value = inb(0x20) & irqmask;
141 outb(0x0A,0x20); /* back to the IRR register */
144 outb(0x0B,0xA0); /* ISR register */
145 value = inb(0xA0) & (irqmask >> 8);
146 outb(0x0A,0xA0); /* back to the IRR register */
151 * Careful! The 8259A is a fragile beast, it pretty
152 * much _has_ to be done exactly like this (mask it
153 * first, _then_ send the EOI, and the order of EOI
154 * to the two 8259s is important!
156 void mask_and_ack_8259A(unsigned int irq)
158 unsigned int irqmask = 1 << irq;
161 spin_lock_irqsave(&i8259A_lock, flags);
163 * Lightweight spurious IRQ detection. We do not want to overdo
164 * spurious IRQ handling - it's usually a sign of hardware problems, so
165 * we only do the checks we can do without slowing down good hardware
168 * Note that IRQ7 and IRQ15 (the two spurious IRQs usually resulting
169 * rom the 8259A-1|2 PICs) occur even if the IRQ is masked in the 8259A.
170 * Thus we can check spurious 8259A IRQs without doing the quite slow
171 * i8259A_irq_real() call for every IRQ. This does not cover 100% of
172 * spurious interrupts, but should be enough to warn the user that
173 * there is something bad going on ...
175 if (cached_irq_mask & irqmask)
176 goto spurious_8259A_irq;
177 cached_irq_mask |= irqmask;
181 inb(0xA1); /* DUMMY - (do we need this?) */
182 outb(cached_A1,0xA1);
183 outb(0x60+(irq&7),0xA0);/* 'Specific EOI' to slave */
184 outb(0x62,0x20); /* 'Specific EOI' to master-IRQ2 */
186 inb(0x21); /* DUMMY - (do we need this?) */
187 outb(cached_21,0x21);
188 outb(0x60+irq,0x20); /* 'Specific EOI' to master */
190 spin_unlock_irqrestore(&i8259A_lock, flags);
195 * this is the slow path - should happen rarely.
197 if (i8259A_irq_real(irq))
199 * oops, the IRQ _is_ in service according to the
200 * 8259A - not spurious, go handle it.
202 goto handle_real_irq;
205 static int spurious_irq_mask = 0;
207 * At this point we can be sure the IRQ is spurious,
208 * lets ACK and report it. [once per IRQ]
210 if (!(spurious_irq_mask & irqmask)) {
211 printk(KERN_DEBUG "spurious 8259A interrupt: IRQ%d.\n", irq);
212 spurious_irq_mask |= irqmask;
214 atomic_inc(&irq_err_count);
216 * Theoretically we do not have to handle this IRQ,
217 * but in Linux this does not cause problems and is
220 goto handle_real_irq;
224 static int i8259A_resume(struct sys_device *dev)
230 static struct sysdev_class i8259_sysdev_class = {
231 set_kset_name("i8259"),
232 .resume = i8259A_resume,
235 static struct sys_device device_i8259A = {
237 .cls = &i8259_sysdev_class,
240 static int __init i8259A_init_sysfs(void)
242 int error = sysdev_class_register(&i8259_sysdev_class);
244 error = sysdev_register(&device_i8259A);
248 device_initcall(i8259A_init_sysfs);
250 void __init init_8259A(int auto_eoi)
254 spin_lock_irqsave(&i8259A_lock, flags);
256 outb(0xff, 0x21); /* mask all of 8259A-1 */
257 outb(0xff, 0xA1); /* mask all of 8259A-2 */
260 * outb_p - this has to work on a wide range of PC hardware.
262 outb_p(0x11, 0x20); /* ICW1: select 8259A-1 init */
263 outb_p(0x00, 0x21); /* ICW2: 8259A-1 IR0-7 mapped to 0x00-0x07 */
264 outb_p(0x04, 0x21); /* 8259A-1 (the master) has a slave on IR2 */
266 outb_p(0x03, 0x21); /* master does Auto EOI */
268 outb_p(0x01, 0x21); /* master expects normal EOI */
270 outb_p(0x11, 0xA0); /* ICW1: select 8259A-2 init */
271 outb_p(0x08, 0xA1); /* ICW2: 8259A-2 IR0-7 mapped to 0x08-0x0f */
272 outb_p(0x02, 0xA1); /* 8259A-2 is a slave on master's IR2 */
273 outb_p(0x01, 0xA1); /* (slave's support for AEOI in flat mode
274 is to be investigated) */
278 * in AEOI mode we just have to mask the interrupt
281 i8259A_irq_type.ack = disable_8259A_irq;
283 i8259A_irq_type.ack = mask_and_ack_8259A;
285 udelay(100); /* wait for 8259A to initialize */
287 outb(cached_21, 0x21); /* restore master IRQ mask */
288 outb(cached_A1, 0xA1); /* restore slave IRQ mask */
290 spin_unlock_irqrestore(&i8259A_lock, flags);
294 * IRQ2 is cascade interrupt to second interrupt controller
296 static struct irqaction irq2 = {
297 no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL
300 static struct resource pic1_io_resource = {
301 "pic1", 0x20, 0x3f, IORESOURCE_BUSY
304 static struct resource pic2_io_resource = {
305 "pic2", 0xa0, 0xbf, IORESOURCE_BUSY
309 * On systems with i8259-style interrupt controllers we assume for
310 * driver compatibility reasons interrupts 0 - 15 to be the i8259
311 * interrupts even if the hardware uses a different interrupt numbering.
313 void __init init_i8259_irqs (void)
317 request_resource(&ioport_resource, &pic1_io_resource);
318 request_resource(&ioport_resource, &pic2_io_resource);
322 for (i = 0; i < 16; i++) {
323 irq_desc[i].status = IRQ_DISABLED;
324 irq_desc[i].action = NULL;
325 irq_desc[i].depth = 1;
326 irq_desc[i].handler = &i8259A_irq_type;