git.oblomov.eu Git - linux-2.6/blob - sound/pci/emu10k1/emu10k1_main.c

   1 /*
   2  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
   3  *                   Creative Labs, Inc.
   4  *  Routines for control of EMU10K1 chips
   5  *
   6  *  Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
   7  *      Added support for Audigy 2 Value.
   8  *      Added EMU 1010 support.
   9  *      General bug fixes and enhancements.
  10  *
  11  *
  12  *  BUGS:
  13  *    --
  14  *
  15  *  TODO:
  16  *    --
  17  *
  18  *   This program is free software; you can redistribute it and/or modify
  19  *   it under the terms of the GNU General Public License as published by
  20  *   the Free Software Foundation; either version 2 of the License, or
  21  *   (at your option) any later version.
  22  *
  23  *   This program is distributed in the hope that it will be useful,
  24  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  *   GNU General Public License for more details.
  27  *
  28  *   You should have received a copy of the GNU General Public License
  29  *   along with this program; if not, write to the Free Software
  30  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  31  *
  32  */
  33
  34 #include <linux/sched.h>
  35 #include <linux/kthread.h>
  36 #include <linux/delay.h>
  37 #include <linux/init.h>
  38 #include <linux/interrupt.h>
  39 #include <linux/pci.h>
  40 #include <linux/slab.h>
  41 #include <linux/vmalloc.h>
  42 #include <linux/mutex.h>
  43
  44
  45 #include <sound/core.h>
  46 #include <sound/emu10k1.h>
  47 #include <linux/firmware.h>
  48 #include "p16v.h"
  49 #include "tina2.h"
  50 #include "p17v.h"
  51
  52
  53 #define HANA_FILENAME "emu/hana.fw"
  54 #define DOCK_FILENAME "emu/audio_dock.fw"
  55 #define EMU1010B_FILENAME "emu/emu1010b.fw"
  56 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
  57 #define EMU0404_FILENAME "emu/emu0404.fw"
  58 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
  59
  60 MODULE_FIRMWARE(HANA_FILENAME);
  61 MODULE_FIRMWARE(DOCK_FILENAME);
  62 MODULE_FIRMWARE(EMU1010B_FILENAME);
  63 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
  64 MODULE_FIRMWARE(EMU0404_FILENAME);
  65 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
  66
  67
  68 /*************************************************************************
  69  * EMU10K1 init / done
  70  *************************************************************************/
  71
  72 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
  73 {
  74         snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
  75         snd_emu10k1_ptr_write(emu, IP, ch, 0);
  76         snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
  77         snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
  78         snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
  79         snd_emu10k1_ptr_write(emu, CPF, ch, 0);
  80         snd_emu10k1_ptr_write(emu, CCR, ch, 0);
  81
  82         snd_emu10k1_ptr_write(emu, PSST, ch, 0);
  83         snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
  84         snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
  85         snd_emu10k1_ptr_write(emu, Z1, ch, 0);
  86         snd_emu10k1_ptr_write(emu, Z2, ch, 0);
  87         snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
  88
  89         snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
  90         snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
  91         snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
  92         snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
  93         snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
  94         snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24);    /* 1 Hz */
  95         snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24);    /* 1 Hz */
  96         snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
  97
  98         /*** these are last so OFF prevents writing ***/
  99         snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
 100         snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
 101         snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
 102         snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
 103         snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
 104
 105         /* Audigy extra stuffs */
 106         if (emu->audigy) {
 107                 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
 108                 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
 109                 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
 110                 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
 111                 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
 112                 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
 113                 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
 114         }
 115 }
 116
 117 static unsigned int spi_dac_init[] = {
 118                 0x00ff,
 119                 0x02ff,
 120                 0x0400,
 121                 0x0520,
 122                 0x0600,
 123                 0x08ff,
 124                 0x0aff,
 125                 0x0cff,
 126                 0x0eff,
 127                 0x10ff,
 128                 0x1200,
 129                 0x1400,
 130                 0x1480,
 131                 0x1800,
 132                 0x1aff,
 133                 0x1cff,
 134                 0x1e00,
 135                 0x0530,
 136                 0x0602,
 137                 0x0622,
 138                 0x1400,
 139 };
 140
 141 static unsigned int i2c_adc_init[][2] = {
 142         { 0x17, 0x00 }, /* Reset */
 143         { 0x07, 0x00 }, /* Timeout */
 144         { 0x0b, 0x22 },  /* Interface control */
 145         { 0x0c, 0x22 },  /* Master mode control */
 146         { 0x0d, 0x08 },  /* Powerdown control */
 147         { 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
 148         { 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
 149         { 0x10, 0x7b },  /* ALC Control 1 */
 150         { 0x11, 0x00 },  /* ALC Control 2 */
 151         { 0x12, 0x32 },  /* ALC Control 3 */
 152         { 0x13, 0x00 },  /* Noise gate control */
 153         { 0x14, 0xa6 },  /* Limiter control */
 154         { 0x15, ADC_MUX_2 },  /* ADC Mixer control. Mic for A2ZS Notebook */
 155 };
 156
 157 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
 158 {
 159         unsigned int silent_page;
 160         int ch;
 161         u32 tmp;
 162
 163         /* disable audio and lock cache */
 164         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
 165                 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
 166
 167         /* reset recording buffers */
 168         snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
 169         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 170         snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
 171         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 172         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 173         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 174
 175         /* disable channel interrupt */
 176         outl(0, emu->port + INTE);
 177         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 178         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 179         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 180         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 181
 182         if (emu->audigy) {
 183                 /* set SPDIF bypass mode */
 184                 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
 185                 /* enable rear left + rear right AC97 slots */
 186                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
 187                                       AC97SLOT_REAR_LEFT);
 188         }
 189
 190         /* init envelope engine */
 191         for (ch = 0; ch < NUM_G; ch++)
 192                 snd_emu10k1_voice_init(emu, ch);
 193
 194         snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
 195         snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
 196         snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
 197
 198         if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 199                 /* Hacks for Alice3 to work independent of haP16V driver */
 200                 /* Setup SRCMulti_I2S SamplingRate */
 201                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 202                 tmp &= 0xfffff1ff;
 203                 tmp |= (0x2<<9);
 204                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 205
 206                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 207                 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
 208                 /* Setup SRCMulti Input Audio Enable */
 209                 /* Use 0xFFFFFFFF to enable P16V sounds. */
 210                 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
 211
 212                 /* Enabled Phased (8-channel) P16V playback */
 213                 outl(0x0201, emu->port + HCFG2);
 214                 /* Set playback routing. */
 215                 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
 216         }
 217         if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
 218                 /* Hacks for Alice3 to work independent of haP16V driver */
 219                 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
 220                 /* Setup SRCMulti_I2S SamplingRate */
 221                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 222                 tmp &= 0xfffff1ff;
 223                 tmp |= (0x2<<9);
 224                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 225
 226                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 227                 outl(0x600000, emu->port + 0x20);
 228                 outl(0x14, emu->port + 0x24);
 229
 230                 /* Setup SRCMulti Input Audio Enable */
 231                 outl(0x7b0000, emu->port + 0x20);
 232                 outl(0xFF000000, emu->port + 0x24);
 233
 234                 /* Setup SPDIF Out Audio Enable */
 235                 /* The Audigy 2 Value has a separate SPDIF out,
 236                  * so no need for a mixer switch
 237                  */
 238                 outl(0x7a0000, emu->port + 0x20);
 239                 outl(0xFF000000, emu->port + 0x24);
 240                 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
 241                 outl(tmp, emu->port + A_IOCFG);
 242         }
 243         if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
 244                 int size, n;
 245
 246                 size = ARRAY_SIZE(spi_dac_init);
 247                 for (n = 0; n < size; n++)
 248                         snd_emu10k1_spi_write(emu, spi_dac_init[n]);
 249
 250                 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
 251                 /* Enable GPIOs
 252                  * GPIO0: Unknown
 253                  * GPIO1: Speakers-enabled.
 254                  * GPIO2: Unknown
 255                  * GPIO3: Unknown
 256                  * GPIO4: IEC958 Output on.
 257                  * GPIO5: Unknown
 258                  * GPIO6: Unknown
 259                  * GPIO7: Unknown
 260                  */
 261                 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
 262         }
 263         if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
 264                 int size, n;
 265
 266                 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
 267                 tmp = inl(emu->port + A_IOCFG);
 268                 outl(tmp | 0x4, emu->port + A_IOCFG);  /* Set bit 2 for mic input */
 269                 tmp = inl(emu->port + A_IOCFG);
 270                 size = ARRAY_SIZE(i2c_adc_init);
 271                 for (n = 0; n < size; n++)
 272                         snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
 273                 for (n = 0; n < 4; n++) {
 274                         emu->i2c_capture_volume[n][0] = 0xcf;
 275                         emu->i2c_capture_volume[n][1] = 0xcf;
 276                 }
 277         }
 278
 279
 280         snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
 281         snd_emu10k1_ptr_write(emu, TCB, 0, 0);  /* taken from original driver */
 282         snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
 283
 284         silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
 285         for (ch = 0; ch < NUM_G; ch++) {
 286                 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
 287                 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
 288         }
 289
 290         if (emu->card_capabilities->emu_model) {
 291                 outl(HCFG_AUTOMUTE_ASYNC |
 292                         HCFG_EMU32_SLAVE |
 293                         HCFG_AUDIOENABLE, emu->port + HCFG);
 294         /*
 295          *  Hokay, setup HCFG
 296          *   Mute Disable Audio = 0
 297          *   Lock Tank Memory = 1
 298          *   Lock Sound Memory = 0
 299          *   Auto Mute = 1
 300          */
 301         } else if (emu->audigy) {
 302                 if (emu->revision == 4) /* audigy2 */
 303                         outl(HCFG_AUDIOENABLE |
 304                              HCFG_AC3ENABLE_CDSPDIF |
 305                              HCFG_AC3ENABLE_GPSPDIF |
 306                              HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 307                 else
 308                         outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 309         /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
 310          * e.g. card_capabilities->joystick */
 311         } else if (emu->model == 0x20 ||
 312             emu->model == 0xc400 ||
 313             (emu->model == 0x21 && emu->revision < 6))
 314                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
 315         else
 316                 /* With on-chip joystick */
 317                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 318
 319         if (enable_ir) {        /* enable IR for SB Live */
 320                 if (emu->card_capabilities->emu_model) {
 321                         ;  /* Disable all access to A_IOCFG for the emu1010 */
 322                 } else if (emu->card_capabilities->i2c_adc) {
 323                         ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 324                 } else if (emu->audigy) {
 325                         unsigned int reg = inl(emu->port + A_IOCFG);
 326                         outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 327                         udelay(500);
 328                         outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 329                         udelay(100);
 330                         outl(reg, emu->port + A_IOCFG);
 331                 } else {
 332                         unsigned int reg = inl(emu->port + HCFG);
 333                         outl(reg | HCFG_GPOUT2, emu->port + HCFG);
 334                         udelay(500);
 335                         outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
 336                         udelay(100);
 337                         outl(reg, emu->port + HCFG);
 338                 }
 339         }
 340
 341         if (emu->card_capabilities->emu_model) {
 342                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 343         } else if (emu->card_capabilities->i2c_adc) {
 344                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 345         } else if (emu->audigy) {       /* enable analog output */
 346                 unsigned int reg = inl(emu->port + A_IOCFG);
 347                 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
 348         }
 349
 350         return 0;
 351 }
 352
 353 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
 354 {
 355         /*
 356          *  Enable the audio bit
 357          */
 358         outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
 359
 360         /* Enable analog/digital outs on audigy */
 361         if (emu->card_capabilities->emu_model) {
 362                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 363         } else if (emu->card_capabilities->i2c_adc) {
 364                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 365         } else if (emu->audigy) {
 366                 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
 367
 368                 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 369                         /* Unmute Analog now.  Set GPO6 to 1 for Apollo.
 370                          * This has to be done after init ALice3 I2SOut beyond 48KHz.
 371                          * So, sequence is important. */
 372                         outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
 373                 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
 374                         /* Unmute Analog now. */
 375                         outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
 376                 } else {
 377                         /* Disable routing from AC97 line out to Front speakers */
 378                         outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
 379                 }
 380         }
 381
 382 #if 0
 383         {
 384         unsigned int tmp;
 385         /* FIXME: the following routine disables LiveDrive-II !! */
 386         /* TOSLink detection */
 387         emu->tos_link = 0;
 388         tmp = inl(emu->port + HCFG);
 389         if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
 390                 outl(tmp|0x800, emu->port + HCFG);
 391                 udelay(50);
 392                 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
 393                         emu->tos_link = 1;
 394                         outl(tmp, emu->port + HCFG);
 395                 }
 396         }
 397         }
 398 #endif
 399
 400         snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
 401 }
 402
 403 int snd_emu10k1_done(struct snd_emu10k1 *emu)
 404 {
 405         int ch;
 406
 407         outl(0, emu->port + INTE);
 408
 409         /*
 410          *  Shutdown the chip
 411          */
 412         for (ch = 0; ch < NUM_G; ch++)
 413                 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
 414         for (ch = 0; ch < NUM_G; ch++) {
 415                 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
 416                 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
 417                 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
 418                 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
 419         }
 420
 421         /* reset recording buffers */
 422         snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
 423         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 424         snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
 425         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 426         snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
 427         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 428         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 429         snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
 430         snd_emu10k1_ptr_write(emu, TCB, 0, 0);
 431         if (emu->audigy)
 432                 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
 433         else
 434                 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
 435
 436         /* disable channel interrupt */
 437         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 438         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 439         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 440         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 441
 442         /* disable audio and lock cache */
 443         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
 444         snd_emu10k1_ptr_write(emu, PTB, 0, 0);
 445
 446         return 0;
 447 }
 448
 449 /*************************************************************************
 450  * ECARD functional implementation
 451  *************************************************************************/
 452
 453 /* In A1 Silicon, these bits are in the HC register */
 454 #define HOOKN_BIT               (1L << 12)
 455 #define HANDN_BIT               (1L << 11)
 456 #define PULSEN_BIT              (1L << 10)
 457
 458 #define EC_GDI1                 (1 << 13)
 459 #define EC_GDI0                 (1 << 14)
 460
 461 #define EC_NUM_CONTROL_BITS     20
 462
 463 #define EC_AC3_DATA_SELN        0x0001L
 464 #define EC_EE_DATA_SEL          0x0002L
 465 #define EC_EE_CNTRL_SELN        0x0004L
 466 #define EC_EECLK                0x0008L
 467 #define EC_EECS                 0x0010L
 468 #define EC_EESDO                0x0020L
 469 #define EC_TRIM_CSN             0x0040L
 470 #define EC_TRIM_SCLK            0x0080L
 471 #define EC_TRIM_SDATA           0x0100L
 472 #define EC_TRIM_MUTEN           0x0200L
 473 #define EC_ADCCAL               0x0400L
 474 #define EC_ADCRSTN              0x0800L
 475 #define EC_DACCAL               0x1000L
 476 #define EC_DACMUTEN             0x2000L
 477 #define EC_LEDN                 0x4000L
 478
 479 #define EC_SPDIF0_SEL_SHIFT     15
 480 #define EC_SPDIF1_SEL_SHIFT     17
 481 #define EC_SPDIF0_SEL_MASK      (0x3L << EC_SPDIF0_SEL_SHIFT)
 482 #define EC_SPDIF1_SEL_MASK      (0x7L << EC_SPDIF1_SEL_SHIFT)
 483 #define EC_SPDIF0_SELECT(_x)    (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
 484 #define EC_SPDIF1_SELECT(_x)    (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
 485 #define EC_CURRENT_PROM_VERSION 0x01    /* Self-explanatory.  This should
 486                                          * be incremented any time the EEPROM's
 487                                          * format is changed.  */
 488
 489 #define EC_EEPROM_SIZE          0x40    /* ECARD EEPROM has 64 16-bit words */
 490
 491 /* Addresses for special values stored in to EEPROM */
 492 #define EC_PROM_VERSION_ADDR    0x20    /* Address of the current prom version */
 493 #define EC_BOARDREV0_ADDR       0x21    /* LSW of board rev */
 494 #define EC_BOARDREV1_ADDR       0x22    /* MSW of board rev */
 495
 496 #define EC_LAST_PROMFILE_ADDR   0x2f
 497
 498 #define EC_SERIALNUM_ADDR       0x30    /* First word of serial number.  The
 499                                          * can be up to 30 characters in length
 500                                          * and is stored as a NULL-terminated
 501                                          * ASCII string.  Any unused bytes must be
 502                                          * filled with zeros */
 503 #define EC_CHECKSUM_ADDR        0x3f    /* Location at which checksum is stored */
 504
 505
 506 /* Most of this stuff is pretty self-evident.  According to the hardware
 507  * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
 508  * offset problem.  Weird.
 509  */
 510 #define EC_RAW_RUN_MODE         (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
 511                                  EC_TRIM_CSN)
 512
 513
 514 #define EC_DEFAULT_ADC_GAIN     0xC4C4
 515 #define EC_DEFAULT_SPDIF0_SEL   0x0
 516 #define EC_DEFAULT_SPDIF1_SEL   0x4
 517
 518 /**************************************************************************
 519  * @func Clock bits into the Ecard's control latch.  The Ecard uses a
 520  *  control latch will is loaded bit-serially by toggling the Modem control
 521  *  lines from function 2 on the E8010.  This function hides these details
 522  *  and presents the illusion that we are actually writing to a distinct
 523  *  register.
 524  */
 525
 526 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
 527 {
 528         unsigned short count;
 529         unsigned int data;
 530         unsigned long hc_port;
 531         unsigned int hc_value;
 532
 533         hc_port = emu->port + HCFG;
 534         hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
 535         outl(hc_value, hc_port);
 536
 537         for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
 538
 539                 /* Set up the value */
 540                 data = ((value & 0x1) ? PULSEN_BIT : 0);
 541                 value >>= 1;
 542
 543                 outl(hc_value | data, hc_port);
 544
 545                 /* Clock the shift register */
 546                 outl(hc_value | data | HANDN_BIT, hc_port);
 547                 outl(hc_value | data, hc_port);
 548         }
 549
 550         /* Latch the bits */
 551         outl(hc_value | HOOKN_BIT, hc_port);
 552         outl(hc_value, hc_port);
 553 }
 554
 555 /**************************************************************************
 556  * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
 557  * trim value consists of a 16bit value which is composed of two
 558  * 8 bit gain/trim values, one for the left channel and one for the
 559  * right channel.  The following table maps from the Gain/Attenuation
 560  * value in decibels into the corresponding bit pattern for a single
 561  * channel.
 562  */
 563
 564 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
 565                                          unsigned short gain)
 566 {
 567         unsigned int bit;
 568
 569         /* Enable writing to the TRIM registers */
 570         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 571
 572         /* Do it again to insure that we meet hold time requirements */
 573         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 574
 575         for (bit = (1 << 15); bit; bit >>= 1) {
 576                 unsigned int value;
 577
 578                 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
 579
 580                 if (gain & bit)
 581                         value |= EC_TRIM_SDATA;
 582
 583                 /* Clock the bit */
 584                 snd_emu10k1_ecard_write(emu, value);
 585                 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
 586                 snd_emu10k1_ecard_write(emu, value);
 587         }
 588
 589         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 590 }
 591
 592 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
 593 {
 594         unsigned int hc_value;
 595
 596         /* Set up the initial settings */
 597         emu->ecard_ctrl = EC_RAW_RUN_MODE |
 598                           EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
 599                           EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
 600
 601         /* Step 0: Set the codec type in the hardware control register
 602          * and enable audio output */
 603         hc_value = inl(emu->port + HCFG);
 604         outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
 605         inl(emu->port + HCFG);
 606
 607         /* Step 1: Turn off the led and deassert TRIM_CS */
 608         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 609
 610         /* Step 2: Calibrate the ADC and DAC */
 611         snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
 612
 613         /* Step 3: Wait for awhile;   XXX We can't get away with this
 614          * under a real operating system; we'll need to block and wait that
 615          * way. */
 616         snd_emu10k1_wait(emu, 48000);
 617
 618         /* Step 4: Switch off the DAC and ADC calibration.  Note
 619          * That ADC_CAL is actually an inverted signal, so we assert
 620          * it here to stop calibration.  */
 621         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 622
 623         /* Step 4: Switch into run mode */
 624         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 625
 626         /* Step 5: Set the analog input gain */
 627         snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
 628
 629         return 0;
 630 }
 631
 632 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
 633 {
 634         unsigned long special_port;
 635         unsigned int value;
 636
 637         /* Special initialisation routine
 638          * before the rest of the IO-Ports become active.
 639          */
 640         special_port = emu->port + 0x38;
 641         value = inl(special_port);
 642         outl(0x00d00000, special_port);
 643         value = inl(special_port);
 644         outl(0x00d00001, special_port);
 645         value = inl(special_port);
 646         outl(0x00d0005f, special_port);
 647         value = inl(special_port);
 648         outl(0x00d0007f, special_port);
 649         value = inl(special_port);
 650         outl(0x0090007f, special_port);
 651         value = inl(special_port);
 652
 653         snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
 654         /* Delay to give time for ADC chip to switch on. It needs 113ms */
 655         msleep(200);
 656         return 0;
 657 }
 658
 659 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, const char *filename)
 660 {
 661         int err;
 662         int n, i;
 663         int reg;
 664         int value;
 665         unsigned int write_post;
 666         unsigned long flags;
 667         const struct firmware *fw_entry;
 668
 669         err = request_firmware(&fw_entry, filename, &emu->pci->dev);
 670         if (err != 0) {
 671                 snd_printk(KERN_ERR "firmware: %s not found. Err = %d\n", filename, err);
 672                 return err;
 673         }
 674         snd_printk(KERN_INFO "firmware size = 0x%zx\n", fw_entry->size);
 675
 676         /* The FPGA is a Xilinx Spartan IIE XC2S50E */
 677         /* GPIO7 -> FPGA PGMN
 678          * GPIO6 -> FPGA CCLK
 679          * GPIO5 -> FPGA DIN
 680          * FPGA CONFIG OFF -> FPGA PGMN
 681          */
 682         spin_lock_irqsave(&emu->emu_lock, flags);
 683         outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
 684         write_post = inl(emu->port + A_IOCFG);
 685         udelay(100);
 686         outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
 687         write_post = inl(emu->port + A_IOCFG);
 688         udelay(100); /* Allow FPGA memory to clean */
 689         for (n = 0; n < fw_entry->size; n++) {
 690                 value = fw_entry->data[n];
 691                 for (i = 0; i < 8; i++) {
 692                         reg = 0x80;
 693                         if (value & 0x1)
 694                                 reg = reg | 0x20;
 695                         value = value >> 1;
 696                         outl(reg, emu->port + A_IOCFG);
 697                         write_post = inl(emu->port + A_IOCFG);
 698                         outl(reg | 0x40, emu->port + A_IOCFG);
 699                         write_post = inl(emu->port + A_IOCFG);
 700                 }
 701         }
 702         /* After programming, set GPIO bit 4 high again. */
 703         outl(0x10, emu->port + A_IOCFG);
 704         write_post = inl(emu->port + A_IOCFG);
 705         spin_unlock_irqrestore(&emu->emu_lock, flags);
 706
 707         release_firmware(fw_entry);
 708         return 0;
 709 }
 710
 711 static int emu1010_firmware_thread(void *data)
 712 {
 713         struct snd_emu10k1 *emu = data;
 714         int tmp, tmp2;
 715         int reg;
 716         int err;
 717
 718         for (;;) {
 719                 /* Delay to allow Audio Dock to settle */
 720                 msleep_interruptible(1000);
 721                 if (kthread_should_stop())
 722                         break;
 723                 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
 724                 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
 725                 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
 726                         /* Audio Dock attached */
 727                         /* Return to Audio Dock programming mode */
 728                         snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
 729                         snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK);
 730                         if (emu->card_capabilities->emu_model ==
 731                             EMU_MODEL_EMU1010) {
 732                                 err = snd_emu1010_load_firmware(emu, DOCK_FILENAME);
 733                                 if (err != 0)
 734                                         continue;
 735                         } else if (emu->card_capabilities->emu_model ==
 736                                    EMU_MODEL_EMU1010B) {
 737                                 err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME);
 738                                 if (err != 0)
 739                                         continue;
 740                         } else if (emu->card_capabilities->emu_model ==
 741                                    EMU_MODEL_EMU1616) {
 742                                 err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME);
 743                                 if (err != 0)
 744                                         continue;
 745                         }
 746
 747                         snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
 748                         snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg);
 749                         snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", reg);
 750                         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 751                         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 752                         snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg);
 753                         if ((reg & 0x1f) != 0x15) {
 754                                 /* FPGA failed to be programmed */
 755                                 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", reg);
 756                                 continue;
 757                         }
 758                         snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
 759                         snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
 760                         snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
 761                         snd_printk(KERN_INFO "Audio Dock ver:%d.%d\n",
 762                                    tmp, tmp2);
 763                         /* Sync clocking between 1010 and Dock */
 764                         /* Allow DLL to settle */
 765                         msleep(10);
 766                         /* Unmute all. Default is muted after a firmware load */
 767                         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
 768                 }
 769         }
 770         snd_printk(KERN_INFO "emu1010: firmware thread stopping\n");
 771         return 0;
 772 }
 773
 774 /*
 775  * EMU-1010 - details found out from this driver, official MS Win drivers,
 776  * testing the card:
 777  *
 778  * Audigy2 (aka Alice2):
 779  * ---------------------
 780  *      * communication over PCI
 781  *      * conversion of 32-bit data coming over EMU32 links from HANA FPGA
 782  *        to 2 x 16-bit, using internal DSP instructions
 783  *      * slave mode, clock supplied by HANA
 784  *      * linked to HANA using:
 785  *              32 x 32-bit serial EMU32 output channels
 786  *              16 x EMU32 input channels
 787  *              (?) x I2S I/O channels (?)
 788  *
 789  * FPGA (aka HANA):
 790  * ---------------
 791  *      * provides all (?) physical inputs and outputs of the card
 792  *              (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
 793  *      * provides clock signal for the card and Alice2
 794  *      * two crystals - for 44.1kHz and 48kHz multiples
 795  *      * provides internal routing of signal sources to signal destinations
 796  *      * inputs/outputs to Alice2 - see above
 797  *
 798  * Current status of the driver:
 799  * ----------------------------
 800  *      * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
 801  *      * PCM device nb. 2:
 802  *              16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
 803  *              16 x 32-bit capture - snd_emu10k1_capture_efx_ops
 804  */
 805 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
 806 {
 807         unsigned int i;
 808         int tmp, tmp2;
 809         int reg;
 810         int err;
 811         const char *filename = NULL;
 812
 813         snd_printk(KERN_INFO "emu1010: Special config.\n");
 814         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 815          * Lock Sound Memory Cache, Lock Tank Memory Cache,
 816          * Mute all codecs.
 817          */
 818         outl(0x0005a00c, emu->port + HCFG);
 819         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 820          * Lock Tank Memory Cache,
 821          * Mute all codecs.
 822          */
 823         outl(0x0005a004, emu->port + HCFG);
 824         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 825          * Mute all codecs.
 826          */
 827         outl(0x0005a000, emu->port + HCFG);
 828         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 829          * Mute all codecs.
 830          */
 831         outl(0x0005a000, emu->port + HCFG);
 832
 833         /* Disable 48Volt power to Audio Dock */
 834         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
 835
 836         /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
 837         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 838         snd_printdd("reg1 = 0x%x\n", reg);
 839         if ((reg & 0x3f) == 0x15) {
 840                 /* FPGA netlist already present so clear it */
 841                 /* Return to programming mode */
 842
 843                 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
 844         }
 845         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 846         snd_printdd("reg2 = 0x%x\n", reg);
 847         if ((reg & 0x3f) == 0x15) {
 848                 /* FPGA failed to return to programming mode */
 849                 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
 850                 return -ENODEV;
 851         }
 852         snd_printk(KERN_INFO "emu1010: EMU_HANA_ID = 0x%x\n", reg);
 853         switch (emu->card_capabilities->emu_model) {
 854         case EMU_MODEL_EMU1010:
 855                 filename = HANA_FILENAME;
 856                 break;
 857         case EMU_MODEL_EMU1010B:
 858                 filename = EMU1010B_FILENAME;
 859                 break;
 860         case EMU_MODEL_EMU1616:
 861                 filename = EMU1010_NOTEBOOK_FILENAME;
 862                 break;
 863         case EMU_MODEL_EMU0404:
 864                 filename = EMU0404_FILENAME;
 865                 break;
 866         default:
 867                 filename = NULL;
 868                 return -ENODEV;
 869                 break;
 870         }
 871         snd_printk(KERN_INFO "emu1010: filename %s testing\n", filename);
 872         err = snd_emu1010_load_firmware(emu, filename);
 873         if (err != 0) {
 874                 snd_printk(
 875                         KERN_INFO "emu1010: Loading Firmware file %s failed\n",
 876                         filename);
 877                 return err;
 878         }
 879
 880         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 881         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 882         if ((reg & 0x3f) != 0x15) {
 883                 /* FPGA failed to be programmed */
 884                 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", reg);
 885                 return -ENODEV;
 886         }
 887
 888         snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
 889         snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
 890         snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
 891         snd_printk(KERN_INFO "emu1010: Hana version: %d.%d\n", tmp, tmp2);
 892         /* Enable 48Volt power to Audio Dock */
 893         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
 894
 895         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
 896         snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
 897         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
 898         snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
 899         snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
 900         /* Optical -> ADAT I/O  */
 901         /* 0 : SPDIF
 902          * 1 : ADAT
 903          */
 904         emu->emu1010.optical_in = 1; /* IN_ADAT */
 905         emu->emu1010.optical_out = 1; /* IN_ADAT */
 906         tmp = 0;
 907         tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
 908                 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
 909         snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
 910         snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
 911         /* Set no attenuation on Audio Dock pads. */
 912         snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
 913         emu->emu1010.adc_pads = 0x00;
 914         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
 915         /* Unmute Audio dock DACs, Headphone source DAC-4. */
 916         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
 917         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
 918         snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
 919         /* DAC PADs. */
 920         snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
 921         emu->emu1010.dac_pads = 0x0f;
 922         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
 923         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
 924         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
 925         /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
 926         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
 927         /* MIDI routing */
 928         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
 929         /* Unknown. */
 930         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
 931         /* IRQ Enable: Alll on */
 932         /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
 933         /* IRQ Enable: All off */
 934         snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
 935
 936         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
 937         snd_printk(KERN_INFO "emu1010: Card options3 = 0x%x\n", reg);
 938         /* Default WCLK set to 48kHz. */
 939         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
 940         /* Word Clock source, Internal 48kHz x1 */
 941         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
 942         /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
 943         /* Audio Dock LEDs. */
 944         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
 945
 946 #if 0
 947         /* For 96kHz */
 948         snd_emu1010_fpga_link_dst_src_write(emu,
 949                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 950         snd_emu1010_fpga_link_dst_src_write(emu,
 951                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
 952         snd_emu1010_fpga_link_dst_src_write(emu,
 953                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
 954         snd_emu1010_fpga_link_dst_src_write(emu,
 955                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
 956 #endif
 957 #if 0
 958         /* For 192kHz */
 959         snd_emu1010_fpga_link_dst_src_write(emu,
 960                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 961         snd_emu1010_fpga_link_dst_src_write(emu,
 962                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
 963         snd_emu1010_fpga_link_dst_src_write(emu,
 964                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
 965         snd_emu1010_fpga_link_dst_src_write(emu,
 966                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
 967         snd_emu1010_fpga_link_dst_src_write(emu,
 968                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
 969         snd_emu1010_fpga_link_dst_src_write(emu,
 970                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
 971         snd_emu1010_fpga_link_dst_src_write(emu,
 972                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
 973         snd_emu1010_fpga_link_dst_src_write(emu,
 974                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
 975 #endif
 976 #if 1
 977         /* For 48kHz */
 978         snd_emu1010_fpga_link_dst_src_write(emu,
 979                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
 980         snd_emu1010_fpga_link_dst_src_write(emu,
 981                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
 982         snd_emu1010_fpga_link_dst_src_write(emu,
 983                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
 984         snd_emu1010_fpga_link_dst_src_write(emu,
 985                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
 986         snd_emu1010_fpga_link_dst_src_write(emu,
 987                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
 988         snd_emu1010_fpga_link_dst_src_write(emu,
 989                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
 990         snd_emu1010_fpga_link_dst_src_write(emu,
 991                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
 992         snd_emu1010_fpga_link_dst_src_write(emu,
 993                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
 994         /* Pavel Hofman - setting defaults for 8 more capture channels
 995          * Defaults only, users will set their own values anyways, let's
 996          * just copy/paste.
 997          */
 998
 999         snd_emu1010_fpga_link_dst_src_write(emu,
1000                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
1001         snd_emu1010_fpga_link_dst_src_write(emu,
1002                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1003         snd_emu1010_fpga_link_dst_src_write(emu,
1004                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1005         snd_emu1010_fpga_link_dst_src_write(emu,
1006                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1007         snd_emu1010_fpga_link_dst_src_write(emu,
1008                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1009         snd_emu1010_fpga_link_dst_src_write(emu,
1010                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1011         snd_emu1010_fpga_link_dst_src_write(emu,
1012                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1013         snd_emu1010_fpga_link_dst_src_write(emu,
1014                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1015 #endif
1016 #if 0
1017         /* Original */
1018         snd_emu1010_fpga_link_dst_src_write(emu,
1019                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1020         snd_emu1010_fpga_link_dst_src_write(emu,
1021                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1022         snd_emu1010_fpga_link_dst_src_write(emu,
1023                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1024         snd_emu1010_fpga_link_dst_src_write(emu,
1025                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1026         snd_emu1010_fpga_link_dst_src_write(emu,
1027                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1028         snd_emu1010_fpga_link_dst_src_write(emu,
1029                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1030         snd_emu1010_fpga_link_dst_src_write(emu,
1031                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1032         snd_emu1010_fpga_link_dst_src_write(emu,
1033                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1034         snd_emu1010_fpga_link_dst_src_write(emu,
1035                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1036         snd_emu1010_fpga_link_dst_src_write(emu,
1037                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1038         snd_emu1010_fpga_link_dst_src_write(emu,
1039                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1040         snd_emu1010_fpga_link_dst_src_write(emu,
1041                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1042 #endif
1043         for (i = 0; i < 0x20; i++) {
1044                 /* AudioDock Elink <- Silence */
1045                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
1046         }
1047         for (i = 0; i < 4; i++) {
1048                 /* Hana SPDIF Out <- Silence */
1049                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
1050         }
1051         for (i = 0; i < 7; i++) {
1052                 /* Hamoa DAC <- Silence */
1053                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
1054         }
1055         for (i = 0; i < 7; i++) {
1056                 /* Hana ADAT Out <- Silence */
1057                 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1058         }
1059         snd_emu1010_fpga_link_dst_src_write(emu,
1060                 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1061         snd_emu1010_fpga_link_dst_src_write(emu,
1062                 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1063         snd_emu1010_fpga_link_dst_src_write(emu,
1064                 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1065         snd_emu1010_fpga_link_dst_src_write(emu,
1066                 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1067         snd_emu1010_fpga_link_dst_src_write(emu,
1068                 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1069         snd_emu1010_fpga_link_dst_src_write(emu,
1070                 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1071         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1072
1073         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1074
1075         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1076          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1077          * Mute all codecs.
1078          */
1079         outl(0x0000a000, emu->port + HCFG);
1080         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1081          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1082          * Un-Mute all codecs.
1083          */
1084         outl(0x0000a001, emu->port + HCFG);
1085
1086         /* Initial boot complete. Now patches */
1087
1088         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1089         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1090         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1091         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1092         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1093         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1094         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif  (or 0x11 for aes/ebu) */
1095
1096         /* Start Micro/Audio Dock firmware loader thread */
1097         if (!emu->emu1010.firmware_thread) {
1098                 emu->emu1010.firmware_thread =
1099                         kthread_create(emu1010_firmware_thread, emu,
1100                                        "emu1010_firmware");
1101                 wake_up_process(emu->emu1010.firmware_thread);
1102         }
1103
1104 #if 0
1105         snd_emu1010_fpga_link_dst_src_write(emu,
1106                 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1107         snd_emu1010_fpga_link_dst_src_write(emu,
1108                 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1109         snd_emu1010_fpga_link_dst_src_write(emu,
1110                 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1111         snd_emu1010_fpga_link_dst_src_write(emu,
1112                 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1113 #endif
1114         /* Default outputs */
1115         if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1116                 /* 1616(M) cardbus default outputs */
1117                 /* ALICE2 bus 0xa0 */
1118                 snd_emu1010_fpga_link_dst_src_write(emu,
1119                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1120                 emu->emu1010.output_source[0] = 17;
1121                 snd_emu1010_fpga_link_dst_src_write(emu,
1122                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1123                 emu->emu1010.output_source[1] = 18;
1124                 snd_emu1010_fpga_link_dst_src_write(emu,
1125                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1126                 emu->emu1010.output_source[2] = 19;
1127                 snd_emu1010_fpga_link_dst_src_write(emu,
1128                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1129                 emu->emu1010.output_source[3] = 20;
1130                 snd_emu1010_fpga_link_dst_src_write(emu,
1131                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1132                 emu->emu1010.output_source[4] = 21;
1133                 snd_emu1010_fpga_link_dst_src_write(emu,
1134                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1135                 emu->emu1010.output_source[5] = 22;
1136                 /* ALICE2 bus 0xa0 */
1137                 snd_emu1010_fpga_link_dst_src_write(emu,
1138                         EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1139                 emu->emu1010.output_source[16] = 17;
1140                 snd_emu1010_fpga_link_dst_src_write(emu,
1141                         EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1142                 emu->emu1010.output_source[17] = 18;
1143         } else {
1144                 /* ALICE2 bus 0xa0 */
1145                 snd_emu1010_fpga_link_dst_src_write(emu,
1146                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1147                 emu->emu1010.output_source[0] = 21;
1148                 snd_emu1010_fpga_link_dst_src_write(emu,
1149                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1150                 emu->emu1010.output_source[1] = 22;
1151                 snd_emu1010_fpga_link_dst_src_write(emu,
1152                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1153                 emu->emu1010.output_source[2] = 23;
1154                 snd_emu1010_fpga_link_dst_src_write(emu,
1155                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1156                 emu->emu1010.output_source[3] = 24;
1157                 snd_emu1010_fpga_link_dst_src_write(emu,
1158                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1159                 emu->emu1010.output_source[4] = 25;
1160                 snd_emu1010_fpga_link_dst_src_write(emu,
1161                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1162                 emu->emu1010.output_source[5] = 26;
1163                 snd_emu1010_fpga_link_dst_src_write(emu,
1164                         EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1165                 emu->emu1010.output_source[6] = 27;
1166                 snd_emu1010_fpga_link_dst_src_write(emu,
1167                         EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1168                 emu->emu1010.output_source[7] = 28;
1169                 /* ALICE2 bus 0xa0 */
1170                 snd_emu1010_fpga_link_dst_src_write(emu,
1171                         EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1172                 emu->emu1010.output_source[8] = 21;
1173                 snd_emu1010_fpga_link_dst_src_write(emu,
1174                         EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1175                 emu->emu1010.output_source[9] = 22;
1176                 /* ALICE2 bus 0xa0 */
1177                 snd_emu1010_fpga_link_dst_src_write(emu,
1178                         EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1179                 emu->emu1010.output_source[10] = 21;
1180                 snd_emu1010_fpga_link_dst_src_write(emu,
1181                         EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1182                 emu->emu1010.output_source[11] = 22;
1183                 /* ALICE2 bus 0xa0 */
1184                 snd_emu1010_fpga_link_dst_src_write(emu,
1185                         EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1186                 emu->emu1010.output_source[12] = 21;
1187                 snd_emu1010_fpga_link_dst_src_write(emu,
1188                         EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1189                 emu->emu1010.output_source[13] = 22;
1190                 /* ALICE2 bus 0xa0 */
1191                 snd_emu1010_fpga_link_dst_src_write(emu,
1192                         EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1193                 emu->emu1010.output_source[14] = 21;
1194                 snd_emu1010_fpga_link_dst_src_write(emu,
1195                         EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1196                 emu->emu1010.output_source[15] = 22;
1197                 /* ALICE2 bus 0xa0 */
1198                 snd_emu1010_fpga_link_dst_src_write(emu,
1199                         EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1200                 emu->emu1010.output_source[16] = 21;
1201                 snd_emu1010_fpga_link_dst_src_write(emu,
1202                         EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1203                 emu->emu1010.output_source[17] = 22;
1204                 snd_emu1010_fpga_link_dst_src_write(emu,
1205                         EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1206                 emu->emu1010.output_source[18] = 23;
1207                 snd_emu1010_fpga_link_dst_src_write(emu,
1208                         EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1209                 emu->emu1010.output_source[19] = 24;
1210                 snd_emu1010_fpga_link_dst_src_write(emu,
1211                         EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1212                 emu->emu1010.output_source[20] = 25;
1213                 snd_emu1010_fpga_link_dst_src_write(emu,
1214                         EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1215                 emu->emu1010.output_source[21] = 26;
1216                 snd_emu1010_fpga_link_dst_src_write(emu,
1217                         EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1218                 emu->emu1010.output_source[22] = 27;
1219                 snd_emu1010_fpga_link_dst_src_write(emu,
1220                         EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1221                 emu->emu1010.output_source[23] = 28;
1222         }
1223         /* TEMP: Select SPDIF in/out */
1224         /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
1225
1226         /* TEMP: Select 48kHz SPDIF out */
1227         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1228         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1229         /* Word Clock source, Internal 48kHz x1 */
1230         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1231         /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
1232         emu->emu1010.internal_clock = 1; /* 48000 */
1233         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
1234         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1235         /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1236         /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1237         /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
1238
1239         return 0;
1240 }
1241 /*
1242  *  Create the EMU10K1 instance
1243  */
1244
1245 #ifdef CONFIG_PM
1246 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1247 static void free_pm_buffer(struct snd_emu10k1 *emu);
1248 #endif
1249
1250 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1251 {
1252         if (emu->port) {        /* avoid access to already used hardware */
1253                 snd_emu10k1_fx8010_tram_setup(emu, 0);
1254                 snd_emu10k1_done(emu);
1255                 snd_emu10k1_free_efx(emu);
1256         }
1257         if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1258                 /* Disable 48Volt power to Audio Dock */
1259                 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
1260         }
1261         if (emu->emu1010.firmware_thread)
1262                 kthread_stop(emu->emu1010.firmware_thread);
1263         if (emu->irq >= 0)
1264                 free_irq(emu->irq, emu);
1265         /* remove reserved page */
1266         if (emu->reserved_page) {
1267                 snd_emu10k1_synth_free(emu,
1268                         (struct snd_util_memblk *)emu->reserved_page);
1269                 emu->reserved_page = NULL;
1270         }
1271         if (emu->memhdr)
1272                 snd_util_memhdr_free(emu->memhdr);
1273         if (emu->silent_page.area)
1274                 snd_dma_free_pages(&emu->silent_page);
1275         if (emu->ptb_pages.area)
1276                 snd_dma_free_pages(&emu->ptb_pages);
1277         vfree(emu->page_ptr_table);
1278         vfree(emu->page_addr_table);
1279 #ifdef CONFIG_PM
1280         free_pm_buffer(emu);
1281 #endif
1282         if (emu->port)
1283                 pci_release_regions(emu->pci);
1284         if (emu->card_capabilities->ca0151_chip) /* P16V */
1285                 snd_p16v_free(emu);
1286         pci_disable_device(emu->pci);
1287         kfree(emu);
1288         return 0;
1289 }
1290
1291 static int snd_emu10k1_dev_free(struct snd_device *device)
1292 {
1293         struct snd_emu10k1 *emu = device->device_data;
1294         return snd_emu10k1_free(emu);
1295 }
1296
1297 static struct snd_emu_chip_details emu_chip_details[] = {
1298         /* Audigy4 (Not PRO) SB0610 */
1299         /* Tested by James@superbug.co.uk 4th April 2006 */
1300         /* A_IOCFG bits
1301          * Output
1302          * 0: ?
1303          * 1: ?
1304          * 2: ?
1305          * 3: 0 - Digital Out, 1 - Line in
1306          * 4: ?
1307          * 5: ?
1308          * 6: ?
1309          * 7: ?
1310          * Input
1311          * 8: ?
1312          * 9: ?
1313          * A: Green jack sense (Front)
1314          * B: ?
1315          * C: Black jack sense (Rear/Side Right)
1316          * D: Yellow jack sense (Center/LFE/Side Left)
1317          * E: ?
1318          * F: ?
1319          *
1320          * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1321          * 0 - Digital Out
1322          * 1 - Line in
1323          */
1324         /* Mic input not tested.
1325          * Analog CD input not tested
1326          * Digital Out not tested.
1327          * Line in working.
1328          * Audio output 5.1 working. Side outputs not working.
1329          */
1330         /* DSP: CA10300-IAT LF
1331          * DAC: Cirrus Logic CS4382-KQZ
1332          * ADC: Philips 1361T
1333          * AC97: Sigmatel STAC9750
1334          * CA0151: None
1335          */
1336         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1337          .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1338          .id = "Audigy2",
1339          .emu10k2_chip = 1,
1340          .ca0108_chip = 1,
1341          .spk71 = 1,
1342          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1343          .ac97_chip = 1} ,
1344         /* Audigy 2 Value AC3 out does not work yet.
1345          * Need to find out how to turn off interpolators.
1346          */
1347         /* Tested by James@superbug.co.uk 3rd July 2005 */
1348         /* DSP: CA0108-IAT
1349          * DAC: CS4382-KQ
1350          * ADC: Philips 1361T
1351          * AC97: STAC9750
1352          * CA0151: None
1353          */
1354         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1355          .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1356          .id = "Audigy2",
1357          .emu10k2_chip = 1,
1358          .ca0108_chip = 1,
1359          .spk71 = 1,
1360          .ac97_chip = 1} ,
1361         /* Audigy 2 ZS Notebook Cardbus card.*/
1362         /* Tested by James@superbug.co.uk 6th November 2006 */
1363         /* Audio output 7.1/Headphones working.
1364          * Digital output working. (AC3 not checked, only PCM)
1365          * Audio Mic/Line inputs working.
1366          * Digital input not tested.
1367          */
1368         /* DSP: Tina2
1369          * DAC: Wolfson WM8768/WM8568
1370          * ADC: Wolfson WM8775
1371          * AC97: None
1372          * CA0151: None
1373          */
1374         /* Tested by James@superbug.co.uk 4th April 2006 */
1375         /* A_IOCFG bits
1376          * Output
1377          * 0: Not Used
1378          * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1379          * 2: Analog input 0 = line in, 1 = mic in
1380          * 3: Not Used
1381          * 4: Digital output 0 = off, 1 = on.
1382          * 5: Not Used
1383          * 6: Not Used
1384          * 7: Not Used
1385          * Input
1386          *      All bits 1 (0x3fxx) means nothing plugged in.
1387          * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1388          * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1389          * C-D: 2 = Front/Rear/etc, 3 = nothing.
1390          * E-F: Always 0
1391          *
1392          */
1393         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1394          .driver = "Audigy2", .name = "SB Audigy 2 ZS Notebook [SB0530]",
1395          .id = "Audigy2",
1396          .emu10k2_chip = 1,
1397          .ca0108_chip = 1,
1398          .ca_cardbus_chip = 1,
1399          .spi_dac = 1,
1400          .i2c_adc = 1,
1401          .spk71 = 1} ,
1402         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1403         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1404          .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1405          .id = "EMU1010",
1406          .emu10k2_chip = 1,
1407          .ca0108_chip = 1,
1408          .ca_cardbus_chip = 1,
1409          .spk71 = 1 ,
1410          .emu_model = EMU_MODEL_EMU1616},
1411         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1412         /* This is MAEM8960, 0202 is MAEM 8980 */
1413         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1414          .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
1415          .id = "EMU1010",
1416          .emu10k2_chip = 1,
1417          .ca0108_chip = 1,
1418          .spk71 = 1,
1419          .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1420         /* Tested by James@superbug.co.uk 8th July 2005. */
1421         /* This is MAEM8810, 0202 is MAEM8820 */
1422         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1423          .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
1424          .id = "EMU1010",
1425          .emu10k2_chip = 1,
1426          .ca0102_chip = 1,
1427          .spk71 = 1,
1428          .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1429         /* EMU0404b */
1430         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1431          .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
1432          .id = "EMU0404",
1433          .emu10k2_chip = 1,
1434          .ca0108_chip = 1,
1435          .spk71 = 1,
1436          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1437         /* Tested by James@superbug.co.uk 20-3-2007. */
1438         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1439          .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
1440          .id = "EMU0404",
1441          .emu10k2_chip = 1,
1442          .ca0102_chip = 1,
1443          .spk71 = 1,
1444          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1445         /* Note that all E-mu cards require kernel 2.6 or newer. */
1446         {.vendor = 0x1102, .device = 0x0008,
1447          .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1448          .id = "Audigy2",
1449          .emu10k2_chip = 1,
1450          .ca0108_chip = 1,
1451          .ac97_chip = 1} ,
1452         /* Tested by James@superbug.co.uk 3rd July 2005 */
1453         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1454          .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1455          .id = "Audigy2",
1456          .emu10k2_chip = 1,
1457          .ca0102_chip = 1,
1458          .ca0151_chip = 1,
1459          .spk71 = 1,
1460          .spdif_bug = 1,
1461          .ac97_chip = 1} ,
1462         /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1463         /* The 0x20061102 does have SB0350 written on it
1464          * Just like 0x20021102
1465          */
1466         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1467          .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1468          .id = "Audigy2",
1469          .emu10k2_chip = 1,
1470          .ca0102_chip = 1,
1471          .ca0151_chip = 1,
1472          .spk71 = 1,
1473          .spdif_bug = 1,
1474          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1475          .ac97_chip = 1} ,
1476         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1477          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1478          .id = "Audigy2",
1479          .emu10k2_chip = 1,
1480          .ca0102_chip = 1,
1481          .ca0151_chip = 1,
1482          .spk71 = 1,
1483          .spdif_bug = 1,
1484          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1485          .ac97_chip = 1} ,
1486         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1487          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1488          .id = "Audigy2",
1489          .emu10k2_chip = 1,
1490          .ca0102_chip = 1,
1491          .ca0151_chip = 1,
1492          .spk71 = 1,
1493          .spdif_bug = 1,
1494          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1495          .ac97_chip = 1} ,
1496         /* Audigy 2 */
1497         /* Tested by James@superbug.co.uk 3rd July 2005 */
1498         /* DSP: CA0102-IAT
1499          * DAC: CS4382-KQ
1500          * ADC: Philips 1361T
1501          * AC97: STAC9721
1502          * CA0151: Yes
1503          */
1504         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1505          .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1506          .id = "Audigy2",
1507          .emu10k2_chip = 1,
1508          .ca0102_chip = 1,
1509          .ca0151_chip = 1,
1510          .spk71 = 1,
1511          .spdif_bug = 1,
1512          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1513          .ac97_chip = 1} ,
1514         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1515          .driver = "Audigy2", .name = "SB Audigy 2 Platinum EX [SB0280]",
1516          .id = "Audigy2",
1517          .emu10k2_chip = 1,
1518          .ca0102_chip = 1,
1519          .ca0151_chip = 1,
1520          .spk71 = 1,
1521          .spdif_bug = 1} ,
1522         /* Dell OEM/Creative Labs Audigy 2 ZS */
1523         /* See ALSA bug#1365 */
1524         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1525          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1526          .id = "Audigy2",
1527          .emu10k2_chip = 1,
1528          .ca0102_chip = 1,
1529          .ca0151_chip = 1,
1530          .spk71 = 1,
1531          .spdif_bug = 1,
1532          .ac97_chip = 1} ,
1533         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1534          .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1535          .id = "Audigy2",
1536          .emu10k2_chip = 1,
1537          .ca0102_chip = 1,
1538          .ca0151_chip = 1,
1539          .spk71 = 1,
1540          .spdif_bug = 1,
1541          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1542          .adc_1361t = 1,  /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1543          .ac97_chip = 1} ,
1544         {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1545          .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1546          .id = "Audigy2",
1547          .emu10k2_chip = 1,
1548          .ca0102_chip = 1,
1549          .ca0151_chip = 1,
1550          .spdif_bug = 1,
1551          .ac97_chip = 1} ,
1552         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1553          .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1554          .id = "Audigy",
1555          .emu10k2_chip = 1,
1556          .ca0102_chip = 1,
1557          .ac97_chip = 1} ,
1558         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1559          .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1560          .id = "Audigy",
1561          .emu10k2_chip = 1,
1562          .ca0102_chip = 1,
1563          .spdif_bug = 1,
1564          .ac97_chip = 1} ,
1565         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1566          .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1567          .id = "Audigy",
1568          .emu10k2_chip = 1,
1569          .ca0102_chip = 1,
1570          .ac97_chip = 1} ,
1571         {.vendor = 0x1102, .device = 0x0004,
1572          .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1573          .id = "Audigy",
1574          .emu10k2_chip = 1,
1575          .ca0102_chip = 1,
1576          .ac97_chip = 1} ,
1577         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1578          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1579          .id = "Live",
1580          .emu10k1_chip = 1,
1581          .ac97_chip = 1,
1582          .sblive51 = 1} ,
1583         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1584          .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1585          .id = "Live",
1586          .emu10k1_chip = 1,
1587          .ac97_chip = 1,
1588          .sblive51 = 1} ,
1589         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1590          .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1591          .id = "Live",
1592          .emu10k1_chip = 1,
1593          .ac97_chip = 1,
1594          .sblive51 = 1} ,
1595         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1596          .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1597          .id = "Live",
1598          .emu10k1_chip = 1,
1599          .ac97_chip = 1,
1600          .sblive51 = 1} ,
1601         /* Tested by ALSA bug#1680 26th December 2005 */
1602         /* note: It really has SB0220 written on the card, */
1603         /* but it's SB0228 according to kx.inf */
1604         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1605          .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1606          .id = "Live",
1607          .emu10k1_chip = 1,
1608          .ac97_chip = 1,
1609          .sblive51 = 1} ,
1610         /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1611         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1612          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1613          .id = "Live",
1614          .emu10k1_chip = 1,
1615          .ac97_chip = 1,
1616          .sblive51 = 1} ,
1617         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1618          .driver = "EMU10K1", .name = "SB Live! 5.1",
1619          .id = "Live",
1620          .emu10k1_chip = 1,
1621          .ac97_chip = 1,
1622          .sblive51 = 1} ,
1623         /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1624         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1625          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1626          .id = "Live",
1627          .emu10k1_chip = 1,
1628          .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1629                           * share the same IDs!
1630                           */
1631          .sblive51 = 1} ,
1632         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1633          .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1634          .id = "Live",
1635          .emu10k1_chip = 1,
1636          .ac97_chip = 1,
1637          .sblive51 = 1} ,
1638         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1639          .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1640          .id = "Live",
1641          .emu10k1_chip = 1,
1642          .ac97_chip = 1} ,
1643         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1644          .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1645          .id = "Live",
1646          .emu10k1_chip = 1,
1647          .ac97_chip = 1,
1648          .sblive51 = 1} ,
1649         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1650          .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1651          .id = "Live",
1652          .emu10k1_chip = 1,
1653          .ac97_chip = 1,
1654          .sblive51 = 1} ,
1655         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1656          .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1657          .id = "Live",
1658          .emu10k1_chip = 1,
1659          .ac97_chip = 1,
1660          .sblive51 = 1} ,
1661         /* Tested by James@superbug.co.uk 3rd July 2005 */
1662         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1663          .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1664          .id = "Live",
1665          .emu10k1_chip = 1,
1666          .ac97_chip = 1,
1667          .sblive51 = 1} ,
1668         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1669          .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1670          .id = "Live",
1671          .emu10k1_chip = 1,
1672          .ac97_chip = 1,
1673          .sblive51 = 1} ,
1674         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1675          .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1676          .id = "Live",
1677          .emu10k1_chip = 1,
1678          .ac97_chip = 1,
1679          .sblive51 = 1} ,
1680         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1681          .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1682          .id = "Live",
1683          .emu10k1_chip = 1,
1684          .ac97_chip = 1,
1685          .sblive51 = 1} ,
1686         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1687          .driver = "EMU10K1", .name = "E-mu APS [PC545]",
1688          .id = "APS",
1689          .emu10k1_chip = 1,
1690          .ecard = 1} ,
1691         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1692          .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1693          .id = "Live",
1694          .emu10k1_chip = 1,
1695          .ac97_chip = 1,
1696          .sblive51 = 1} ,
1697         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1698          .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1699          .id = "Live",
1700          .emu10k1_chip = 1,
1701          .ac97_chip = 1,
1702          .sblive51 = 1} ,
1703         {.vendor = 0x1102, .device = 0x0002,
1704          .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1705          .id = "Live",
1706          .emu10k1_chip = 1,
1707          .ac97_chip = 1,
1708          .sblive51 = 1} ,
1709         { } /* terminator */
1710 };
1711
1712 int __devinit snd_emu10k1_create(struct snd_card *card,
1713                        struct pci_dev *pci,
1714                        unsigned short extin_mask,
1715                        unsigned short extout_mask,
1716                        long max_cache_bytes,
1717                        int enable_ir,
1718                        uint subsystem,
1719                        struct snd_emu10k1 **remu)
1720 {
1721         struct snd_emu10k1 *emu;
1722         int idx, err;
1723         int is_audigy;
1724         unsigned int silent_page;
1725         const struct snd_emu_chip_details *c;
1726         static struct snd_device_ops ops = {
1727                 .dev_free =     snd_emu10k1_dev_free,
1728         };
1729
1730         *remu = NULL;
1731
1732         /* enable PCI device */
1733         err = pci_enable_device(pci);
1734         if (err < 0)
1735                 return err;
1736
1737         emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1738         if (emu == NULL) {
1739                 pci_disable_device(pci);
1740                 return -ENOMEM;
1741         }
1742         emu->card = card;
1743         spin_lock_init(&emu->reg_lock);
1744         spin_lock_init(&emu->emu_lock);
1745         spin_lock_init(&emu->spi_lock);
1746         spin_lock_init(&emu->i2c_lock);
1747         spin_lock_init(&emu->voice_lock);
1748         spin_lock_init(&emu->synth_lock);
1749         spin_lock_init(&emu->memblk_lock);
1750         mutex_init(&emu->fx8010.lock);
1751         INIT_LIST_HEAD(&emu->mapped_link_head);
1752         INIT_LIST_HEAD(&emu->mapped_order_link_head);
1753         emu->pci = pci;
1754         emu->irq = -1;
1755         emu->synth = NULL;
1756         emu->get_synth_voice = NULL;
1757         /* read revision & serial */
1758         emu->revision = pci->revision;
1759         pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1760         pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1761         snd_printdd("vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", pci->vendor, pci->device, emu->serial, emu->model);
1762
1763         for (c = emu_chip_details; c->vendor; c++) {
1764                 if (c->vendor == pci->vendor && c->device == pci->device) {
1765                         if (subsystem) {
1766                                 if (c->subsystem && (c->subsystem == subsystem))
1767                                         break;
1768                                 else
1769                                         continue;
1770                         } else {
1771                                 if (c->subsystem && (c->subsystem != emu->serial))
1772                                         continue;
1773                                 if (c->revision && c->revision != emu->revision)
1774                                         continue;
1775                         }
1776                         break;
1777                 }
1778         }
1779         if (c->vendor == 0) {
1780                 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1781                 kfree(emu);
1782                 pci_disable_device(pci);
1783                 return -ENOENT;
1784         }
1785         emu->card_capabilities = c;
1786         if (c->subsystem && !subsystem)
1787                 snd_printdd("Sound card name = %s\n", c->name);
1788         else if (subsystem)
1789                 snd_printdd("Sound card name = %s, "
1790                         "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1791                         "Forced to subsytem = 0x%x\n",  c->name,
1792                         pci->vendor, pci->device, emu->serial, c->subsystem);
1793         else
1794                 snd_printdd("Sound card name = %s, "
1795                         "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1796                         c->name, pci->vendor, pci->device,
1797                         emu->serial);
1798
1799         if (!*card->id && c->id) {
1800                 int i, n = 0;
1801                 strlcpy(card->id, c->id, sizeof(card->id));
1802                 for (;;) {
1803                         for (i = 0; i < snd_ecards_limit; i++) {
1804                                 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1805                                         break;
1806                         }
1807                         if (i >= snd_ecards_limit)
1808                                 break;
1809                         n++;
1810                         if (n >= SNDRV_CARDS)
1811                                 break;
1812                         snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1813                 }
1814         }
1815
1816         is_audigy = emu->audigy = c->emu10k2_chip;
1817
1818         /* set the DMA transfer mask */
1819         emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1820         if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1821             pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1822                 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1823                 kfree(emu);
1824                 pci_disable_device(pci);
1825                 return -ENXIO;
1826         }
1827         if (is_audigy)
1828                 emu->gpr_base = A_FXGPREGBASE;
1829         else
1830                 emu->gpr_base = FXGPREGBASE;
1831
1832         err = pci_request_regions(pci, "EMU10K1");
1833         if (err < 0) {
1834                 kfree(emu);
1835                 pci_disable_device(pci);
1836                 return err;
1837         }
1838         emu->port = pci_resource_start(pci, 0);
1839
1840         emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1841         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1842                                 32 * 1024, &emu->ptb_pages) < 0) {
1843                 err = -ENOMEM;
1844                 goto error;
1845         }
1846
1847         emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1848         emu->page_addr_table = vmalloc(emu->max_cache_pages *
1849                                        sizeof(unsigned long));
1850         if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1851                 err = -ENOMEM;
1852                 goto error;
1853         }
1854
1855         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1856                                 EMUPAGESIZE, &emu->silent_page) < 0) {
1857                 err = -ENOMEM;
1858                 goto error;
1859         }
1860         emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1861         if (emu->memhdr == NULL) {
1862                 err = -ENOMEM;
1863                 goto error;
1864         }
1865         emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1866                 sizeof(struct snd_util_memblk);
1867
1868         pci_set_master(pci);
1869
1870         emu->fx8010.fxbus_mask = 0x303f;
1871         if (extin_mask == 0)
1872                 extin_mask = 0x3fcf;
1873         if (extout_mask == 0)
1874                 extout_mask = 0x7fff;
1875         emu->fx8010.extin_mask = extin_mask;
1876         emu->fx8010.extout_mask = extout_mask;
1877         emu->enable_ir = enable_ir;
1878
1879         if (emu->card_capabilities->ca_cardbus_chip) {
1880                 err = snd_emu10k1_cardbus_init(emu);
1881                 if (err < 0)
1882                         goto error;
1883         }
1884         if (emu->card_capabilities->ecard) {
1885                 err = snd_emu10k1_ecard_init(emu);
1886                 if (err < 0)
1887                         goto error;
1888         } else if (emu->card_capabilities->emu_model) {
1889                 err = snd_emu10k1_emu1010_init(emu);
1890                 if (err < 0) {
1891                         snd_emu10k1_free(emu);
1892                         return err;
1893                 }
1894         } else {
1895                 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1896                         does not support this, it shouldn't do any harm */
1897                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1898                                         AC97SLOT_CNTR|AC97SLOT_LFE);
1899         }
1900
1901         /* initialize TRAM setup */
1902         emu->fx8010.itram_size = (16 * 1024)/2;
1903         emu->fx8010.etram_pages.area = NULL;
1904         emu->fx8010.etram_pages.bytes = 0;
1905
1906         /* irq handler must be registered after I/O ports are activated */
1907         if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1908                         "EMU10K1", emu)) {
1909                 err = -EBUSY;
1910                 goto error;
1911         }
1912         emu->irq = pci->irq;
1913
1914         /*
1915          *  Init to 0x02109204 :
1916          *  Clock accuracy    = 0     (1000ppm)
1917          *  Sample Rate       = 2     (48kHz)
1918          *  Audio Channel     = 1     (Left of 2)
1919          *  Source Number     = 0     (Unspecified)
1920          *  Generation Status = 1     (Original for Cat Code 12)
1921          *  Cat Code          = 12    (Digital Signal Mixer)
1922          *  Mode              = 0     (Mode 0)
1923          *  Emphasis          = 0     (None)
1924          *  CP                = 1     (Copyright unasserted)
1925          *  AN                = 0     (Audio data)
1926          *  P                 = 0     (Consumer)
1927          */
1928         emu->spdif_bits[0] = emu->spdif_bits[1] =
1929                 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1930                 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1931                 SPCS_GENERATIONSTATUS | 0x00001200 |
1932                 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1933
1934         emu->reserved_page = (struct snd_emu10k1_memblk *)
1935                 snd_emu10k1_synth_alloc(emu, 4096);
1936         if (emu->reserved_page)
1937                 emu->reserved_page->map_locked = 1;
1938
1939         /* Clear silent pages and set up pointers */
1940         memset(emu->silent_page.area, 0, PAGE_SIZE);
1941         silent_page = emu->silent_page.addr << 1;
1942         for (idx = 0; idx < MAXPAGES; idx++)
1943                 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1944
1945         /* set up voice indices */
1946         for (idx = 0; idx < NUM_G; idx++) {
1947                 emu->voices[idx].emu = emu;
1948                 emu->voices[idx].number = idx;
1949         }
1950
1951         err = snd_emu10k1_init(emu, enable_ir, 0);
1952         if (err < 0)
1953                 goto error;
1954 #ifdef CONFIG_PM
1955         err = alloc_pm_buffer(emu);
1956         if (err < 0)
1957                 goto error;
1958 #endif
1959
1960         /*  Initialize the effect engine */
1961         err = snd_emu10k1_init_efx(emu);
1962         if (err < 0)
1963                 goto error;
1964         snd_emu10k1_audio_enable(emu);
1965
1966         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
1967         if (err < 0)
1968                 goto error;
1969
1970 #ifdef CONFIG_PROC_FS
1971         snd_emu10k1_proc_init(emu);
1972 #endif
1973
1974         snd_card_set_dev(card, &pci->dev);
1975         *remu = emu;
1976         return 0;
1977
1978  error:
1979         snd_emu10k1_free(emu);
1980         return err;
1981 }
1982
1983 #ifdef CONFIG_PM
1984 static unsigned char saved_regs[] = {
1985         CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1986         FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1987         ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1988         TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1989         MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1990         SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1991         0xff /* end */
1992 };
1993 static unsigned char saved_regs_audigy[] = {
1994         A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1995         A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1996         0xff /* end */
1997 };
1998
1999 static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
2000 {
2001         int size;
2002
2003         size = ARRAY_SIZE(saved_regs);
2004         if (emu->audigy)
2005                 size += ARRAY_SIZE(saved_regs_audigy);
2006         emu->saved_ptr = vmalloc(4 * NUM_G * size);
2007         if (!emu->saved_ptr)
2008                 return -ENOMEM;
2009         if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2010                 return -ENOMEM;
2011         if (emu->card_capabilities->ca0151_chip &&
2012             snd_p16v_alloc_pm_buffer(emu) < 0)
2013                 return -ENOMEM;
2014         return 0;
2015 }
2016
2017 static void free_pm_buffer(struct snd_emu10k1 *emu)
2018 {
2019         vfree(emu->saved_ptr);
2020         snd_emu10k1_efx_free_pm_buffer(emu);
2021         if (emu->card_capabilities->ca0151_chip)
2022                 snd_p16v_free_pm_buffer(emu);
2023 }
2024
2025 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2026 {
2027         int i;
2028         unsigned char *reg;
2029         unsigned int *val;
2030
2031         val = emu->saved_ptr;
2032         for (reg = saved_regs; *reg != 0xff; reg++)
2033                 for (i = 0; i < NUM_G; i++, val++)
2034                         *val = snd_emu10k1_ptr_read(emu, *reg, i);
2035         if (emu->audigy) {
2036                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2037                         for (i = 0; i < NUM_G; i++, val++)
2038                                 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2039         }
2040         if (emu->audigy)
2041                 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2042         emu->saved_hcfg = inl(emu->port + HCFG);
2043 }
2044
2045 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2046 {
2047         if (emu->card_capabilities->ca_cardbus_chip)
2048                 snd_emu10k1_cardbus_init(emu);
2049         if (emu->card_capabilities->ecard)
2050                 snd_emu10k1_ecard_init(emu);
2051         else if (emu->card_capabilities->emu_model)
2052                 snd_emu10k1_emu1010_init(emu);
2053         else
2054                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2055         snd_emu10k1_init(emu, emu->enable_ir, 1);
2056 }
2057
2058 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2059 {
2060         int i;
2061         unsigned char *reg;
2062         unsigned int *val;
2063
2064         snd_emu10k1_audio_enable(emu);
2065
2066         /* resore for spdif */
2067         if (emu->audigy)
2068                 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2069         outl(emu->saved_hcfg, emu->port + HCFG);
2070
2071         val = emu->saved_ptr;
2072         for (reg = saved_regs; *reg != 0xff; reg++)
2073                 for (i = 0; i < NUM_G; i++, val++)
2074                         snd_emu10k1_ptr_write(emu, *reg, i, *val);
2075         if (emu->audigy) {
2076                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2077                         for (i = 0; i < NUM_G; i++, val++)
2078                                 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2079         }
2080 }
2081 #endif