4 * Support for VIA PadLock hardware crypto engine.
6 * Copyright (c) 2004 Michal Ludvig <michal@logix.cz>
8 * Key expansion routine taken from crypto/aes.c
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * ---------------------------------------------------------------------------
16 * Copyright (c) 2002, Dr Brian Gladman <brg@gladman.me.uk>, Worcester, UK.
17 * All rights reserved.
21 * The free distribution and use of this software in both source and binary
22 * form is allowed (with or without changes) provided that:
24 * 1. distributions of this source code include the above copyright
25 * notice, this list of conditions and the following disclaimer;
27 * 2. distributions in binary form include the above copyright
28 * notice, this list of conditions and the following disclaimer
29 * in the documentation and/or other associated materials;
31 * 3. the copyright holder's name is not used to endorse products
32 * built using this software without specific written permission.
34 * ALTERNATIVELY, provided that this notice is retained in full, this product
35 * may be distributed under the terms of the GNU General Public License (GPL),
36 * in which case the provisions of the GPL apply INSTEAD OF those given above.
40 * This software is provided 'as is' with no explicit or implied warranties
41 * in respect of its properties, including, but not limited to, correctness
42 * and/or fitness for purpose.
43 * ---------------------------------------------------------------------------
46 #include <linux/module.h>
47 #include <linux/init.h>
48 #include <linux/types.h>
49 #include <linux/errno.h>
50 #include <linux/crypto.h>
51 #include <linux/interrupt.h>
52 #include <linux/kernel.h>
53 #include <asm/byteorder.h>
56 #define AES_MIN_KEY_SIZE 16 /* in uint8_t units */
57 #define AES_MAX_KEY_SIZE 32 /* ditto */
58 #define AES_BLOCK_SIZE 16 /* ditto */
59 #define AES_EXTENDED_KEY_SIZE 64 /* in uint32_t units */
60 #define AES_EXTENDED_KEY_SIZE_B (AES_EXTENDED_KEY_SIZE * sizeof(uint32_t))
63 uint32_t e_data[AES_EXTENDED_KEY_SIZE];
64 uint32_t d_data[AES_EXTENDED_KEY_SIZE];
74 /* ====== Key management routines ====== */
76 static inline uint32_t
77 generic_rotr32 (const uint32_t x, const unsigned bits)
79 const unsigned n = bits % 32;
80 return (x >> n) | (x << (32 - n));
83 static inline uint32_t
84 generic_rotl32 (const uint32_t x, const unsigned bits)
86 const unsigned n = bits % 32;
87 return (x << n) | (x >> (32 - n));
90 #define rotl generic_rotl32
91 #define rotr generic_rotr32
94 * #define byte(x, nr) ((unsigned char)((x) >> (nr*8)))
97 byte(const uint32_t x, const unsigned n)
102 #define uint32_t_in(x) le32_to_cpu(*(const uint32_t *)(x))
103 #define uint32_t_out(to, from) (*(uint32_t *)(to) = cpu_to_le32(from))
108 static uint8_t pow_tab[256];
109 static uint8_t log_tab[256];
110 static uint8_t sbx_tab[256];
111 static uint8_t isb_tab[256];
112 static uint32_t rco_tab[10];
113 static uint32_t ft_tab[4][256];
114 static uint32_t it_tab[4][256];
116 static uint32_t fl_tab[4][256];
117 static uint32_t il_tab[4][256];
119 static inline uint8_t
120 f_mult (uint8_t a, uint8_t b)
122 uint8_t aa = log_tab[a], cc = aa + log_tab[b];
124 return pow_tab[cc + (cc < aa ? 1 : 0)];
127 #define ff_mult(a,b) (a && b ? f_mult(a, b) : 0)
129 #define f_rn(bo, bi, n, k) \
130 bo[n] = ft_tab[0][byte(bi[n],0)] ^ \
131 ft_tab[1][byte(bi[(n + 1) & 3],1)] ^ \
132 ft_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
133 ft_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
135 #define i_rn(bo, bi, n, k) \
136 bo[n] = it_tab[0][byte(bi[n],0)] ^ \
137 it_tab[1][byte(bi[(n + 3) & 3],1)] ^ \
138 it_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
139 it_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
142 ( fl_tab[0][byte(x, 0)] ^ \
143 fl_tab[1][byte(x, 1)] ^ \
144 fl_tab[2][byte(x, 2)] ^ \
145 fl_tab[3][byte(x, 3)] )
147 #define f_rl(bo, bi, n, k) \
148 bo[n] = fl_tab[0][byte(bi[n],0)] ^ \
149 fl_tab[1][byte(bi[(n + 1) & 3],1)] ^ \
150 fl_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
151 fl_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
153 #define i_rl(bo, bi, n, k) \
154 bo[n] = il_tab[0][byte(bi[n],0)] ^ \
155 il_tab[1][byte(bi[(n + 3) & 3],1)] ^ \
156 il_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
157 il_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
165 /* log and power tables for GF(2**8) finite field with
166 0x011b as modular polynomial - the simplest prmitive
167 root is 0x03, used here to generate the tables */
169 for (i = 0, p = 1; i < 256; ++i) {
170 pow_tab[i] = (uint8_t) p;
171 log_tab[p] = (uint8_t) i;
173 p ^= (p << 1) ^ (p & 0x80 ? 0x01b : 0);
178 for (i = 0, p = 1; i < 10; ++i) {
181 p = (p << 1) ^ (p & 0x80 ? 0x01b : 0);
184 for (i = 0; i < 256; ++i) {
185 p = (i ? pow_tab[255 - log_tab[i]] : 0);
186 q = ((p >> 7) | (p << 1)) ^ ((p >> 6) | (p << 2));
187 p ^= 0x63 ^ q ^ ((q >> 6) | (q << 2));
189 isb_tab[p] = (uint8_t) i;
192 for (i = 0; i < 256; ++i) {
197 fl_tab[1][i] = rotl (t, 8);
198 fl_tab[2][i] = rotl (t, 16);
199 fl_tab[3][i] = rotl (t, 24);
201 t = ((uint32_t) ff_mult (2, p)) |
202 ((uint32_t) p << 8) |
203 ((uint32_t) p << 16) | ((uint32_t) ff_mult (3, p) << 24);
206 ft_tab[1][i] = rotl (t, 8);
207 ft_tab[2][i] = rotl (t, 16);
208 ft_tab[3][i] = rotl (t, 24);
214 il_tab[1][i] = rotl (t, 8);
215 il_tab[2][i] = rotl (t, 16);
216 il_tab[3][i] = rotl (t, 24);
218 t = ((uint32_t) ff_mult (14, p)) |
219 ((uint32_t) ff_mult (9, p) << 8) |
220 ((uint32_t) ff_mult (13, p) << 16) |
221 ((uint32_t) ff_mult (11, p) << 24);
224 it_tab[1][i] = rotl (t, 8);
225 it_tab[2][i] = rotl (t, 16);
226 it_tab[3][i] = rotl (t, 24);
230 #define star_x(x) (((x) & 0x7f7f7f7f) << 1) ^ ((((x) & 0x80808080) >> 7) * 0x1b)
232 #define imix_col(y,x) \
238 (y) ^= rotr(u ^ t, 8) ^ \
242 /* initialise the key schedule from the user supplied key */
245 { t = rotr(t, 8); t = ls_box(t) ^ rco_tab[i]; \
246 t ^= E_KEY[4 * i]; E_KEY[4 * i + 4] = t; \
247 t ^= E_KEY[4 * i + 1]; E_KEY[4 * i + 5] = t; \
248 t ^= E_KEY[4 * i + 2]; E_KEY[4 * i + 6] = t; \
249 t ^= E_KEY[4 * i + 3]; E_KEY[4 * i + 7] = t; \
253 { t = rotr(t, 8); t = ls_box(t) ^ rco_tab[i]; \
254 t ^= E_KEY[6 * i]; E_KEY[6 * i + 6] = t; \
255 t ^= E_KEY[6 * i + 1]; E_KEY[6 * i + 7] = t; \
256 t ^= E_KEY[6 * i + 2]; E_KEY[6 * i + 8] = t; \
257 t ^= E_KEY[6 * i + 3]; E_KEY[6 * i + 9] = t; \
258 t ^= E_KEY[6 * i + 4]; E_KEY[6 * i + 10] = t; \
259 t ^= E_KEY[6 * i + 5]; E_KEY[6 * i + 11] = t; \
263 { t = rotr(t, 8); ; t = ls_box(t) ^ rco_tab[i]; \
264 t ^= E_KEY[8 * i]; E_KEY[8 * i + 8] = t; \
265 t ^= E_KEY[8 * i + 1]; E_KEY[8 * i + 9] = t; \
266 t ^= E_KEY[8 * i + 2]; E_KEY[8 * i + 10] = t; \
267 t ^= E_KEY[8 * i + 3]; E_KEY[8 * i + 11] = t; \
268 t = E_KEY[8 * i + 4] ^ ls_box(t); \
269 E_KEY[8 * i + 12] = t; \
270 t ^= E_KEY[8 * i + 5]; E_KEY[8 * i + 13] = t; \
271 t ^= E_KEY[8 * i + 6]; E_KEY[8 * i + 14] = t; \
272 t ^= E_KEY[8 * i + 7]; E_KEY[8 * i + 15] = t; \
275 /* Tells whether the ACE is capable to generate
276 the extended key for a given key_len. */
278 aes_hw_extkey_available(uint8_t key_len)
280 /* TODO: We should check the actual CPU model/stepping
281 as it's possible that the capability will be
282 added in the next CPU revisions. */
288 static inline struct aes_ctx *aes_ctx(void *ctx)
290 return (struct aes_ctx *)ALIGN((unsigned long)ctx, PADLOCK_ALIGNMENT);
294 aes_set_key(void *ctx_arg, const uint8_t *in_key, unsigned int key_len, uint32_t *flags)
296 struct aes_ctx *ctx = aes_ctx(ctx_arg);
297 uint32_t i, t, u, v, w;
298 uint32_t P[AES_EXTENDED_KEY_SIZE];
301 if (key_len != 16 && key_len != 24 && key_len != 32) {
302 *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
306 ctx->key_length = key_len;
309 * If the hardware is capable of generating the extended key
310 * itself we must supply the plain key for both encryption
313 ctx->E = ctx->e_data;
314 ctx->D = ctx->e_data;
316 E_KEY[0] = uint32_t_in (in_key);
317 E_KEY[1] = uint32_t_in (in_key + 4);
318 E_KEY[2] = uint32_t_in (in_key + 8);
319 E_KEY[3] = uint32_t_in (in_key + 12);
321 /* Prepare control words. */
322 memset(&ctx->cword, 0, sizeof(ctx->cword));
324 ctx->cword.decrypt.encdec = 1;
325 ctx->cword.encrypt.rounds = 10 + (key_len - 16) / 4;
326 ctx->cword.decrypt.rounds = ctx->cword.encrypt.rounds;
327 ctx->cword.encrypt.ksize = (key_len - 16) / 8;
328 ctx->cword.decrypt.ksize = ctx->cword.encrypt.ksize;
330 /* Don't generate extended keys if the hardware can do it. */
331 if (aes_hw_extkey_available(key_len))
334 ctx->D = ctx->d_data;
335 ctx->cword.encrypt.keygen = 1;
336 ctx->cword.decrypt.keygen = 1;
341 for (i = 0; i < 10; ++i)
346 E_KEY[4] = uint32_t_in (in_key + 16);
347 t = E_KEY[5] = uint32_t_in (in_key + 20);
348 for (i = 0; i < 8; ++i)
353 E_KEY[4] = uint32_t_in (in_key + 16);
354 E_KEY[5] = uint32_t_in (in_key + 20);
355 E_KEY[6] = uint32_t_in (in_key + 24);
356 t = E_KEY[7] = uint32_t_in (in_key + 28);
357 for (i = 0; i < 7; ++i)
367 for (i = 4; i < key_len + 24; ++i) {
368 imix_col (D_KEY[i], E_KEY[i]);
371 /* PadLock needs a different format of the decryption key. */
372 rounds = 10 + (key_len - 16) / 4;
374 for (i = 0; i < rounds; i++) {
375 P[((i + 1) * 4) + 0] = D_KEY[((rounds - i - 1) * 4) + 0];
376 P[((i + 1) * 4) + 1] = D_KEY[((rounds - i - 1) * 4) + 1];
377 P[((i + 1) * 4) + 2] = D_KEY[((rounds - i - 1) * 4) + 2];
378 P[((i + 1) * 4) + 3] = D_KEY[((rounds - i - 1) * 4) + 3];
381 P[0] = E_KEY[(rounds * 4) + 0];
382 P[1] = E_KEY[(rounds * 4) + 1];
383 P[2] = E_KEY[(rounds * 4) + 2];
384 P[3] = E_KEY[(rounds * 4) + 3];
386 memcpy(D_KEY, P, AES_EXTENDED_KEY_SIZE_B);
391 /* ====== Encryption/decryption routines ====== */
393 /* These are the real call to PadLock. */
394 static inline void padlock_xcrypt_ecb(const u8 *input, u8 *output, void *key,
395 void *control_word, u32 count)
397 asm volatile ("pushfl; popfl"); /* enforce key reload. */
398 asm volatile (".byte 0xf3,0x0f,0xa7,0xc8" /* rep xcryptecb */
399 : "+S"(input), "+D"(output)
400 : "d"(control_word), "b"(key), "c"(count));
403 static inline void padlock_xcrypt_cbc(const u8 *input, u8 *output, void *key,
404 u8 *iv, void *control_word, u32 count)
406 /* Enforce key reload. */
407 asm volatile ("pushfl; popfl");
409 asm volatile (".byte 0xf3,0x0f,0xa7,0xd0"
410 : "+S" (input), "+D" (output), "+a" (iv)
411 : "d" (control_word), "b" (key), "c" (count));
415 aes_encrypt(void *ctx_arg, uint8_t *out, const uint8_t *in)
417 struct aes_ctx *ctx = aes_ctx(ctx_arg);
418 padlock_xcrypt_ecb(in, out, ctx->E, &ctx->cword.encrypt, 1);
422 aes_decrypt(void *ctx_arg, uint8_t *out, const uint8_t *in)
424 struct aes_ctx *ctx = aes_ctx(ctx_arg);
425 padlock_xcrypt_ecb(in, out, ctx->D, &ctx->cword.decrypt, 1);
428 static unsigned int aes_encrypt_ecb(const struct cipher_desc *desc, u8 *out,
429 const u8 *in, unsigned int nbytes)
431 struct aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(desc->tfm));
432 padlock_xcrypt_ecb(in, out, ctx->E, &ctx->cword.encrypt,
433 nbytes / AES_BLOCK_SIZE);
434 return nbytes & ~(AES_BLOCK_SIZE - 1);
437 static unsigned int aes_decrypt_ecb(const struct cipher_desc *desc, u8 *out,
438 const u8 *in, unsigned int nbytes)
440 struct aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(desc->tfm));
441 padlock_xcrypt_ecb(in, out, ctx->D, &ctx->cword.decrypt,
442 nbytes / AES_BLOCK_SIZE);
443 return nbytes & ~(AES_BLOCK_SIZE - 1);
446 static unsigned int aes_encrypt_cbc(const struct cipher_desc *desc, u8 *out,
447 const u8 *in, unsigned int nbytes)
449 struct aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(desc->tfm));
450 padlock_xcrypt_cbc(in, out, ctx->E, desc->info, &ctx->cword.encrypt,
451 nbytes / AES_BLOCK_SIZE);
452 return nbytes & ~(AES_BLOCK_SIZE - 1);
455 static unsigned int aes_decrypt_cbc(const struct cipher_desc *desc, u8 *out,
456 const u8 *in, unsigned int nbytes)
458 struct aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(desc->tfm));
459 padlock_xcrypt_cbc(in, out, ctx->D, desc->info, &ctx->cword.decrypt,
460 nbytes / AES_BLOCK_SIZE);
461 return nbytes & ~(AES_BLOCK_SIZE - 1);
464 static struct crypto_alg aes_alg = {
466 .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
467 .cra_blocksize = AES_BLOCK_SIZE,
468 .cra_ctxsize = sizeof(struct aes_ctx) +
470 .cra_alignmask = PADLOCK_ALIGNMENT - 1,
471 .cra_module = THIS_MODULE,
472 .cra_list = LIST_HEAD_INIT(aes_alg.cra_list),
475 .cia_min_keysize = AES_MIN_KEY_SIZE,
476 .cia_max_keysize = AES_MAX_KEY_SIZE,
477 .cia_setkey = aes_set_key,
478 .cia_encrypt = aes_encrypt,
479 .cia_decrypt = aes_decrypt,
480 .cia_encrypt_ecb = aes_encrypt_ecb,
481 .cia_decrypt_ecb = aes_decrypt_ecb,
482 .cia_encrypt_cbc = aes_encrypt_cbc,
483 .cia_decrypt_cbc = aes_decrypt_cbc,
488 int __init padlock_init_aes(void)
490 printk(KERN_NOTICE PFX "Using VIA PadLock ACE for AES algorithm.\n");
493 return crypto_register_alg(&aes_alg);
496 void __exit padlock_fini_aes(void)
498 crypto_unregister_alg(&aes_alg);