2 * dme1737.c - Driver for the SMSC DME1737, Asus A8000, and SMSC SCH311x
3 * Super-I/O chips integrated hardware monitoring features.
4 * Copyright (c) 2007 Juerg Haefliger <juergh@gmail.com>
6 * This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access
7 * the chip registers if a DME1737 (or A8000) is found and the ISA bus if a
8 * SCH311x chip is found. Both types of chips have very similar hardware
9 * monitoring capabilities but differ in the way they can be accessed.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include <linux/module.h>
27 #include <linux/init.h>
28 #include <linux/slab.h>
29 #include <linux/jiffies.h>
30 #include <linux/i2c.h>
31 #include <linux/platform_device.h>
32 #include <linux/hwmon.h>
33 #include <linux/hwmon-sysfs.h>
34 #include <linux/hwmon-vid.h>
35 #include <linux/err.h>
36 #include <linux/mutex.h>
39 /* ISA device, if found */
40 static struct platform_device *pdev;
42 /* Module load parameters */
43 static int force_start;
44 module_param(force_start, bool, 0);
45 MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs");
47 /* Addresses to scan */
48 static unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END};
50 /* Insmod parameters */
51 I2C_CLIENT_INSMOD_1(dme1737);
53 /* ---------------------------------------------------------------------
56 * The sensors are defined as follows:
58 * Voltages Temperatures
59 * -------- ------------
60 * in0 +5VTR (+5V stdby) temp1 Remote diode 1
61 * in1 Vccp (proc core) temp2 Internal temp
62 * in2 VCC (internal +3.3V) temp3 Remote diode 2
65 * in5 VTR (+3.3V stby)
68 * --------------------------------------------------------------------- */
70 /* Voltages (in) numbered 0-6 (ix) */
71 #define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) \
73 #define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \
75 #define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \
78 /* Temperatures (temp) numbered 0-2 (ix) */
79 #define DME1737_REG_TEMP(ix) (0x25 + (ix))
80 #define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2)
81 #define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2)
82 #define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \
85 /* Voltage and temperature LSBs
86 * The LSBs (4 bits each) are stored in 5 registers with the following layouts:
87 * IN_TEMP_LSB(0) = [in5, in6]
88 * IN_TEMP_LSB(1) = [temp3, temp1]
89 * IN_TEMP_LSB(2) = [in4, temp2]
90 * IN_TEMP_LSB(3) = [in3, in0]
91 * IN_TEMP_LSB(4) = [in2, in1] */
92 #define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix))
93 static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0};
94 static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4};
95 static const u8 DME1737_REG_TEMP_LSB[] = {1, 2, 1};
96 static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0};
98 /* Fans numbered 0-5 (ix) */
99 #define DME1737_REG_FAN(ix) ((ix) < 4 ? 0x28 + (ix) * 2 \
101 #define DME1737_REG_FAN_MIN(ix) ((ix) < 4 ? 0x54 + (ix) * 2 \
103 #define DME1737_REG_FAN_OPT(ix) ((ix) < 4 ? 0x90 + (ix) \
105 #define DME1737_REG_FAN_MAX(ix) (0xb4 + (ix)) /* only for fan[4-5] */
107 /* PWMs numbered 0-2, 4-5 (ix) */
108 #define DME1737_REG_PWM(ix) ((ix) < 3 ? 0x30 + (ix) \
110 #define DME1737_REG_PWM_CONFIG(ix) (0x5c + (ix)) /* only for pwm[0-2] */
111 #define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */
112 #define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \
114 /* The layout of the ramp rate registers is different from the other pwm
115 * registers. The bits for the 3 PWMs are stored in 2 registers:
116 * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0]
117 * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */
118 #define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */
120 /* Thermal zones 0-2 */
121 #define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix))
122 #define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix))
123 /* The layout of the hysteresis registers is different from the other zone
124 * registers. The bits for the 3 zones are stored in 2 registers:
125 * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
126 * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */
127 #define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix))
129 /* Alarm registers and bit mapping
130 * The 3 8-bit alarm registers will be concatenated to a single 32-bit
131 * alarm value [0, ALARM3, ALARM2, ALARM1]. */
132 #define DME1737_REG_ALARM1 0x41
133 #define DME1737_REG_ALARM2 0x42
134 #define DME1737_REG_ALARM3 0x83
135 static const u8 DME1737_BIT_ALARM_IN[] = {0, 1, 2, 3, 8, 16, 17};
136 static const u8 DME1737_BIT_ALARM_TEMP[] = {4, 5, 6};
137 static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23};
139 /* Miscellaneous registers */
140 #define DME1737_REG_DEVICE 0x3d
141 #define DME1737_REG_COMPANY 0x3e
142 #define DME1737_REG_VERSTEP 0x3f
143 #define DME1737_REG_CONFIG 0x40
144 #define DME1737_REG_CONFIG2 0x7f
145 #define DME1737_REG_VID 0x43
146 #define DME1737_REG_TACH_PWM 0x81
148 /* ---------------------------------------------------------------------
150 * --------------------------------------------------------------------- */
152 /* Chip identification */
153 #define DME1737_COMPANY_SMSC 0x5c
154 #define DME1737_VERSTEP 0x88
155 #define DME1737_VERSTEP_MASK 0xf8
156 #define SCH311X_DEVICE 0x8c
158 /* Length of ISA address segment */
159 #define DME1737_EXTENT 2
161 /* ---------------------------------------------------------------------
162 * Data structures and manipulation thereof
163 * --------------------------------------------------------------------- */
165 /* For ISA chips, we abuse the i2c_client addr and name fields. We also use
166 the driver field to differentiate between I2C and ISA chips. */
167 struct dme1737_data {
168 struct i2c_client client;
169 struct device *hwmon_dev;
171 struct mutex update_lock;
172 int valid; /* !=0 if following fields are valid */
173 unsigned long last_update; /* in jiffies */
174 unsigned long last_vbat; /* in jiffies */
181 /* Register values */
208 /* Nominal voltage values */
209 static const int IN_NOMINAL[] = {5000, 2250, 3300, 5000, 12000, 3300, 3300};
212 * Voltage inputs have 16 bits resolution, limit values have 8 bits
214 static inline int IN_FROM_REG(int reg, int ix, int res)
216 return (reg * IN_NOMINAL[ix] + (3 << (res - 3))) / (3 << (res - 2));
219 static inline int IN_TO_REG(int val, int ix)
221 return SENSORS_LIMIT((val * 192 + IN_NOMINAL[ix] / 2) /
222 IN_NOMINAL[ix], 0, 255);
226 * The register values represent temperatures in 2's complement notation from
227 * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit
228 * values have 8 bits resolution. */
229 static inline int TEMP_FROM_REG(int reg, int res)
231 return (reg * 1000) >> (res - 8);
234 static inline int TEMP_TO_REG(int val)
236 return SENSORS_LIMIT((val < 0 ? val - 500 : val + 500) / 1000,
240 /* Temperature range */
241 static const int TEMP_RANGE[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000,
242 10000, 13333, 16000, 20000, 26666, 32000,
243 40000, 53333, 80000};
245 static inline int TEMP_RANGE_FROM_REG(int reg)
247 return TEMP_RANGE[(reg >> 4) & 0x0f];
250 static int TEMP_RANGE_TO_REG(int val, int reg)
254 for (i = 15; i > 0; i--) {
255 if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2) {
260 return (reg & 0x0f) | (i << 4);
263 /* Temperature hysteresis
265 * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
266 * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */
267 static inline int TEMP_HYST_FROM_REG(int reg, int ix)
269 return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000;
272 static inline int TEMP_HYST_TO_REG(int val, int ix, int reg)
274 int hyst = SENSORS_LIMIT((val + 500) / 1000, 0, 15);
276 return (ix == 1) ? (reg & 0xf0) | hyst : (reg & 0x0f) | (hyst << 4);
280 static inline int FAN_FROM_REG(int reg, int tpc)
282 return (reg == 0 || reg == 0xffff) ? 0 :
283 (tpc == 0) ? 90000 * 60 / reg : tpc * reg;
286 static inline int FAN_TO_REG(int val, int tpc)
288 return SENSORS_LIMIT((tpc == 0) ? 90000 * 60 / val : val / tpc,
292 /* Fan TPC (tach pulse count)
293 * Converts a register value to a TPC multiplier or returns 0 if the tachometer
294 * is configured in legacy (non-tpc) mode */
295 static inline int FAN_TPC_FROM_REG(int reg)
297 return (reg & 0x20) ? 0 : 60 >> (reg & 0x03);
301 * The type of a fan is expressed in number of pulses-per-revolution that it
303 static inline int FAN_TYPE_FROM_REG(int reg)
305 int edge = (reg >> 1) & 0x03;
307 return (edge > 0) ? 1 << (edge - 1) : 0;
310 static inline int FAN_TYPE_TO_REG(int val, int reg)
312 int edge = (val == 4) ? 3 : val;
314 return (reg & 0xf9) | (edge << 1);
318 static const int FAN_MAX[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12,
321 static int FAN_MAX_FROM_REG(int reg)
325 for (i = 10; i > 0; i--) {
326 if (reg == FAN_MAX[i]) {
331 return 1000 + i * 500;
334 static int FAN_MAX_TO_REG(int val)
338 for (i = 10; i > 0; i--) {
339 if (val > (1000 + (i - 1) * 500)) {
348 * Register to enable mapping:
349 * 000: 2 fan on zone 1 auto
350 * 001: 2 fan on zone 2 auto
351 * 010: 2 fan on zone 3 auto
353 * 100: -1 fan disabled
354 * 101: 2 fan on hottest of zones 2,3 auto
355 * 110: 2 fan on hottest of zones 1,2,3 auto
356 * 111: 1 fan in manual mode */
357 static inline int PWM_EN_FROM_REG(int reg)
359 static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1};
361 return en[(reg >> 5) & 0x07];
364 static inline int PWM_EN_TO_REG(int val, int reg)
366 int en = (val == 1) ? 7 : 3;
368 return (reg & 0x1f) | ((en & 0x07) << 5);
371 /* PWM auto channels zone
372 * Register to auto channels zone mapping (ACZ is a bitfield with bit x
373 * corresponding to zone x+1):
374 * 000: 001 fan on zone 1 auto
375 * 001: 010 fan on zone 2 auto
376 * 010: 100 fan on zone 3 auto
377 * 011: 000 fan full on
378 * 100: 000 fan disabled
379 * 101: 110 fan on hottest of zones 2,3 auto
380 * 110: 111 fan on hottest of zones 1,2,3 auto
381 * 111: 000 fan in manual mode */
382 static inline int PWM_ACZ_FROM_REG(int reg)
384 static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0};
386 return acz[(reg >> 5) & 0x07];
389 static inline int PWM_ACZ_TO_REG(int val, int reg)
391 int acz = (val == 4) ? 2 : val - 1;
393 return (reg & 0x1f) | ((acz & 0x07) << 5);
397 static const int PWM_FREQ[] = {11, 15, 22, 29, 35, 44, 59, 88,
398 15000, 20000, 30000, 25000, 0, 0, 0, 0};
400 static inline int PWM_FREQ_FROM_REG(int reg)
402 return PWM_FREQ[reg & 0x0f];
405 static int PWM_FREQ_TO_REG(int val, int reg)
409 /* the first two cases are special - stupid chip design! */
412 } else if (val > 22500) {
415 for (i = 9; i > 0; i--) {
416 if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2) {
422 return (reg & 0xf0) | i;
427 * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0]
428 * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */
429 static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5};
431 static inline int PWM_RR_FROM_REG(int reg, int ix)
433 int rr = (ix == 1) ? reg >> 4 : reg;
435 return (rr & 0x08) ? PWM_RR[rr & 0x07] : 0;
438 static int PWM_RR_TO_REG(int val, int ix, int reg)
442 for (i = 0; i < 7; i++) {
443 if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2) {
448 return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i;
451 /* PWM ramp rate enable */
452 static inline int PWM_RR_EN_FROM_REG(int reg, int ix)
454 return PWM_RR_FROM_REG(reg, ix) ? 1 : 0;
457 static inline int PWM_RR_EN_TO_REG(int val, int ix, int reg)
459 int en = (ix == 1) ? 0x80 : 0x08;
461 return val ? reg | en : reg & ~en;
465 * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for
466 * the register layout). */
467 static inline int PWM_OFF_FROM_REG(int reg, int ix)
469 return (reg >> (ix + 5)) & 0x01;
472 static inline int PWM_OFF_TO_REG(int val, int ix, int reg)
474 return (reg & ~(1 << (ix + 5))) | ((val & 0x01) << (ix + 5));
477 /* ---------------------------------------------------------------------
480 * ISA access is performed through an index/data register pair and needs to
481 * be protected by a mutex during runtime (not required for initialization).
482 * We use data->update_lock for this and need to ensure that we acquire it
483 * before calling dme1737_read or dme1737_write.
484 * --------------------------------------------------------------------- */
486 static u8 dme1737_read(struct i2c_client *client, u8 reg)
490 if (client->driver) { /* I2C device */
491 val = i2c_smbus_read_byte_data(client, reg);
494 dev_warn(&client->dev, "Read from register "
495 "0x%02x failed! Please report to the driver "
496 "maintainer.\n", reg);
498 } else { /* ISA device */
499 outb(reg, client->addr);
500 val = inb(client->addr + 1);
506 static s32 dme1737_write(struct i2c_client *client, u8 reg, u8 val)
510 if (client->driver) { /* I2C device */
511 res = i2c_smbus_write_byte_data(client, reg, val);
514 dev_warn(&client->dev, "Write to register "
515 "0x%02x failed! Please report to the driver "
516 "maintainer.\n", reg);
518 } else { /* ISA device */
519 outb(reg, client->addr);
520 outb(val, client->addr + 1);
526 static struct dme1737_data *dme1737_update_device(struct device *dev)
528 struct dme1737_data *data = dev_get_drvdata(dev);
529 struct i2c_client *client = &data->client;
533 mutex_lock(&data->update_lock);
535 /* Enable a Vbat monitoring cycle every 10 mins */
536 if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) {
537 dme1737_write(client, DME1737_REG_CONFIG, dme1737_read(client,
538 DME1737_REG_CONFIG) | 0x10);
539 data->last_vbat = jiffies;
542 /* Sample register contents every 1 sec */
543 if (time_after(jiffies, data->last_update + HZ) || !data->valid) {
544 data->vid = dme1737_read(client, DME1737_REG_VID) & 0x3f;
546 /* In (voltage) registers */
547 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
548 /* Voltage inputs are stored as 16 bit values even
549 * though they have only 12 bits resolution. This is
550 * to make it consistent with the temp inputs. */
551 data->in[ix] = dme1737_read(client,
552 DME1737_REG_IN(ix)) << 8;
553 data->in_min[ix] = dme1737_read(client,
554 DME1737_REG_IN_MIN(ix));
555 data->in_max[ix] = dme1737_read(client,
556 DME1737_REG_IN_MAX(ix));
560 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
561 /* Temp inputs are stored as 16 bit values even
562 * though they have only 12 bits resolution. This is
563 * to take advantage of implicit conversions between
564 * register values (2's complement) and temp values
565 * (signed decimal). */
566 data->temp[ix] = dme1737_read(client,
567 DME1737_REG_TEMP(ix)) << 8;
568 data->temp_min[ix] = dme1737_read(client,
569 DME1737_REG_TEMP_MIN(ix));
570 data->temp_max[ix] = dme1737_read(client,
571 DME1737_REG_TEMP_MAX(ix));
572 data->temp_offset[ix] = dme1737_read(client,
573 DME1737_REG_TEMP_OFFSET(ix));
576 /* In and temp LSB registers
577 * The LSBs are latched when the MSBs are read, so the order in
578 * which the registers are read (MSB first, then LSB) is
580 for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) {
581 lsb[ix] = dme1737_read(client,
582 DME1737_REG_IN_TEMP_LSB(ix));
584 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
585 data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] <<
586 DME1737_REG_IN_LSB_SHL[ix]) & 0xf0;
588 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
589 data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] <<
590 DME1737_REG_TEMP_LSB_SHL[ix]) & 0xf0;
594 for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) {
595 /* Skip reading registers if optional fans are not
597 if (!(data->has_fan & (1 << ix))) {
600 data->fan[ix] = dme1737_read(client,
601 DME1737_REG_FAN(ix));
602 data->fan[ix] |= dme1737_read(client,
603 DME1737_REG_FAN(ix) + 1) << 8;
604 data->fan_min[ix] = dme1737_read(client,
605 DME1737_REG_FAN_MIN(ix));
606 data->fan_min[ix] |= dme1737_read(client,
607 DME1737_REG_FAN_MIN(ix) + 1) << 8;
608 data->fan_opt[ix] = dme1737_read(client,
609 DME1737_REG_FAN_OPT(ix));
610 /* fan_max exists only for fan[5-6] */
612 data->fan_max[ix - 4] = dme1737_read(client,
613 DME1737_REG_FAN_MAX(ix));
618 for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) {
619 /* Skip reading registers if optional PWMs are not
621 if (!(data->has_pwm & (1 << ix))) {
624 data->pwm[ix] = dme1737_read(client,
625 DME1737_REG_PWM(ix));
626 data->pwm_freq[ix] = dme1737_read(client,
627 DME1737_REG_PWM_FREQ(ix));
628 /* pwm_config and pwm_min exist only for pwm[1-3] */
630 data->pwm_config[ix] = dme1737_read(client,
631 DME1737_REG_PWM_CONFIG(ix));
632 data->pwm_min[ix] = dme1737_read(client,
633 DME1737_REG_PWM_MIN(ix));
636 for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) {
637 data->pwm_rr[ix] = dme1737_read(client,
638 DME1737_REG_PWM_RR(ix));
641 /* Thermal zone registers */
642 for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) {
643 data->zone_low[ix] = dme1737_read(client,
644 DME1737_REG_ZONE_LOW(ix));
645 data->zone_abs[ix] = dme1737_read(client,
646 DME1737_REG_ZONE_ABS(ix));
648 for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) {
649 data->zone_hyst[ix] = dme1737_read(client,
650 DME1737_REG_ZONE_HYST(ix));
653 /* Alarm registers */
654 data->alarms = dme1737_read(client,
656 /* Bit 7 tells us if the other alarm registers are non-zero and
657 * therefore also need to be read */
658 if (data->alarms & 0x80) {
659 data->alarms |= dme1737_read(client,
660 DME1737_REG_ALARM2) << 8;
661 data->alarms |= dme1737_read(client,
662 DME1737_REG_ALARM3) << 16;
665 /* The ISA chips require explicit clearing of alarm bits.
666 * Don't worry, an alarm will come back if the condition
667 * that causes it still exists */
668 if (!client->driver) {
669 if (data->alarms & 0xff0000) {
670 dme1737_write(client, DME1737_REG_ALARM3,
673 if (data->alarms & 0xff00) {
674 dme1737_write(client, DME1737_REG_ALARM2,
677 if (data->alarms & 0xff) {
678 dme1737_write(client, DME1737_REG_ALARM1,
683 data->last_update = jiffies;
687 mutex_unlock(&data->update_lock);
692 /* ---------------------------------------------------------------------
693 * Voltage sysfs attributes
695 * --------------------------------------------------------------------- */
697 #define SYS_IN_INPUT 0
700 #define SYS_IN_ALARM 3
702 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
705 struct dme1737_data *data = dme1737_update_device(dev);
706 struct sensor_device_attribute_2
707 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
708 int ix = sensor_attr_2->index;
709 int fn = sensor_attr_2->nr;
714 res = IN_FROM_REG(data->in[ix], ix, 16);
717 res = IN_FROM_REG(data->in_min[ix], ix, 8);
720 res = IN_FROM_REG(data->in_max[ix], ix, 8);
723 res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01;
727 dev_dbg(dev, "Unknown function %d.\n", fn);
730 return sprintf(buf, "%d\n", res);
733 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
734 const char *buf, size_t count)
736 struct dme1737_data *data = dev_get_drvdata(dev);
737 struct i2c_client *client = &data->client;
738 struct sensor_device_attribute_2
739 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
740 int ix = sensor_attr_2->index;
741 int fn = sensor_attr_2->nr;
742 long val = simple_strtol(buf, NULL, 10);
744 mutex_lock(&data->update_lock);
747 data->in_min[ix] = IN_TO_REG(val, ix);
748 dme1737_write(client, DME1737_REG_IN_MIN(ix),
752 data->in_max[ix] = IN_TO_REG(val, ix);
753 dme1737_write(client, DME1737_REG_IN_MAX(ix),
757 dev_dbg(dev, "Unknown function %d.\n", fn);
759 mutex_unlock(&data->update_lock);
764 /* ---------------------------------------------------------------------
765 * Temperature sysfs attributes
767 * --------------------------------------------------------------------- */
769 #define SYS_TEMP_INPUT 0
770 #define SYS_TEMP_MIN 1
771 #define SYS_TEMP_MAX 2
772 #define SYS_TEMP_OFFSET 3
773 #define SYS_TEMP_ALARM 4
774 #define SYS_TEMP_FAULT 5
776 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
779 struct dme1737_data *data = dme1737_update_device(dev);
780 struct sensor_device_attribute_2
781 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
782 int ix = sensor_attr_2->index;
783 int fn = sensor_attr_2->nr;
788 res = TEMP_FROM_REG(data->temp[ix], 16);
791 res = TEMP_FROM_REG(data->temp_min[ix], 8);
794 res = TEMP_FROM_REG(data->temp_max[ix], 8);
796 case SYS_TEMP_OFFSET:
797 res = TEMP_FROM_REG(data->temp_offset[ix], 8);
800 res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01;
803 res = (((u16)data->temp[ix] & 0xff00) == 0x8000);
807 dev_dbg(dev, "Unknown function %d.\n", fn);
810 return sprintf(buf, "%d\n", res);
813 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
814 const char *buf, size_t count)
816 struct dme1737_data *data = dev_get_drvdata(dev);
817 struct i2c_client *client = &data->client;
818 struct sensor_device_attribute_2
819 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
820 int ix = sensor_attr_2->index;
821 int fn = sensor_attr_2->nr;
822 long val = simple_strtol(buf, NULL, 10);
824 mutex_lock(&data->update_lock);
827 data->temp_min[ix] = TEMP_TO_REG(val);
828 dme1737_write(client, DME1737_REG_TEMP_MIN(ix),
832 data->temp_max[ix] = TEMP_TO_REG(val);
833 dme1737_write(client, DME1737_REG_TEMP_MAX(ix),
836 case SYS_TEMP_OFFSET:
837 data->temp_offset[ix] = TEMP_TO_REG(val);
838 dme1737_write(client, DME1737_REG_TEMP_OFFSET(ix),
839 data->temp_offset[ix]);
842 dev_dbg(dev, "Unknown function %d.\n", fn);
844 mutex_unlock(&data->update_lock);
849 /* ---------------------------------------------------------------------
850 * Zone sysfs attributes
852 * --------------------------------------------------------------------- */
854 #define SYS_ZONE_AUTO_CHANNELS_TEMP 0
855 #define SYS_ZONE_AUTO_POINT1_TEMP_HYST 1
856 #define SYS_ZONE_AUTO_POINT1_TEMP 2
857 #define SYS_ZONE_AUTO_POINT2_TEMP 3
858 #define SYS_ZONE_AUTO_POINT3_TEMP 4
860 static ssize_t show_zone(struct device *dev, struct device_attribute *attr,
863 struct dme1737_data *data = dme1737_update_device(dev);
864 struct sensor_device_attribute_2
865 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
866 int ix = sensor_attr_2->index;
867 int fn = sensor_attr_2->nr;
871 case SYS_ZONE_AUTO_CHANNELS_TEMP:
872 /* check config2 for non-standard temp-to-zone mapping */
873 if ((ix == 1) && (data->config2 & 0x02)) {
879 case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
880 res = TEMP_FROM_REG(data->zone_low[ix], 8) -
881 TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix);
883 case SYS_ZONE_AUTO_POINT1_TEMP:
884 res = TEMP_FROM_REG(data->zone_low[ix], 8);
886 case SYS_ZONE_AUTO_POINT2_TEMP:
887 /* pwm_freq holds the temp range bits in the upper nibble */
888 res = TEMP_FROM_REG(data->zone_low[ix], 8) +
889 TEMP_RANGE_FROM_REG(data->pwm_freq[ix]);
891 case SYS_ZONE_AUTO_POINT3_TEMP:
892 res = TEMP_FROM_REG(data->zone_abs[ix], 8);
896 dev_dbg(dev, "Unknown function %d.\n", fn);
899 return sprintf(buf, "%d\n", res);
902 static ssize_t set_zone(struct device *dev, struct device_attribute *attr,
903 const char *buf, size_t count)
905 struct dme1737_data *data = dev_get_drvdata(dev);
906 struct i2c_client *client = &data->client;
907 struct sensor_device_attribute_2
908 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
909 int ix = sensor_attr_2->index;
910 int fn = sensor_attr_2->nr;
911 long val = simple_strtol(buf, NULL, 10);
913 mutex_lock(&data->update_lock);
915 case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
916 /* Refresh the cache */
917 data->zone_low[ix] = dme1737_read(client,
918 DME1737_REG_ZONE_LOW(ix));
919 /* Modify the temp hyst value */
920 data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG(
921 TEMP_FROM_REG(data->zone_low[ix], 8) -
922 val, ix, dme1737_read(client,
923 DME1737_REG_ZONE_HYST(ix == 2)));
924 dme1737_write(client, DME1737_REG_ZONE_HYST(ix == 2),
925 data->zone_hyst[ix == 2]);
927 case SYS_ZONE_AUTO_POINT1_TEMP:
928 data->zone_low[ix] = TEMP_TO_REG(val);
929 dme1737_write(client, DME1737_REG_ZONE_LOW(ix),
932 case SYS_ZONE_AUTO_POINT2_TEMP:
933 /* Refresh the cache */
934 data->zone_low[ix] = dme1737_read(client,
935 DME1737_REG_ZONE_LOW(ix));
936 /* Modify the temp range value (which is stored in the upper
937 * nibble of the pwm_freq register) */
938 data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val -
939 TEMP_FROM_REG(data->zone_low[ix], 8),
941 DME1737_REG_PWM_FREQ(ix)));
942 dme1737_write(client, DME1737_REG_PWM_FREQ(ix),
945 case SYS_ZONE_AUTO_POINT3_TEMP:
946 data->zone_abs[ix] = TEMP_TO_REG(val);
947 dme1737_write(client, DME1737_REG_ZONE_ABS(ix),
951 dev_dbg(dev, "Unknown function %d.\n", fn);
953 mutex_unlock(&data->update_lock);
958 /* ---------------------------------------------------------------------
959 * Fan sysfs attributes
961 * --------------------------------------------------------------------- */
963 #define SYS_FAN_INPUT 0
964 #define SYS_FAN_MIN 1
965 #define SYS_FAN_MAX 2
966 #define SYS_FAN_ALARM 3
967 #define SYS_FAN_TYPE 4
969 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
972 struct dme1737_data *data = dme1737_update_device(dev);
973 struct sensor_device_attribute_2
974 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
975 int ix = sensor_attr_2->index;
976 int fn = sensor_attr_2->nr;
981 res = FAN_FROM_REG(data->fan[ix],
983 FAN_TPC_FROM_REG(data->fan_opt[ix]));
986 res = FAN_FROM_REG(data->fan_min[ix],
988 FAN_TPC_FROM_REG(data->fan_opt[ix]));
991 /* only valid for fan[5-6] */
992 res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]);
995 res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01;
998 /* only valid for fan[1-4] */
999 res = FAN_TYPE_FROM_REG(data->fan_opt[ix]);
1003 dev_dbg(dev, "Unknown function %d.\n", fn);
1006 return sprintf(buf, "%d\n", res);
1009 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1010 const char *buf, size_t count)
1012 struct dme1737_data *data = dev_get_drvdata(dev);
1013 struct i2c_client *client = &data->client;
1014 struct sensor_device_attribute_2
1015 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1016 int ix = sensor_attr_2->index;
1017 int fn = sensor_attr_2->nr;
1018 long val = simple_strtol(buf, NULL, 10);
1020 mutex_lock(&data->update_lock);
1024 data->fan_min[ix] = FAN_TO_REG(val, 0);
1026 /* Refresh the cache */
1027 data->fan_opt[ix] = dme1737_read(client,
1028 DME1737_REG_FAN_OPT(ix));
1029 /* Modify the fan min value */
1030 data->fan_min[ix] = FAN_TO_REG(val,
1031 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1033 dme1737_write(client, DME1737_REG_FAN_MIN(ix),
1034 data->fan_min[ix] & 0xff);
1035 dme1737_write(client, DME1737_REG_FAN_MIN(ix) + 1,
1036 data->fan_min[ix] >> 8);
1039 /* Only valid for fan[5-6] */
1040 data->fan_max[ix - 4] = FAN_MAX_TO_REG(val);
1041 dme1737_write(client, DME1737_REG_FAN_MAX(ix),
1042 data->fan_max[ix - 4]);
1045 /* Only valid for fan[1-4] */
1046 if (!(val == 1 || val == 2 || val == 4)) {
1048 dev_warn(dev, "Fan type value %ld not "
1049 "supported. Choose one of 1, 2, or 4.\n",
1053 data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(client,
1054 DME1737_REG_FAN_OPT(ix)));
1055 dme1737_write(client, DME1737_REG_FAN_OPT(ix),
1059 dev_dbg(dev, "Unknown function %d.\n", fn);
1062 mutex_unlock(&data->update_lock);
1067 /* ---------------------------------------------------------------------
1068 * PWM sysfs attributes
1070 * --------------------------------------------------------------------- */
1073 #define SYS_PWM_FREQ 1
1074 #define SYS_PWM_ENABLE 2
1075 #define SYS_PWM_RAMP_RATE 3
1076 #define SYS_PWM_AUTO_CHANNELS_ZONE 4
1077 #define SYS_PWM_AUTO_PWM_MIN 5
1078 #define SYS_PWM_AUTO_POINT1_PWM 6
1079 #define SYS_PWM_AUTO_POINT2_PWM 7
1081 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1084 struct dme1737_data *data = dme1737_update_device(dev);
1085 struct sensor_device_attribute_2
1086 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1087 int ix = sensor_attr_2->index;
1088 int fn = sensor_attr_2->nr;
1093 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) {
1096 res = data->pwm[ix];
1100 res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]);
1102 case SYS_PWM_ENABLE:
1104 res = 1; /* pwm[5-6] hard-wired to manual mode */
1106 res = PWM_EN_FROM_REG(data->pwm_config[ix]);
1109 case SYS_PWM_RAMP_RATE:
1110 /* Only valid for pwm[1-3] */
1111 res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix);
1113 case SYS_PWM_AUTO_CHANNELS_ZONE:
1114 /* Only valid for pwm[1-3] */
1115 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1116 res = PWM_ACZ_FROM_REG(data->pwm_config[ix]);
1118 res = data->pwm_acz[ix];
1121 case SYS_PWM_AUTO_PWM_MIN:
1122 /* Only valid for pwm[1-3] */
1123 if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) {
1124 res = data->pwm_min[ix];
1129 case SYS_PWM_AUTO_POINT1_PWM:
1130 /* Only valid for pwm[1-3] */
1131 res = data->pwm_min[ix];
1133 case SYS_PWM_AUTO_POINT2_PWM:
1134 /* Only valid for pwm[1-3] */
1135 res = 255; /* hard-wired */
1139 dev_dbg(dev, "Unknown function %d.\n", fn);
1142 return sprintf(buf, "%d\n", res);
1145 static struct attribute *dme1737_attr_pwm[];
1146 static void dme1737_chmod_file(struct device*, struct attribute*, mode_t);
1148 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1149 const char *buf, size_t count)
1151 struct dme1737_data *data = dev_get_drvdata(dev);
1152 struct i2c_client *client = &data->client;
1153 struct sensor_device_attribute_2
1154 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1155 int ix = sensor_attr_2->index;
1156 int fn = sensor_attr_2->nr;
1157 long val = simple_strtol(buf, NULL, 10);
1159 mutex_lock(&data->update_lock);
1162 data->pwm[ix] = SENSORS_LIMIT(val, 0, 255);
1163 dme1737_write(client, DME1737_REG_PWM(ix), data->pwm[ix]);
1166 data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(client,
1167 DME1737_REG_PWM_FREQ(ix)));
1168 dme1737_write(client, DME1737_REG_PWM_FREQ(ix),
1169 data->pwm_freq[ix]);
1171 case SYS_PWM_ENABLE:
1172 /* Only valid for pwm[1-3] */
1173 if (val < 0 || val > 2) {
1175 dev_warn(dev, "PWM enable %ld not "
1176 "supported. Choose one of 0, 1, or 2.\n",
1180 /* Refresh the cache */
1181 data->pwm_config[ix] = dme1737_read(client,
1182 DME1737_REG_PWM_CONFIG(ix));
1183 if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) {
1184 /* Bail out if no change */
1187 /* Do some housekeeping if we are currently in auto mode */
1188 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1189 /* Save the current zone channel assignment */
1190 data->pwm_acz[ix] = PWM_ACZ_FROM_REG(
1191 data->pwm_config[ix]);
1192 /* Save the current ramp rate state and disable it */
1193 data->pwm_rr[ix > 0] = dme1737_read(client,
1194 DME1737_REG_PWM_RR(ix > 0));
1195 data->pwm_rr_en &= ~(1 << ix);
1196 if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) {
1197 data->pwm_rr_en |= (1 << ix);
1198 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix,
1199 data->pwm_rr[ix > 0]);
1200 dme1737_write(client,
1201 DME1737_REG_PWM_RR(ix > 0),
1202 data->pwm_rr[ix > 0]);
1205 /* Set the new PWM mode */
1208 /* Change permissions of pwm[ix] to read-only */
1209 dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
1211 /* Turn fan fully on */
1212 data->pwm_config[ix] = PWM_EN_TO_REG(0,
1213 data->pwm_config[ix]);
1214 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1215 data->pwm_config[ix]);
1218 /* Turn on manual mode */
1219 data->pwm_config[ix] = PWM_EN_TO_REG(1,
1220 data->pwm_config[ix]);
1221 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1222 data->pwm_config[ix]);
1223 /* Change permissions of pwm[ix] to read-writeable */
1224 dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
1228 /* Change permissions of pwm[ix] to read-only */
1229 dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
1231 /* Turn on auto mode using the saved zone channel
1233 data->pwm_config[ix] = PWM_ACZ_TO_REG(
1235 data->pwm_config[ix]);
1236 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1237 data->pwm_config[ix]);
1238 /* Enable PWM ramp rate if previously enabled */
1239 if (data->pwm_rr_en & (1 << ix)) {
1240 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix,
1241 dme1737_read(client,
1242 DME1737_REG_PWM_RR(ix > 0)));
1243 dme1737_write(client,
1244 DME1737_REG_PWM_RR(ix > 0),
1245 data->pwm_rr[ix > 0]);
1250 case SYS_PWM_RAMP_RATE:
1251 /* Only valid for pwm[1-3] */
1252 /* Refresh the cache */
1253 data->pwm_config[ix] = dme1737_read(client,
1254 DME1737_REG_PWM_CONFIG(ix));
1255 data->pwm_rr[ix > 0] = dme1737_read(client,
1256 DME1737_REG_PWM_RR(ix > 0));
1257 /* Set the ramp rate value */
1259 data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix,
1260 data->pwm_rr[ix > 0]);
1262 /* Enable/disable the feature only if the associated PWM
1263 * output is in automatic mode. */
1264 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1265 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix,
1266 data->pwm_rr[ix > 0]);
1268 dme1737_write(client, DME1737_REG_PWM_RR(ix > 0),
1269 data->pwm_rr[ix > 0]);
1271 case SYS_PWM_AUTO_CHANNELS_ZONE:
1272 /* Only valid for pwm[1-3] */
1273 if (!(val == 1 || val == 2 || val == 4 ||
1274 val == 6 || val == 7)) {
1276 dev_warn(dev, "PWM auto channels zone %ld "
1277 "not supported. Choose one of 1, 2, 4, 6, "
1281 /* Refresh the cache */
1282 data->pwm_config[ix] = dme1737_read(client,
1283 DME1737_REG_PWM_CONFIG(ix));
1284 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1285 /* PWM is already in auto mode so update the temp
1286 * channel assignment */
1287 data->pwm_config[ix] = PWM_ACZ_TO_REG(val,
1288 data->pwm_config[ix]);
1289 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1290 data->pwm_config[ix]);
1292 /* PWM is not in auto mode so we save the temp
1293 * channel assignment for later use */
1294 data->pwm_acz[ix] = val;
1297 case SYS_PWM_AUTO_PWM_MIN:
1298 /* Only valid for pwm[1-3] */
1299 /* Refresh the cache */
1300 data->pwm_min[ix] = dme1737_read(client,
1301 DME1737_REG_PWM_MIN(ix));
1302 /* There are only 2 values supported for the auto_pwm_min
1303 * value: 0 or auto_point1_pwm. So if the temperature drops
1304 * below the auto_point1_temp_hyst value, the fan either turns
1305 * off or runs at auto_point1_pwm duty-cycle. */
1306 if (val > ((data->pwm_min[ix] + 1) / 2)) {
1307 data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix,
1308 dme1737_read(client,
1309 DME1737_REG_PWM_RR(0)));
1311 data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix,
1312 dme1737_read(client,
1313 DME1737_REG_PWM_RR(0)));
1315 dme1737_write(client, DME1737_REG_PWM_RR(0),
1318 case SYS_PWM_AUTO_POINT1_PWM:
1319 /* Only valid for pwm[1-3] */
1320 data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255);
1321 dme1737_write(client, DME1737_REG_PWM_MIN(ix),
1325 dev_dbg(dev, "Unknown function %d.\n", fn);
1328 mutex_unlock(&data->update_lock);
1333 /* ---------------------------------------------------------------------
1334 * Miscellaneous sysfs attributes
1335 * --------------------------------------------------------------------- */
1337 static ssize_t show_vrm(struct device *dev, struct device_attribute *attr,
1340 struct i2c_client *client = to_i2c_client(dev);
1341 struct dme1737_data *data = i2c_get_clientdata(client);
1343 return sprintf(buf, "%d\n", data->vrm);
1346 static ssize_t set_vrm(struct device *dev, struct device_attribute *attr,
1347 const char *buf, size_t count)
1349 struct dme1737_data *data = dev_get_drvdata(dev);
1350 long val = simple_strtol(buf, NULL, 10);
1356 static ssize_t show_vid(struct device *dev, struct device_attribute *attr,
1359 struct dme1737_data *data = dme1737_update_device(dev);
1361 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1364 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1367 struct dme1737_data *data = dev_get_drvdata(dev);
1369 return sprintf(buf, "%s\n", data->client.name);
1372 /* ---------------------------------------------------------------------
1373 * Sysfs device attribute defines and structs
1374 * --------------------------------------------------------------------- */
1378 #define SENSOR_DEVICE_ATTR_IN(ix) \
1379 static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \
1380 show_in, NULL, SYS_IN_INPUT, ix); \
1381 static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \
1382 show_in, set_in, SYS_IN_MIN, ix); \
1383 static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \
1384 show_in, set_in, SYS_IN_MAX, ix); \
1385 static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \
1386 show_in, NULL, SYS_IN_ALARM, ix)
1388 SENSOR_DEVICE_ATTR_IN(0);
1389 SENSOR_DEVICE_ATTR_IN(1);
1390 SENSOR_DEVICE_ATTR_IN(2);
1391 SENSOR_DEVICE_ATTR_IN(3);
1392 SENSOR_DEVICE_ATTR_IN(4);
1393 SENSOR_DEVICE_ATTR_IN(5);
1394 SENSOR_DEVICE_ATTR_IN(6);
1396 /* Temperatures 1-3 */
1398 #define SENSOR_DEVICE_ATTR_TEMP(ix) \
1399 static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \
1400 show_temp, NULL, SYS_TEMP_INPUT, ix-1); \
1401 static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \
1402 show_temp, set_temp, SYS_TEMP_MIN, ix-1); \
1403 static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \
1404 show_temp, set_temp, SYS_TEMP_MAX, ix-1); \
1405 static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \
1406 show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \
1407 static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \
1408 show_temp, NULL, SYS_TEMP_ALARM, ix-1); \
1409 static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \
1410 show_temp, NULL, SYS_TEMP_FAULT, ix-1)
1412 SENSOR_DEVICE_ATTR_TEMP(1);
1413 SENSOR_DEVICE_ATTR_TEMP(2);
1414 SENSOR_DEVICE_ATTR_TEMP(3);
1418 #define SENSOR_DEVICE_ATTR_ZONE(ix) \
1419 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \
1420 show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \
1421 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \
1422 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \
1423 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \
1424 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \
1425 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \
1426 show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \
1427 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \
1428 show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1)
1430 SENSOR_DEVICE_ATTR_ZONE(1);
1431 SENSOR_DEVICE_ATTR_ZONE(2);
1432 SENSOR_DEVICE_ATTR_ZONE(3);
1436 #define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \
1437 static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
1438 show_fan, NULL, SYS_FAN_INPUT, ix-1); \
1439 static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
1440 show_fan, set_fan, SYS_FAN_MIN, ix-1); \
1441 static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
1442 show_fan, NULL, SYS_FAN_ALARM, ix-1); \
1443 static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \
1444 show_fan, set_fan, SYS_FAN_TYPE, ix-1)
1446 SENSOR_DEVICE_ATTR_FAN_1TO4(1);
1447 SENSOR_DEVICE_ATTR_FAN_1TO4(2);
1448 SENSOR_DEVICE_ATTR_FAN_1TO4(3);
1449 SENSOR_DEVICE_ATTR_FAN_1TO4(4);
1453 #define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \
1454 static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
1455 show_fan, NULL, SYS_FAN_INPUT, ix-1); \
1456 static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
1457 show_fan, set_fan, SYS_FAN_MIN, ix-1); \
1458 static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
1459 show_fan, NULL, SYS_FAN_ALARM, ix-1); \
1460 static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \
1461 show_fan, set_fan, SYS_FAN_MAX, ix-1)
1463 SENSOR_DEVICE_ATTR_FAN_5TO6(5);
1464 SENSOR_DEVICE_ATTR_FAN_5TO6(6);
1468 #define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \
1469 static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
1470 show_pwm, set_pwm, SYS_PWM, ix-1); \
1471 static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
1472 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
1473 static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
1474 show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \
1475 static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \
1476 show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \
1477 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \
1478 show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \
1479 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \
1480 show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \
1481 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \
1482 show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \
1483 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \
1484 show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1)
1486 SENSOR_DEVICE_ATTR_PWM_1TO3(1);
1487 SENSOR_DEVICE_ATTR_PWM_1TO3(2);
1488 SENSOR_DEVICE_ATTR_PWM_1TO3(3);
1492 #define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \
1493 static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO | S_IWUSR, \
1494 show_pwm, set_pwm, SYS_PWM, ix-1); \
1495 static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO | S_IWUSR, \
1496 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
1497 static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
1498 show_pwm, NULL, SYS_PWM_ENABLE, ix-1)
1500 SENSOR_DEVICE_ATTR_PWM_5TO6(5);
1501 SENSOR_DEVICE_ATTR_PWM_5TO6(6);
1505 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm);
1506 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1507 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); /* for ISA devices */
1509 #define SENSOR_DEV_ATTR_IN(ix) \
1510 &sensor_dev_attr_in##ix##_input.dev_attr.attr, \
1511 &sensor_dev_attr_in##ix##_min.dev_attr.attr, \
1512 &sensor_dev_attr_in##ix##_max.dev_attr.attr, \
1513 &sensor_dev_attr_in##ix##_alarm.dev_attr.attr
1515 /* These attributes are read-writeable only if the chip is *not* locked */
1516 #define SENSOR_DEV_ATTR_TEMP_LOCK(ix) \
1517 &sensor_dev_attr_temp##ix##_offset.dev_attr.attr
1519 #define SENSOR_DEV_ATTR_TEMP(ix) \
1520 SENSOR_DEV_ATTR_TEMP_LOCK(ix), \
1521 &sensor_dev_attr_temp##ix##_input.dev_attr.attr, \
1522 &sensor_dev_attr_temp##ix##_min.dev_attr.attr, \
1523 &sensor_dev_attr_temp##ix##_max.dev_attr.attr, \
1524 &sensor_dev_attr_temp##ix##_alarm.dev_attr.attr, \
1525 &sensor_dev_attr_temp##ix##_fault.dev_attr.attr
1527 /* These attributes are read-writeable only if the chip is *not* locked */
1528 #define SENSOR_DEV_ATTR_ZONE_LOCK(ix) \
1529 &sensor_dev_attr_zone##ix##_auto_point1_temp_hyst.dev_attr.attr, \
1530 &sensor_dev_attr_zone##ix##_auto_point1_temp.dev_attr.attr, \
1531 &sensor_dev_attr_zone##ix##_auto_point2_temp.dev_attr.attr, \
1532 &sensor_dev_attr_zone##ix##_auto_point3_temp.dev_attr.attr
1534 #define SENSOR_DEV_ATTR_ZONE(ix) \
1535 SENSOR_DEV_ATTR_ZONE_LOCK(ix), \
1536 &sensor_dev_attr_zone##ix##_auto_channels_temp.dev_attr.attr
1538 #define SENSOR_DEV_ATTR_FAN_1TO4(ix) \
1539 &sensor_dev_attr_fan##ix##_input.dev_attr.attr, \
1540 &sensor_dev_attr_fan##ix##_min.dev_attr.attr, \
1541 &sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \
1542 &sensor_dev_attr_fan##ix##_type.dev_attr.attr
1544 #define SENSOR_DEV_ATTR_FAN_5TO6(ix) \
1545 &sensor_dev_attr_fan##ix##_input.dev_attr.attr, \
1546 &sensor_dev_attr_fan##ix##_min.dev_attr.attr, \
1547 &sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \
1548 &sensor_dev_attr_fan##ix##_max.dev_attr.attr
1550 /* These attributes are read-writeable only if the chip is *not* locked */
1551 #define SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix) \
1552 &sensor_dev_attr_pwm##ix##_freq.dev_attr.attr, \
1553 &sensor_dev_attr_pwm##ix##_enable.dev_attr.attr, \
1554 &sensor_dev_attr_pwm##ix##_ramp_rate.dev_attr.attr, \
1555 &sensor_dev_attr_pwm##ix##_auto_channels_zone.dev_attr.attr, \
1556 &sensor_dev_attr_pwm##ix##_auto_pwm_min.dev_attr.attr, \
1557 &sensor_dev_attr_pwm##ix##_auto_point1_pwm.dev_attr.attr
1559 #define SENSOR_DEV_ATTR_PWM_1TO3(ix) \
1560 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix), \
1561 &sensor_dev_attr_pwm##ix.dev_attr.attr, \
1562 &sensor_dev_attr_pwm##ix##_auto_point2_pwm.dev_attr.attr
1564 /* These attributes are read-writeable only if the chip is *not* locked */
1565 #define SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix) \
1566 &sensor_dev_attr_pwm##ix.dev_attr.attr, \
1567 &sensor_dev_attr_pwm##ix##_freq.dev_attr.attr
1569 #define SENSOR_DEV_ATTR_PWM_5TO6(ix) \
1570 SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix), \
1571 &sensor_dev_attr_pwm##ix##_enable.dev_attr.attr
1573 /* This struct holds all the attributes that are always present and need to be
1574 * created unconditionally. The attributes that need modification of their
1575 * permissions are created read-only and write permissions are added or removed
1576 * on the fly when required */
1577 static struct attribute *dme1737_attr[] ={
1579 SENSOR_DEV_ATTR_IN(0),
1580 SENSOR_DEV_ATTR_IN(1),
1581 SENSOR_DEV_ATTR_IN(2),
1582 SENSOR_DEV_ATTR_IN(3),
1583 SENSOR_DEV_ATTR_IN(4),
1584 SENSOR_DEV_ATTR_IN(5),
1585 SENSOR_DEV_ATTR_IN(6),
1587 SENSOR_DEV_ATTR_TEMP(1),
1588 SENSOR_DEV_ATTR_TEMP(2),
1589 SENSOR_DEV_ATTR_TEMP(3),
1591 SENSOR_DEV_ATTR_ZONE(1),
1592 SENSOR_DEV_ATTR_ZONE(2),
1593 SENSOR_DEV_ATTR_ZONE(3),
1596 &dev_attr_cpu0_vid.attr,
1600 static const struct attribute_group dme1737_group = {
1601 .attrs = dme1737_attr,
1604 /* The following structs hold the PWM attributes, some of which are optional.
1605 * Their creation depends on the chip configuration which is determined during
1607 static struct attribute *dme1737_attr_pwm1[] = {
1608 SENSOR_DEV_ATTR_PWM_1TO3(1),
1611 static struct attribute *dme1737_attr_pwm2[] = {
1612 SENSOR_DEV_ATTR_PWM_1TO3(2),
1615 static struct attribute *dme1737_attr_pwm3[] = {
1616 SENSOR_DEV_ATTR_PWM_1TO3(3),
1619 static struct attribute *dme1737_attr_pwm5[] = {
1620 SENSOR_DEV_ATTR_PWM_5TO6(5),
1623 static struct attribute *dme1737_attr_pwm6[] = {
1624 SENSOR_DEV_ATTR_PWM_5TO6(6),
1628 static const struct attribute_group dme1737_pwm_group[] = {
1629 { .attrs = dme1737_attr_pwm1 },
1630 { .attrs = dme1737_attr_pwm2 },
1631 { .attrs = dme1737_attr_pwm3 },
1633 { .attrs = dme1737_attr_pwm5 },
1634 { .attrs = dme1737_attr_pwm6 },
1637 /* The following structs hold the fan attributes, some of which are optional.
1638 * Their creation depends on the chip configuration which is determined during
1640 static struct attribute *dme1737_attr_fan1[] = {
1641 SENSOR_DEV_ATTR_FAN_1TO4(1),
1644 static struct attribute *dme1737_attr_fan2[] = {
1645 SENSOR_DEV_ATTR_FAN_1TO4(2),
1648 static struct attribute *dme1737_attr_fan3[] = {
1649 SENSOR_DEV_ATTR_FAN_1TO4(3),
1652 static struct attribute *dme1737_attr_fan4[] = {
1653 SENSOR_DEV_ATTR_FAN_1TO4(4),
1656 static struct attribute *dme1737_attr_fan5[] = {
1657 SENSOR_DEV_ATTR_FAN_5TO6(5),
1660 static struct attribute *dme1737_attr_fan6[] = {
1661 SENSOR_DEV_ATTR_FAN_5TO6(6),
1665 static const struct attribute_group dme1737_fan_group[] = {
1666 { .attrs = dme1737_attr_fan1 },
1667 { .attrs = dme1737_attr_fan2 },
1668 { .attrs = dme1737_attr_fan3 },
1669 { .attrs = dme1737_attr_fan4 },
1670 { .attrs = dme1737_attr_fan5 },
1671 { .attrs = dme1737_attr_fan6 },
1674 /* The permissions of all of the following attributes are changed to read-
1675 * writeable if the chip is *not* locked. Otherwise they stay read-only. */
1676 static struct attribute *dme1737_attr_lock[] = {
1678 SENSOR_DEV_ATTR_TEMP_LOCK(1),
1679 SENSOR_DEV_ATTR_TEMP_LOCK(2),
1680 SENSOR_DEV_ATTR_TEMP_LOCK(3),
1682 SENSOR_DEV_ATTR_ZONE_LOCK(1),
1683 SENSOR_DEV_ATTR_ZONE_LOCK(2),
1684 SENSOR_DEV_ATTR_ZONE_LOCK(3),
1688 static const struct attribute_group dme1737_lock_group = {
1689 .attrs = dme1737_attr_lock,
1692 /* The permissions of the following PWM attributes are changed to read-
1693 * writeable if the chip is *not* locked and the respective PWM is available.
1694 * Otherwise they stay read-only. */
1695 static struct attribute *dme1737_attr_pwm1_lock[] = {
1696 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(1),
1699 static struct attribute *dme1737_attr_pwm2_lock[] = {
1700 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(2),
1703 static struct attribute *dme1737_attr_pwm3_lock[] = {
1704 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(3),
1707 static struct attribute *dme1737_attr_pwm5_lock[] = {
1708 SENSOR_DEV_ATTR_PWM_5TO6_LOCK(5),
1711 static struct attribute *dme1737_attr_pwm6_lock[] = {
1712 SENSOR_DEV_ATTR_PWM_5TO6_LOCK(6),
1716 static const struct attribute_group dme1737_pwm_lock_group[] = {
1717 { .attrs = dme1737_attr_pwm1_lock },
1718 { .attrs = dme1737_attr_pwm2_lock },
1719 { .attrs = dme1737_attr_pwm3_lock },
1721 { .attrs = dme1737_attr_pwm5_lock },
1722 { .attrs = dme1737_attr_pwm6_lock },
1725 /* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the
1726 * chip is not locked. Otherwise they are read-only. */
1727 static struct attribute *dme1737_attr_pwm[] = {
1728 &sensor_dev_attr_pwm1.dev_attr.attr,
1729 &sensor_dev_attr_pwm2.dev_attr.attr,
1730 &sensor_dev_attr_pwm3.dev_attr.attr,
1733 /* ---------------------------------------------------------------------
1734 * Super-IO functions
1735 * --------------------------------------------------------------------- */
1737 static inline void dme1737_sio_enter(int sio_cip)
1739 outb(0x55, sio_cip);
1742 static inline void dme1737_sio_exit(int sio_cip)
1744 outb(0xaa, sio_cip);
1747 static inline int dme1737_sio_inb(int sio_cip, int reg)
1750 return inb(sio_cip + 1);
1753 static inline void dme1737_sio_outb(int sio_cip, int reg, int val)
1756 outb(val, sio_cip + 1);
1759 /* ---------------------------------------------------------------------
1760 * Device initialization
1761 * --------------------------------------------------------------------- */
1763 static int dme1737_i2c_get_features(int, struct dme1737_data*);
1765 static void dme1737_chmod_file(struct device *dev,
1766 struct attribute *attr, mode_t mode)
1768 if (sysfs_chmod_file(&dev->kobj, attr, mode)) {
1769 dev_warn(dev, "Failed to change permissions of %s.\n",
1774 static void dme1737_chmod_group(struct device *dev,
1775 const struct attribute_group *group,
1778 struct attribute **attr;
1780 for (attr = group->attrs; *attr; attr++) {
1781 dme1737_chmod_file(dev, *attr, mode);
1785 static void dme1737_remove_files(struct device *dev)
1787 struct dme1737_data *data = dev_get_drvdata(dev);
1790 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
1791 if (data->has_fan & (1 << ix)) {
1792 sysfs_remove_group(&dev->kobj,
1793 &dme1737_fan_group[ix]);
1797 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
1798 if (data->has_pwm & (1 << ix)) {
1799 sysfs_remove_group(&dev->kobj,
1800 &dme1737_pwm_group[ix]);
1804 sysfs_remove_group(&dev->kobj, &dme1737_group);
1806 if (!data->client.driver) {
1807 sysfs_remove_file(&dev->kobj, &dev_attr_name.attr);
1811 static int dme1737_create_files(struct device *dev)
1813 struct dme1737_data *data = dev_get_drvdata(dev);
1816 /* Create a name attribute for ISA devices */
1817 if (!data->client.driver &&
1818 (err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr))) {
1822 /* Create standard sysfs attributes */
1823 if ((err = sysfs_create_group(&dev->kobj, &dme1737_group))) {
1827 /* Create fan sysfs attributes */
1828 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
1829 if (data->has_fan & (1 << ix)) {
1830 if ((err = sysfs_create_group(&dev->kobj,
1831 &dme1737_fan_group[ix]))) {
1837 /* Create PWM sysfs attributes */
1838 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
1839 if (data->has_pwm & (1 << ix)) {
1840 if ((err = sysfs_create_group(&dev->kobj,
1841 &dme1737_pwm_group[ix]))) {
1847 /* Inform if the device is locked. Otherwise change the permissions of
1848 * selected attributes from read-only to read-writeable. */
1849 if (data->config & 0x02) {
1850 dev_info(dev, "Device is locked. Some attributes "
1851 "will be read-only.\n");
1853 /* Change permissions of standard attributes */
1854 dme1737_chmod_group(dev, &dme1737_lock_group,
1857 /* Change permissions of PWM attributes */
1858 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_lock_group); ix++) {
1859 if (data->has_pwm & (1 << ix)) {
1860 dme1737_chmod_group(dev,
1861 &dme1737_pwm_lock_group[ix],
1866 /* Change permissions of pwm[1-3] if in manual mode */
1867 for (ix = 0; ix < 3; ix++) {
1868 if ((data->has_pwm & (1 << ix)) &&
1869 (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) {
1870 dme1737_chmod_file(dev,
1871 dme1737_attr_pwm[ix],
1880 dme1737_remove_files(dev);
1885 static int dme1737_init_device(struct device *dev)
1887 struct dme1737_data *data = dev_get_drvdata(dev);
1888 struct i2c_client *client = &data->client;
1892 data->config = dme1737_read(client, DME1737_REG_CONFIG);
1893 /* Inform if part is not monitoring/started */
1894 if (!(data->config & 0x01)) {
1896 dev_err(dev, "Device is not monitoring. "
1897 "Use the force_start load parameter to "
1902 /* Force monitoring */
1903 data->config |= 0x01;
1904 dme1737_write(client, DME1737_REG_CONFIG, data->config);
1906 /* Inform if part is not ready */
1907 if (!(data->config & 0x04)) {
1908 dev_err(dev, "Device is not ready.\n");
1912 /* Determine which optional fan and pwm features are enabled/present */
1913 if (client->driver) { /* I2C chip */
1914 data->config2 = dme1737_read(client, DME1737_REG_CONFIG2);
1915 /* Check if optional fan3 input is enabled */
1916 if (data->config2 & 0x04) {
1917 data->has_fan |= (1 << 2);
1920 /* Fan4 and pwm3 are only available if the client's I2C address
1921 * is the default 0x2e. Otherwise the I/Os associated with
1922 * these functions are used for addr enable/select. */
1923 if (data->client.addr == 0x2e) {
1924 data->has_fan |= (1 << 3);
1925 data->has_pwm |= (1 << 2);
1928 /* Determine which of the optional fan[5-6] and pwm[5-6]
1929 * features are enabled. For this, we need to query the runtime
1930 * registers through the Super-IO LPC interface. Try both
1931 * config ports 0x2e and 0x4e. */
1932 if (dme1737_i2c_get_features(0x2e, data) &&
1933 dme1737_i2c_get_features(0x4e, data)) {
1934 dev_warn(dev, "Failed to query Super-IO for optional "
1937 } else { /* ISA chip */
1938 /* Fan3 and pwm3 are always available. Fan[4-5] and pwm[5-6]
1939 * don't exist in the ISA chip. */
1940 data->has_fan |= (1 << 2);
1941 data->has_pwm |= (1 << 2);
1944 /* Fan1, fan2, pwm1, and pwm2 are always present */
1945 data->has_fan |= 0x03;
1946 data->has_pwm |= 0x03;
1948 dev_info(dev, "Optional features: pwm3=%s, pwm5=%s, pwm6=%s, "
1949 "fan3=%s, fan4=%s, fan5=%s, fan6=%s.\n",
1950 (data->has_pwm & (1 << 2)) ? "yes" : "no",
1951 (data->has_pwm & (1 << 4)) ? "yes" : "no",
1952 (data->has_pwm & (1 << 5)) ? "yes" : "no",
1953 (data->has_fan & (1 << 2)) ? "yes" : "no",
1954 (data->has_fan & (1 << 3)) ? "yes" : "no",
1955 (data->has_fan & (1 << 4)) ? "yes" : "no",
1956 (data->has_fan & (1 << 5)) ? "yes" : "no");
1958 reg = dme1737_read(client, DME1737_REG_TACH_PWM);
1959 /* Inform if fan-to-pwm mapping differs from the default */
1960 if (client->driver && reg != 0xa4) { /* I2C chip */
1961 dev_warn(dev, "Non-standard fan to pwm mapping: "
1962 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, "
1963 "fan4->pwm%d. Please report to the driver "
1965 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
1966 ((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1);
1967 } else if (!client->driver && reg != 0x24) { /* ISA chip */
1968 dev_warn(dev, "Non-standard fan to pwm mapping: "
1969 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. "
1970 "Please report to the driver maintainer.\n",
1971 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
1972 ((reg >> 4) & 0x03) + 1);
1975 /* Switch pwm[1-3] to manual mode if they are currently disabled and
1976 * set the duty-cycles to 0% (which is identical to the PWMs being
1978 if (!(data->config & 0x02)) {
1979 for (ix = 0; ix < 3; ix++) {
1980 data->pwm_config[ix] = dme1737_read(client,
1981 DME1737_REG_PWM_CONFIG(ix));
1982 if ((data->has_pwm & (1 << ix)) &&
1983 (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) {
1984 dev_info(dev, "Switching pwm%d to "
1985 "manual mode.\n", ix + 1);
1986 data->pwm_config[ix] = PWM_EN_TO_REG(1,
1987 data->pwm_config[ix]);
1988 dme1737_write(client, DME1737_REG_PWM(ix), 0);
1989 dme1737_write(client,
1990 DME1737_REG_PWM_CONFIG(ix),
1991 data->pwm_config[ix]);
1996 /* Initialize the default PWM auto channels zone (acz) assignments */
1997 data->pwm_acz[0] = 1; /* pwm1 -> zone1 */
1998 data->pwm_acz[1] = 2; /* pwm2 -> zone2 */
1999 data->pwm_acz[2] = 4; /* pwm3 -> zone3 */
2002 data->vrm = vid_which_vrm();
2007 /* ---------------------------------------------------------------------
2008 * I2C device detection and registration
2009 * --------------------------------------------------------------------- */
2011 static struct i2c_driver dme1737_i2c_driver;
2013 static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data)
2018 dme1737_sio_enter(sio_cip);
2021 * The DME1737 can return either 0x78 or 0x77 as its device ID. */
2022 reg = dme1737_sio_inb(sio_cip, 0x20);
2023 if (!(reg == 0x77 || reg == 0x78)) {
2028 /* Select logical device A (runtime registers) */
2029 dme1737_sio_outb(sio_cip, 0x07, 0x0a);
2031 /* Get the base address of the runtime registers */
2032 if (!(addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
2033 dme1737_sio_inb(sio_cip, 0x61))) {
2038 /* Read the runtime registers to determine which optional features
2039 * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set
2040 * to '10' if the respective feature is enabled. */
2041 if ((inb(addr + 0x43) & 0x0c) == 0x08) { /* fan6 */
2042 data->has_fan |= (1 << 5);
2044 if ((inb(addr + 0x44) & 0x0c) == 0x08) { /* pwm6 */
2045 data->has_pwm |= (1 << 5);
2047 if ((inb(addr + 0x45) & 0x0c) == 0x08) { /* fan5 */
2048 data->has_fan |= (1 << 4);
2050 if ((inb(addr + 0x46) & 0x0c) == 0x08) { /* pwm5 */
2051 data->has_pwm |= (1 << 4);
2055 dme1737_sio_exit(sio_cip);
2060 static int dme1737_i2c_detect(struct i2c_adapter *adapter, int address,
2063 u8 company, verstep = 0;
2064 struct i2c_client *client;
2065 struct dme1737_data *data;
2070 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
2074 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) {
2079 client = &data->client;
2080 i2c_set_clientdata(client, data);
2081 client->addr = address;
2082 client->adapter = adapter;
2083 client->driver = &dme1737_i2c_driver;
2086 /* A negative kind means that the driver was loaded with no force
2087 * parameter (default), so we must identify the chip. */
2089 company = dme1737_read(client, DME1737_REG_COMPANY);
2090 verstep = dme1737_read(client, DME1737_REG_VERSTEP);
2092 if (!((company == DME1737_COMPANY_SMSC) &&
2093 ((verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP))) {
2102 /* Fill in the remaining client fields and put it into the global
2104 strlcpy(client->name, name, I2C_NAME_SIZE);
2105 mutex_init(&data->update_lock);
2107 /* Tell the I2C layer a new client has arrived */
2108 if ((err = i2c_attach_client(client))) {
2112 dev_info(dev, "Found a DME1737 chip at 0x%02x (rev 0x%02x).\n",
2113 client->addr, verstep);
2115 /* Initialize the DME1737 chip */
2116 if ((err = dme1737_init_device(dev))) {
2117 dev_err(dev, "Failed to initialize device.\n");
2121 /* Create sysfs files */
2122 if ((err = dme1737_create_files(dev))) {
2123 dev_err(dev, "Failed to create sysfs files.\n");
2127 /* Register device */
2128 data->hwmon_dev = hwmon_device_register(dev);
2129 if (IS_ERR(data->hwmon_dev)) {
2130 dev_err(dev, "Failed to register device.\n");
2131 err = PTR_ERR(data->hwmon_dev);
2138 dme1737_remove_files(dev);
2140 i2c_detach_client(client);
2147 static int dme1737_i2c_attach_adapter(struct i2c_adapter *adapter)
2149 if (!(adapter->class & I2C_CLASS_HWMON)) {
2153 return i2c_probe(adapter, &addr_data, dme1737_i2c_detect);
2156 static int dme1737_i2c_detach_client(struct i2c_client *client)
2158 struct dme1737_data *data = i2c_get_clientdata(client);
2161 hwmon_device_unregister(data->hwmon_dev);
2162 dme1737_remove_files(&client->dev);
2164 if ((err = i2c_detach_client(client))) {
2172 static struct i2c_driver dme1737_i2c_driver = {
2176 .attach_adapter = dme1737_i2c_attach_adapter,
2177 .detach_client = dme1737_i2c_detach_client,
2180 /* ---------------------------------------------------------------------
2181 * ISA device detection and registration
2182 * --------------------------------------------------------------------- */
2184 static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr)
2187 unsigned short base_addr;
2189 dme1737_sio_enter(sio_cip);
2192 * We currently know about SCH3112 (0x7c), SCH3114 (0x7d), and
2193 * SCH3116 (0x7f). */
2194 reg = dme1737_sio_inb(sio_cip, 0x20);
2195 if (!(reg == 0x7c || reg == 0x7d || reg == 0x7f)) {
2200 /* Select logical device A (runtime registers) */
2201 dme1737_sio_outb(sio_cip, 0x07, 0x0a);
2203 /* Get the base address of the runtime registers */
2204 if (!(base_addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
2205 dme1737_sio_inb(sio_cip, 0x61))) {
2206 printk(KERN_ERR "dme1737: Base address not set.\n");
2211 /* Access to the hwmon registers is through an index/data register
2212 * pair located at offset 0x70/0x71. */
2213 *addr = base_addr + 0x70;
2216 dme1737_sio_exit(sio_cip);
2220 static int __init dme1737_isa_device_add(unsigned short addr)
2222 struct resource res = {
2224 .end = addr + DME1737_EXTENT - 1,
2226 .flags = IORESOURCE_IO,
2230 if (!(pdev = platform_device_alloc("dme1737", addr))) {
2231 printk(KERN_ERR "dme1737: Failed to allocate device.\n");
2236 if ((err = platform_device_add_resources(pdev, &res, 1))) {
2237 printk(KERN_ERR "dme1737: Failed to add device resource "
2238 "(err = %d).\n", err);
2239 goto exit_device_put;
2242 if ((err = platform_device_add(pdev))) {
2243 printk(KERN_ERR "dme1737: Failed to add device (err = %d).\n",
2245 goto exit_device_put;
2251 platform_device_put(pdev);
2257 static int __devinit dme1737_isa_probe(struct platform_device *pdev)
2260 struct resource *res;
2261 struct i2c_client *client;
2262 struct dme1737_data *data;
2263 struct device *dev = &pdev->dev;
2266 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2267 if (!request_region(res->start, DME1737_EXTENT, "dme1737")) {
2268 dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n",
2269 (unsigned short)res->start,
2270 (unsigned short)res->start + DME1737_EXTENT - 1);
2275 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) {
2277 goto exit_release_region;
2280 client = &data->client;
2281 i2c_set_clientdata(client, data);
2282 client->addr = res->start;
2283 platform_set_drvdata(pdev, data);
2285 company = dme1737_read(client, DME1737_REG_COMPANY);
2286 device = dme1737_read(client, DME1737_REG_DEVICE);
2288 if (!((company == DME1737_COMPANY_SMSC) &&
2289 (device == SCH311X_DEVICE))) {
2294 /* Fill in the remaining client fields and initialize the mutex */
2295 strlcpy(client->name, "sch311x", I2C_NAME_SIZE);
2296 mutex_init(&data->update_lock);
2298 dev_info(dev, "Found a SCH311x chip at 0x%04x\n", client->addr);
2300 /* Initialize the chip */
2301 if ((err = dme1737_init_device(dev))) {
2302 dev_err(dev, "Failed to initialize device.\n");
2306 /* Create sysfs files */
2307 if ((err = dme1737_create_files(dev))) {
2308 dev_err(dev, "Failed to create sysfs files.\n");
2312 /* Register device */
2313 data->hwmon_dev = hwmon_device_register(dev);
2314 if (IS_ERR(data->hwmon_dev)) {
2315 dev_err(dev, "Failed to register device.\n");
2316 err = PTR_ERR(data->hwmon_dev);
2317 goto exit_remove_files;
2323 dme1737_remove_files(dev);
2325 platform_set_drvdata(pdev, NULL);
2327 exit_release_region:
2328 release_region(res->start, DME1737_EXTENT);
2333 static int __devexit dme1737_isa_remove(struct platform_device *pdev)
2335 struct dme1737_data *data = platform_get_drvdata(pdev);
2337 hwmon_device_unregister(data->hwmon_dev);
2338 dme1737_remove_files(&pdev->dev);
2339 release_region(data->client.addr, DME1737_EXTENT);
2340 platform_set_drvdata(pdev, NULL);
2346 static struct platform_driver dme1737_isa_driver = {
2348 .owner = THIS_MODULE,
2351 .probe = dme1737_isa_probe,
2352 .remove = __devexit_p(dme1737_isa_remove),
2355 /* ---------------------------------------------------------------------
2356 * Module initialization and cleanup
2357 * --------------------------------------------------------------------- */
2359 static int __init dme1737_init(void)
2362 unsigned short addr;
2364 if ((err = i2c_add_driver(&dme1737_i2c_driver))) {
2368 if (dme1737_isa_detect(0x2e, &addr) &&
2369 dme1737_isa_detect(0x4e, &addr)) {
2370 /* Return 0 if we didn't find an ISA device */
2374 if ((err = platform_driver_register(&dme1737_isa_driver))) {
2375 goto exit_del_i2c_driver;
2378 /* Sets global pdev as a side effect */
2379 if ((err = dme1737_isa_device_add(addr))) {
2380 goto exit_del_isa_driver;
2385 exit_del_isa_driver:
2386 platform_driver_unregister(&dme1737_isa_driver);
2387 exit_del_i2c_driver:
2388 i2c_del_driver(&dme1737_i2c_driver);
2393 static void __exit dme1737_exit(void)
2396 platform_device_unregister(pdev);
2397 platform_driver_unregister(&dme1737_isa_driver);
2400 i2c_del_driver(&dme1737_i2c_driver);
2403 MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>");
2404 MODULE_DESCRIPTION("DME1737 sensors");
2405 MODULE_LICENSE("GPL");
2407 module_init(dme1737_init);
2408 module_exit(dme1737_exit);