Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
[linux-2.6] / arch / powerpc / sysdev / qe_lib / ucc_fast.c
1 /*
2  * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved.
3  *
4  * Authors:     Shlomi Gridish <gridish@freescale.com>
5  *              Li Yang <leoli@freescale.com>
6  *
7  * Description:
8  * QE UCC Fast API Set - UCC Fast specific routines implementations.
9  *
10  * This program is free software; you can redistribute  it and/or modify it
11  * under  the terms of  the GNU General  Public License as published by the
12  * Free Software Foundation;  either version 2 of the  License, or (at your
13  * option) any later version.
14  */
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/errno.h>
18 #include <linux/slab.h>
19 #include <linux/stddef.h>
20 #include <linux/interrupt.h>
21 #include <linux/err.h>
22
23 #include <asm/io.h>
24 #include <asm/immap_qe.h>
25 #include <asm/qe.h>
26
27 #include <asm/ucc.h>
28 #include <asm/ucc_fast.h>
29
30 void ucc_fast_dump_regs(struct ucc_fast_private * uccf)
31 {
32         printk(KERN_INFO "UCC%d Fast registers:", uccf->uf_info->ucc_num);
33         printk(KERN_INFO "Base address: 0x%08x", (u32) uccf->uf_regs);
34
35         printk(KERN_INFO "gumr  : addr - 0x%08x, val - 0x%08x",
36                   (u32) & uccf->uf_regs->gumr, in_be32(&uccf->uf_regs->gumr));
37         printk(KERN_INFO "upsmr : addr - 0x%08x, val - 0x%08x",
38                   (u32) & uccf->uf_regs->upsmr, in_be32(&uccf->uf_regs->upsmr));
39         printk(KERN_INFO "utodr : addr - 0x%08x, val - 0x%04x",
40                   (u32) & uccf->uf_regs->utodr, in_be16(&uccf->uf_regs->utodr));
41         printk(KERN_INFO "udsr  : addr - 0x%08x, val - 0x%04x",
42                   (u32) & uccf->uf_regs->udsr, in_be16(&uccf->uf_regs->udsr));
43         printk(KERN_INFO "ucce  : addr - 0x%08x, val - 0x%08x",
44                   (u32) & uccf->uf_regs->ucce, in_be32(&uccf->uf_regs->ucce));
45         printk(KERN_INFO "uccm  : addr - 0x%08x, val - 0x%08x",
46                   (u32) & uccf->uf_regs->uccm, in_be32(&uccf->uf_regs->uccm));
47         printk(KERN_INFO "uccs  : addr - 0x%08x, val - 0x%02x",
48                   (u32) & uccf->uf_regs->uccs, uccf->uf_regs->uccs);
49         printk(KERN_INFO "urfb  : addr - 0x%08x, val - 0x%08x",
50                   (u32) & uccf->uf_regs->urfb, in_be32(&uccf->uf_regs->urfb));
51         printk(KERN_INFO "urfs  : addr - 0x%08x, val - 0x%04x",
52                   (u32) & uccf->uf_regs->urfs, in_be16(&uccf->uf_regs->urfs));
53         printk(KERN_INFO "urfet : addr - 0x%08x, val - 0x%04x",
54                   (u32) & uccf->uf_regs->urfet, in_be16(&uccf->uf_regs->urfet));
55         printk(KERN_INFO "urfset: addr - 0x%08x, val - 0x%04x",
56                   (u32) & uccf->uf_regs->urfset,
57                   in_be16(&uccf->uf_regs->urfset));
58         printk(KERN_INFO "utfb  : addr - 0x%08x, val - 0x%08x",
59                   (u32) & uccf->uf_regs->utfb, in_be32(&uccf->uf_regs->utfb));
60         printk(KERN_INFO "utfs  : addr - 0x%08x, val - 0x%04x",
61                   (u32) & uccf->uf_regs->utfs, in_be16(&uccf->uf_regs->utfs));
62         printk(KERN_INFO "utfet : addr - 0x%08x, val - 0x%04x",
63                   (u32) & uccf->uf_regs->utfet, in_be16(&uccf->uf_regs->utfet));
64         printk(KERN_INFO "utftt : addr - 0x%08x, val - 0x%04x",
65                   (u32) & uccf->uf_regs->utftt, in_be16(&uccf->uf_regs->utftt));
66         printk(KERN_INFO "utpt  : addr - 0x%08x, val - 0x%04x",
67                   (u32) & uccf->uf_regs->utpt, in_be16(&uccf->uf_regs->utpt));
68         printk(KERN_INFO "urtry : addr - 0x%08x, val - 0x%08x",
69                   (u32) & uccf->uf_regs->urtry, in_be32(&uccf->uf_regs->urtry));
70         printk(KERN_INFO "guemr : addr - 0x%08x, val - 0x%02x",
71                   (u32) & uccf->uf_regs->guemr, uccf->uf_regs->guemr);
72 }
73
74 u32 ucc_fast_get_qe_cr_subblock(int uccf_num)
75 {
76         switch (uccf_num) {
77         case 0: return QE_CR_SUBBLOCK_UCCFAST1;
78         case 1: return QE_CR_SUBBLOCK_UCCFAST2;
79         case 2: return QE_CR_SUBBLOCK_UCCFAST3;
80         case 3: return QE_CR_SUBBLOCK_UCCFAST4;
81         case 4: return QE_CR_SUBBLOCK_UCCFAST5;
82         case 5: return QE_CR_SUBBLOCK_UCCFAST6;
83         case 6: return QE_CR_SUBBLOCK_UCCFAST7;
84         case 7: return QE_CR_SUBBLOCK_UCCFAST8;
85         default: return QE_CR_SUBBLOCK_INVALID;
86         }
87 }
88
89 void ucc_fast_transmit_on_demand(struct ucc_fast_private * uccf)
90 {
91         out_be16(&uccf->uf_regs->utodr, UCC_FAST_TOD);
92 }
93
94 void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode)
95 {
96         struct ucc_fast *uf_regs;
97         u32 gumr;
98
99         uf_regs = uccf->uf_regs;
100
101         /* Enable reception and/or transmission on this UCC. */
102         gumr = in_be32(&uf_regs->gumr);
103         if (mode & COMM_DIR_TX) {
104                 gumr |= UCC_FAST_GUMR_ENT;
105                 uccf->enabled_tx = 1;
106         }
107         if (mode & COMM_DIR_RX) {
108                 gumr |= UCC_FAST_GUMR_ENR;
109                 uccf->enabled_rx = 1;
110         }
111         out_be32(&uf_regs->gumr, gumr);
112 }
113
114 void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode)
115 {
116         struct ucc_fast *uf_regs;
117         u32 gumr;
118
119         uf_regs = uccf->uf_regs;
120
121         /* Disable reception and/or transmission on this UCC. */
122         gumr = in_be32(&uf_regs->gumr);
123         if (mode & COMM_DIR_TX) {
124                 gumr &= ~UCC_FAST_GUMR_ENT;
125                 uccf->enabled_tx = 0;
126         }
127         if (mode & COMM_DIR_RX) {
128                 gumr &= ~UCC_FAST_GUMR_ENR;
129                 uccf->enabled_rx = 0;
130         }
131         out_be32(&uf_regs->gumr, gumr);
132 }
133
134 int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** uccf_ret)
135 {
136         struct ucc_fast_private *uccf;
137         struct ucc_fast *uf_regs;
138         u32 gumr;
139         int ret;
140
141         if (!uf_info)
142                 return -EINVAL;
143
144         /* check if the UCC port number is in range. */
145         if ((uf_info->ucc_num < 0) || (uf_info->ucc_num > UCC_MAX_NUM - 1)) {
146                 printk(KERN_ERR "%s: illegal UCC number", __FUNCTION__);
147                 return -EINVAL;
148         }
149
150         /* Check that 'max_rx_buf_length' is properly aligned (4). */
151         if (uf_info->max_rx_buf_length & (UCC_FAST_MRBLR_ALIGNMENT - 1)) {
152                 printk(KERN_ERR "%s: max_rx_buf_length not aligned", __FUNCTION__);
153                 return -EINVAL;
154         }
155
156         /* Validate Virtual Fifo register values */
157         if (uf_info->urfs < UCC_FAST_URFS_MIN_VAL) {
158                 printk(KERN_ERR "%s: urfs is too small", __FUNCTION__);
159                 return -EINVAL;
160         }
161
162         if (uf_info->urfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
163                 printk(KERN_ERR "%s: urfs is not aligned", __FUNCTION__);
164                 return -EINVAL;
165         }
166
167         if (uf_info->urfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
168                 printk(KERN_ERR "%s: urfet is not aligned.", __FUNCTION__);
169                 return -EINVAL;
170         }
171
172         if (uf_info->urfset & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
173                 printk(KERN_ERR "%s: urfset is not aligned", __FUNCTION__);
174                 return -EINVAL;
175         }
176
177         if (uf_info->utfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
178                 printk(KERN_ERR "%s: utfs is not aligned", __FUNCTION__);
179                 return -EINVAL;
180         }
181
182         if (uf_info->utfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
183                 printk(KERN_ERR "%s: utfet is not aligned", __FUNCTION__);
184                 return -EINVAL;
185         }
186
187         if (uf_info->utftt & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
188                 printk(KERN_ERR "%s: utftt is not aligned", __FUNCTION__);
189                 return -EINVAL;
190         }
191
192         uccf = kzalloc(sizeof(struct ucc_fast_private), GFP_KERNEL);
193         if (!uccf) {
194                 printk(KERN_ERR "%s: Cannot allocate private data", __FUNCTION__);
195                 return -ENOMEM;
196         }
197
198         /* Fill fast UCC structure */
199         uccf->uf_info = uf_info;
200         /* Set the PHY base address */
201         uccf->uf_regs = ioremap(uf_info->regs, sizeof(struct ucc_fast));
202         if (uccf->uf_regs == NULL) {
203                 printk(KERN_ERR "%s: Cannot map UCC registers", __FUNCTION__);
204                 return -ENOMEM;
205         }
206
207         uccf->enabled_tx = 0;
208         uccf->enabled_rx = 0;
209         uccf->stopped_tx = 0;
210         uccf->stopped_rx = 0;
211         uf_regs = uccf->uf_regs;
212         uccf->p_ucce = (u32 *) & (uf_regs->ucce);
213         uccf->p_uccm = (u32 *) & (uf_regs->uccm);
214 #ifdef CONFIG_UGETH_TX_ON_DEMAND
215         uccf->p_utodr = (u16 *) & (uf_regs->utodr);
216 #endif
217 #ifdef STATISTICS
218         uccf->tx_frames = 0;
219         uccf->rx_frames = 0;
220         uccf->rx_discarded = 0;
221 #endif                          /* STATISTICS */
222
223         /* Init Guemr register */
224         if ((ret = ucc_init_guemr((struct ucc_common *) (uf_regs)))) {
225                 printk(KERN_ERR "%s: cannot init GUEMR", __FUNCTION__);
226                 ucc_fast_free(uccf);
227                 return ret;
228         }
229
230         /* Set UCC to fast type */
231         if ((ret = ucc_set_type(uf_info->ucc_num,
232                                 (struct ucc_common *) (uf_regs),
233                                 UCC_SPEED_TYPE_FAST))) {
234                 printk(KERN_ERR "%s: cannot set UCC type", __FUNCTION__);
235                 ucc_fast_free(uccf);
236                 return ret;
237         }
238
239         uccf->mrblr = uf_info->max_rx_buf_length;
240
241         /* Set GUMR */
242         /* For more details see the hardware spec. */
243         gumr = uf_info->ttx_trx;
244         if (uf_info->tci)
245                 gumr |= UCC_FAST_GUMR_TCI;
246         if (uf_info->cdp)
247                 gumr |= UCC_FAST_GUMR_CDP;
248         if (uf_info->ctsp)
249                 gumr |= UCC_FAST_GUMR_CTSP;
250         if (uf_info->cds)
251                 gumr |= UCC_FAST_GUMR_CDS;
252         if (uf_info->ctss)
253                 gumr |= UCC_FAST_GUMR_CTSS;
254         if (uf_info->txsy)
255                 gumr |= UCC_FAST_GUMR_TXSY;
256         if (uf_info->rsyn)
257                 gumr |= UCC_FAST_GUMR_RSYN;
258         gumr |= uf_info->synl;
259         if (uf_info->rtsm)
260                 gumr |= UCC_FAST_GUMR_RTSM;
261         gumr |= uf_info->renc;
262         if (uf_info->revd)
263                 gumr |= UCC_FAST_GUMR_REVD;
264         gumr |= uf_info->tenc;
265         gumr |= uf_info->tcrc;
266         gumr |= uf_info->mode;
267         out_be32(&uf_regs->gumr, gumr);
268
269         /* Allocate memory for Tx Virtual Fifo */
270         uccf->ucc_fast_tx_virtual_fifo_base_offset =
271             qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
272         if (IS_ERR_VALUE(uccf->ucc_fast_tx_virtual_fifo_base_offset)) {
273                 printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO", __FUNCTION__);
274                 uccf->ucc_fast_tx_virtual_fifo_base_offset = 0;
275                 ucc_fast_free(uccf);
276                 return -ENOMEM;
277         }
278
279         /* Allocate memory for Rx Virtual Fifo */
280         uccf->ucc_fast_rx_virtual_fifo_base_offset =
281                 qe_muram_alloc(uf_info->urfs +
282                            UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR,
283                            UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
284         if (IS_ERR_VALUE(uccf->ucc_fast_rx_virtual_fifo_base_offset)) {
285                 printk(KERN_ERR "%s: cannot allocate MURAM for RX FIFO", __FUNCTION__);
286                 uccf->ucc_fast_rx_virtual_fifo_base_offset = 0;
287                 ucc_fast_free(uccf);
288                 return -ENOMEM;
289         }
290
291         /* Set Virtual Fifo registers */
292         out_be16(&uf_regs->urfs, uf_info->urfs);
293         out_be16(&uf_regs->urfet, uf_info->urfet);
294         out_be16(&uf_regs->urfset, uf_info->urfset);
295         out_be16(&uf_regs->utfs, uf_info->utfs);
296         out_be16(&uf_regs->utfet, uf_info->utfet);
297         out_be16(&uf_regs->utftt, uf_info->utftt);
298         /* utfb, urfb are offsets from MURAM base */
299         out_be32(&uf_regs->utfb, uccf->ucc_fast_tx_virtual_fifo_base_offset);
300         out_be32(&uf_regs->urfb, uccf->ucc_fast_rx_virtual_fifo_base_offset);
301
302         /* Mux clocking */
303         /* Grant Support */
304         ucc_set_qe_mux_grant(uf_info->ucc_num, uf_info->grant_support);
305         /* Breakpoint Support */
306         ucc_set_qe_mux_bkpt(uf_info->ucc_num, uf_info->brkpt_support);
307         /* Set Tsa or NMSI mode. */
308         ucc_set_qe_mux_tsa(uf_info->ucc_num, uf_info->tsa);
309         /* If NMSI (not Tsa), set Tx and Rx clock. */
310         if (!uf_info->tsa) {
311                 /* Rx clock routing */
312                 if ((uf_info->rx_clock != QE_CLK_NONE) &&
313                     ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->rx_clock,
314                                         COMM_DIR_RX)) {
315                         printk(KERN_ERR "%s: illegal value for RX clock",
316                                __FUNCTION__);
317                         ucc_fast_free(uccf);
318                         return -EINVAL;
319                 }
320                 /* Tx clock routing */
321                 if ((uf_info->tx_clock != QE_CLK_NONE) &&
322                     ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->tx_clock,
323                                         COMM_DIR_TX)) {
324                         printk(KERN_ERR "%s: illegal value for TX clock",
325                                __FUNCTION__);
326                         ucc_fast_free(uccf);
327                         return -EINVAL;
328                 }
329         }
330
331         /* Set interrupt mask register at UCC level. */
332         out_be32(&uf_regs->uccm, uf_info->uccm_mask);
333
334         /* First, clear anything pending at UCC level,
335          * otherwise, old garbage may come through
336          * as soon as the dam is opened. */
337
338         /* Writing '1' clears */
339         out_be32(&uf_regs->ucce, 0xffffffff);
340
341         *uccf_ret = uccf;
342         return 0;
343 }
344
345 void ucc_fast_free(struct ucc_fast_private * uccf)
346 {
347         if (!uccf)
348                 return;
349
350         if (uccf->ucc_fast_tx_virtual_fifo_base_offset)
351                 qe_muram_free(uccf->ucc_fast_tx_virtual_fifo_base_offset);
352
353         if (uccf->ucc_fast_rx_virtual_fifo_base_offset)
354                 qe_muram_free(uccf->ucc_fast_rx_virtual_fifo_base_offset);
355
356         kfree(uccf);
357 }