8 #ifdef CONFIG_CALGARY_IOMMU
9 static inline void* pci_iommu(struct pci_bus *bus)
11 struct pci_sysdata *sd = bus->sysdata;
15 static inline void set_pci_iommu(struct pci_bus *bus, void *val)
17 struct pci_sysdata *sd = bus->sysdata;
20 #endif /* CONFIG_CALGARY_IOMMU */
23 extern int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value);
24 extern int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value);
28 extern void pci_iommu_alloc(void);
30 /* The PCI address space does equal the physical memory
31 * address space. The networking and block device layers use
32 * this boolean for bounce buffer decisions
34 * On AMD64 it mostly equals, but we set it to zero if a hardware
35 * IOMMU (gart) of sotware IOMMU (swiotlb) is available.
37 #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
39 #if defined(CONFIG_GART_IOMMU) || defined(CONFIG_CALGARY_IOMMU)
41 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
43 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
45 #define pci_unmap_addr(PTR, ADDR_NAME) \
47 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
48 (((PTR)->ADDR_NAME) = (VAL))
49 #define pci_unmap_len(PTR, LEN_NAME) \
51 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
52 (((PTR)->LEN_NAME) = (VAL))
57 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
58 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
59 #define pci_unmap_addr(PTR, ADDR_NAME) (0)
60 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
61 #define pci_unmap_len(PTR, LEN_NAME) (0)
62 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
66 #endif /* __KERNEL__ */
69 #endif /* __x8664_PCI_H */