2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2001-2004 Silicon Graphics, Inc. All rights reserved.
9 #include <linux/interrupt.h>
10 #include <linux/types.h>
11 #include <linux/pci.h>
12 #include <asm/sn/addrs.h>
13 #include <asm/sn/geo.h>
14 #include <asm/sn/pcibr_provider.h>
15 #include <asm/sn/pcibus_provider_defs.h>
16 #include <asm/sn/pcidev.h>
17 #include <asm/sn/sn_sal.h>
18 #include <asm/sn/sn2/sn_hwperf.h>
19 #include "xtalk/xwidgetdev.h"
20 #include "xtalk/hubdev.h"
23 sal_pcibr_slot_enable(struct pcibus_info *soft, int device, void *resp)
25 struct ia64_sal_retval ret_stuff;
32 segment = soft->pbi_buscommon.bs_persist_segment;
33 busnum = soft->pbi_buscommon.bs_persist_busnum;
34 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_SLOT_ENABLE, segment,
35 busnum, (u64) device, (u64) resp, 0, 0, 0);
37 return (int)ret_stuff.v0;
41 sal_pcibr_slot_disable(struct pcibus_info *soft, int device, int action,
44 struct ia64_sal_retval ret_stuff;
51 segment = soft->pbi_buscommon.bs_persist_segment;
52 busnum = soft->pbi_buscommon.bs_persist_busnum;
53 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_SLOT_DISABLE,
54 segment, busnum, (u64) device, (u64) action,
57 return (int)ret_stuff.v0;
60 static int sal_pcibr_error_interrupt(struct pcibus_info *soft)
62 struct ia64_sal_retval ret_stuff;
68 segment = soft->pbi_buscommon.bs_persist_segment;
69 busnum = soft->pbi_buscommon.bs_persist_busnum;
70 SAL_CALL_NOLOCK(ret_stuff,
71 (u64) SN_SAL_IOIF_ERROR_INTERRUPT,
72 (u64) segment, (u64) busnum, 0, 0, 0, 0, 0);
74 return (int)ret_stuff.v0;
78 * PCI Bridge Error interrupt handler. Gets invoked whenever a PCI
79 * bridge sends an error interrupt.
82 pcibr_error_intr_handler(int irq, void *arg, struct pt_regs *regs)
84 struct pcibus_info *soft = (struct pcibus_info *)arg;
86 if (sal_pcibr_error_interrupt(soft) < 0) {
87 panic("pcibr_error_intr_handler(): Fatal Bridge Error");
93 pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller)
97 struct hubdev_info *hubdev_info;
98 struct pcibus_info *soft;
99 struct sn_flush_device_kernel *sn_flush_device_kernel;
100 struct sn_flush_device_common *common;
102 if (! IS_PCI_BRIDGE_ASIC(prom_bussoft->bs_asic_type)) {
107 * Allocate kernel bus soft and copy from prom.
110 soft = kmalloc(sizeof(struct pcibus_info), GFP_KERNEL);
115 memcpy(soft, prom_bussoft, sizeof(struct pcibus_info));
116 soft->pbi_buscommon.bs_base =
117 (((u64) soft->pbi_buscommon.
118 bs_base << 4) >> 4) | __IA64_UNCACHED_OFFSET;
120 spin_lock_init(&soft->pbi_lock);
123 * register the bridge's error interrupt handler
125 if (request_irq(SGI_PCIASIC_ERROR, (void *)pcibr_error_intr_handler,
126 SA_SHIRQ, "PCIBR error", (void *)(soft))) {
128 "pcibr cannot allocate interrupt for error handler\n");
132 * Update the Bridge with the "kernel" pagesize
134 if (PAGE_SIZE < 16384) {
135 pcireg_control_bit_clr(soft, PCIBR_CTRL_PAGE_SIZE);
137 pcireg_control_bit_set(soft, PCIBR_CTRL_PAGE_SIZE);
140 nasid = NASID_GET(soft->pbi_buscommon.bs_base);
141 cnode = nasid_to_cnodeid(nasid);
142 hubdev_info = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo);
144 if (hubdev_info->hdi_flush_nasid_list.widget_p) {
145 sn_flush_device_kernel = hubdev_info->hdi_flush_nasid_list.
146 widget_p[(int)soft->pbi_buscommon.bs_xid];
147 if (sn_flush_device_kernel) {
148 for (j = 0; j < DEV_PER_WIDGET;
149 j++, sn_flush_device_kernel++) {
150 common = sn_flush_device_kernel->common;
151 if (common->sfdl_slot == -1)
153 if ((common->sfdl_persistent_segment ==
154 soft->pbi_buscommon.bs_persist_segment) &&
155 (common->sfdl_persistent_busnum ==
156 soft->pbi_buscommon.bs_persist_busnum))
157 common->sfdl_pcibus_info =
163 /* Setup the PMU ATE map */
164 soft->pbi_int_ate_resource.lowest_free_index = 0;
165 soft->pbi_int_ate_resource.ate =
166 kzalloc(soft->pbi_int_ate_size * sizeof(u64), GFP_KERNEL);
168 if (!soft->pbi_int_ate_resource.ate) {
173 if (prom_bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) {
174 /* TIO PCI Bridge: find nearest node with CPUs */
175 int e = sn_hwperf_get_nearest_node(cnode, NULL, &near_cnode);
178 near_cnode = (cnodeid_t)-1; /* use any node */
179 printk(KERN_WARNING "pcibr_bus_fixup: failed to find "
180 "near node with CPUs to TIO node %d, err=%d\n",
183 controller->node = near_cnode;
186 controller->node = cnode;
190 void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info)
192 struct pcidev_info *pcidev_info;
193 struct pcibus_info *pcibus_info;
194 int bit = sn_irq_info->irq_int_bit;
196 if (! sn_irq_info->irq_bridge)
199 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
202 (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
204 pcireg_force_intr_set(pcibus_info, bit);
208 void pcibr_target_interrupt(struct sn_irq_info *sn_irq_info)
210 struct pcidev_info *pcidev_info;
211 struct pcibus_info *pcibus_info;
212 int bit = sn_irq_info->irq_int_bit;
213 u64 xtalk_addr = sn_irq_info->irq_xtalkaddr;
215 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
218 (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
221 /* Disable the device's IRQ */
222 pcireg_intr_enable_bit_clr(pcibus_info, (1 << bit));
224 /* Change the device's IRQ */
225 pcireg_intr_addr_addr_set(pcibus_info, bit, xtalk_addr);
227 /* Re-enable the device's IRQ */
228 pcireg_intr_enable_bit_set(pcibus_info, (1 << bit));
230 pcibr_force_interrupt(sn_irq_info);
235 * Provider entries for PIC/CP
238 struct sn_pcibus_provider pcibr_provider = {
239 .dma_map = pcibr_dma_map,
240 .dma_map_consistent = pcibr_dma_map_consistent,
241 .dma_unmap = pcibr_dma_unmap,
242 .bus_fixup = pcibr_bus_fixup,
243 .force_interrupt = pcibr_force_interrupt,
244 .target_interrupt = pcibr_target_interrupt
248 pcibr_init_provider(void)
250 sn_pci_provider[PCIIO_ASIC_TYPE_PIC] = &pcibr_provider;
251 sn_pci_provider[PCIIO_ASIC_TYPE_TIOCP] = &pcibr_provider;
256 EXPORT_SYMBOL_GPL(sal_pcibr_slot_enable);
257 EXPORT_SYMBOL_GPL(sal_pcibr_slot_disable);