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   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/ip.h>
  37 #include <linux/tcp.h>
  38 #include <linux/ipv6.h>
  39 #include <net/checksum.h>
  40 #include <net/ip6_checksum.h>
  41 #include <linux/ethtool.h>
  42 #include <linux/if_vlan.h>
  43
  44 #include "ixgbe.h"
  45 #include "ixgbe_common.h"
  46
  47 char ixgbe_driver_name[] = "ixgbe";
  48 static const char ixgbe_driver_string[] =
  49         "Intel(R) 10 Gigabit PCI Express Network Driver";
  50
  51 #define DRV_VERSION "1.3.18-k2"
  52 const char ixgbe_driver_version[] = DRV_VERSION;
  53 static const char ixgbe_copyright[] =
  54          "Copyright (c) 1999-2007 Intel Corporation.";
  55
  56 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  57         [board_82598]                   = &ixgbe_82598_info,
  58 };
  59
  60 /* ixgbe_pci_tbl - PCI Device ID Table
  61  *
  62  * Wildcard entries (PCI_ANY_ID) should come last
  63  * Last entry must be all 0s
  64  *
  65  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  66  *   Class, Class Mask, private data (not used) }
  67  */
  68 static struct pci_device_id ixgbe_pci_tbl[] = {
  69         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
  70          board_82598 },
  71         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
  72          board_82598 },
  73         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT_DUAL_PORT),
  74          board_82598 },
  75         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
  76          board_82598 },
  77
  78         /* required last entry */
  79         {0, }
  80 };
  81 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
  82
  83 #ifdef CONFIG_DCA
  84 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
  85                             void *p);
  86 static struct notifier_block dca_notifier = {
  87         .notifier_call = ixgbe_notify_dca,
  88         .next          = NULL,
  89         .priority      = 0
  90 };
  91 #endif
  92
  93 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  94 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
  95 MODULE_LICENSE("GPL");
  96 MODULE_VERSION(DRV_VERSION);
  97
  98 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
  99
 100 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 101 {
 102         u32 ctrl_ext;
 103
 104         /* Let firmware take over control of h/w */
 105         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 106         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 107                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 108 }
 109
 110 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 111 {
 112         u32 ctrl_ext;
 113
 114         /* Let firmware know the driver has taken over */
 115         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 116         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 117                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 118 }
 119
 120 #ifdef DEBUG
 121 /**
 122  * ixgbe_get_hw_dev_name - return device name string
 123  * used by hardware layer to print debugging information
 124  **/
 125 char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
 126 {
 127         struct ixgbe_adapter *adapter = hw->back;
 128         struct net_device *netdev = adapter->netdev;
 129         return netdev->name;
 130 }
 131 #endif
 132
 133 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
 134                            u8 msix_vector)
 135 {
 136         u32 ivar, index;
 137
 138         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 139         index = (int_alloc_entry >> 2) & 0x1F;
 140         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
 141         ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
 142         ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
 143         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
 144 }
 145
 146 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
 147                                              struct ixgbe_tx_buffer
 148                                              *tx_buffer_info)
 149 {
 150         if (tx_buffer_info->dma) {
 151                 pci_unmap_page(adapter->pdev,
 152                                tx_buffer_info->dma,
 153                                tx_buffer_info->length, PCI_DMA_TODEVICE);
 154                 tx_buffer_info->dma = 0;
 155         }
 156         if (tx_buffer_info->skb) {
 157                 dev_kfree_skb_any(tx_buffer_info->skb);
 158                 tx_buffer_info->skb = NULL;
 159         }
 160         /* tx_buffer_info must be completely set up in the transmit path */
 161 }
 162
 163 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
 164                                        struct ixgbe_ring *tx_ring,
 165                                        unsigned int eop,
 166                                        union ixgbe_adv_tx_desc *eop_desc)
 167 {
 168         /* Detect a transmit hang in hardware, this serializes the
 169          * check with the clearing of time_stamp and movement of i */
 170         adapter->detect_tx_hung = false;
 171         if (tx_ring->tx_buffer_info[eop].dma &&
 172             time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
 173             !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
 174                 /* detected Tx unit hang */
 175                 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
 176                         "  TDH                  <%x>\n"
 177                         "  TDT                  <%x>\n"
 178                         "  next_to_use          <%x>\n"
 179                         "  next_to_clean        <%x>\n"
 180                         "tx_buffer_info[next_to_clean]\n"
 181                         "  time_stamp           <%lx>\n"
 182                         "  next_to_watch        <%x>\n"
 183                         "  jiffies              <%lx>\n"
 184                         "  next_to_watch.status <%x>\n",
 185                         readl(adapter->hw.hw_addr + tx_ring->head),
 186                         readl(adapter->hw.hw_addr + tx_ring->tail),
 187                         tx_ring->next_to_use,
 188                         tx_ring->next_to_clean,
 189                         tx_ring->tx_buffer_info[eop].time_stamp,
 190                         eop, jiffies, eop_desc->wb.status);
 191                 return true;
 192         }
 193
 194         return false;
 195 }
 196
 197 #define IXGBE_MAX_TXD_PWR       14
 198 #define IXGBE_MAX_DATA_PER_TXD  (1 << IXGBE_MAX_TXD_PWR)
 199
 200 /* Tx Descriptors needed, worst case */
 201 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
 202                          (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
 203 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
 204         MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1)   /* for context */
 205
 206 /**
 207  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
 208  * @adapter: board private structure
 209  **/
 210 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
 211                                     struct ixgbe_ring *tx_ring)
 212 {
 213         struct net_device *netdev = adapter->netdev;
 214         union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
 215         struct ixgbe_tx_buffer *tx_buffer_info;
 216         unsigned int i, eop;
 217         bool cleaned = false;
 218         unsigned int total_tx_bytes = 0, total_tx_packets = 0;
 219
 220         i = tx_ring->next_to_clean;
 221         eop = tx_ring->tx_buffer_info[i].next_to_watch;
 222         eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 223         while (eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) {
 224                 cleaned = false;
 225                 while (!cleaned) {
 226                         tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
 227                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
 228                         cleaned = (i == eop);
 229
 230                         tx_ring->stats.bytes += tx_buffer_info->length;
 231                         if (cleaned) {
 232                                 struct sk_buff *skb = tx_buffer_info->skb;
 233                                 unsigned int segs, bytecount;
 234                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
 235                                 /* multiply data chunks by size of headers */
 236                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
 237                                             skb->len;
 238                                 total_tx_packets += segs;
 239                                 total_tx_bytes += bytecount;
 240                         }
 241                         ixgbe_unmap_and_free_tx_resource(adapter,
 242                                                          tx_buffer_info);
 243                         tx_desc->wb.status = 0;
 244
 245                         i++;
 246                         if (i == tx_ring->count)
 247                                 i = 0;
 248                 }
 249
 250                 tx_ring->stats.packets++;
 251
 252                 eop = tx_ring->tx_buffer_info[i].next_to_watch;
 253                 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 254
 255                 /* weight of a sort for tx, avoid endless transmit cleanup */
 256                 if (total_tx_packets >= tx_ring->work_limit)
 257                         break;
 258         }
 259
 260         tx_ring->next_to_clean = i;
 261
 262 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
 263         if (total_tx_packets && netif_carrier_ok(netdev) &&
 264             (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
 265                 /* Make sure that anybody stopping the queue after this
 266                  * sees the new next_to_clean.
 267                  */
 268                 smp_mb();
 269                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
 270                     !test_bit(__IXGBE_DOWN, &adapter->state)) {
 271                         netif_wake_subqueue(netdev, tx_ring->queue_index);
 272                         adapter->restart_queue++;
 273                 }
 274         }
 275
 276         if (adapter->detect_tx_hung)
 277                 if (ixgbe_check_tx_hang(adapter, tx_ring, eop, eop_desc))
 278                         netif_stop_subqueue(netdev, tx_ring->queue_index);
 279
 280         if (total_tx_packets >= tx_ring->work_limit)
 281                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->eims_value);
 282
 283         tx_ring->total_bytes += total_tx_bytes;
 284         tx_ring->total_packets += total_tx_packets;
 285         adapter->net_stats.tx_bytes += total_tx_bytes;
 286         adapter->net_stats.tx_packets += total_tx_packets;
 287         cleaned = total_tx_packets ? true : false;
 288         return cleaned;
 289 }
 290
 291 #ifdef CONFIG_DCA
 292 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
 293                                 struct ixgbe_ring *rxr)
 294 {
 295         u32 rxctrl;
 296         int cpu = get_cpu();
 297         int q = rxr - adapter->rx_ring;
 298
 299         if (rxr->cpu != cpu) {
 300                 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
 301                 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
 302                 rxctrl |= dca_get_tag(cpu);
 303                 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
 304                 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
 305                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
 306                 rxr->cpu = cpu;
 307         }
 308         put_cpu();
 309 }
 310
 311 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
 312                                 struct ixgbe_ring *txr)
 313 {
 314         u32 txctrl;
 315         int cpu = get_cpu();
 316         int q = txr - adapter->tx_ring;
 317
 318         if (txr->cpu != cpu) {
 319                 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
 320                 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
 321                 txctrl |= dca_get_tag(cpu);
 322                 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
 323                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
 324                 txr->cpu = cpu;
 325         }
 326         put_cpu();
 327 }
 328
 329 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
 330 {
 331         int i;
 332
 333         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
 334                 return;
 335
 336         for (i = 0; i < adapter->num_tx_queues; i++) {
 337                 adapter->tx_ring[i].cpu = -1;
 338                 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
 339         }
 340         for (i = 0; i < adapter->num_rx_queues; i++) {
 341                 adapter->rx_ring[i].cpu = -1;
 342                 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
 343         }
 344 }
 345
 346 static int __ixgbe_notify_dca(struct device *dev, void *data)
 347 {
 348         struct net_device *netdev = dev_get_drvdata(dev);
 349         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 350         unsigned long event = *(unsigned long *)data;
 351
 352         switch (event) {
 353         case DCA_PROVIDER_ADD:
 354                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
 355                 /* Always use CB2 mode, difference is masked
 356                  * in the CB driver. */
 357                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
 358                 if (dca_add_requester(dev) == 0) {
 359                         ixgbe_setup_dca(adapter);
 360                         break;
 361                 }
 362                 /* Fall Through since DCA is disabled. */
 363         case DCA_PROVIDER_REMOVE:
 364                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
 365                         dca_remove_requester(dev);
 366                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
 367                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
 368                 }
 369                 break;
 370         }
 371
 372         return 0;
 373 }
 374
 375 #endif /* CONFIG_DCA */
 376 /**
 377  * ixgbe_receive_skb - Send a completed packet up the stack
 378  * @adapter: board private structure
 379  * @skb: packet to send up
 380  * @status: hardware indication of status of receive
 381  * @rx_ring: rx descriptor ring (for a specific queue) to setup
 382  * @rx_desc: rx descriptor
 383  **/
 384 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
 385                               struct sk_buff *skb, u8 status,
 386                               struct ixgbe_ring *ring,
 387                               union ixgbe_adv_rx_desc *rx_desc)
 388 {
 389         bool is_vlan = (status & IXGBE_RXD_STAT_VP);
 390         u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
 391
 392         if (adapter->netdev->features & NETIF_F_LRO &&
 393             skb->ip_summed == CHECKSUM_UNNECESSARY) {
 394                 if (adapter->vlgrp && is_vlan)
 395                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
 396                                                      adapter->vlgrp, tag,
 397                                                      rx_desc);
 398                 else
 399                         lro_receive_skb(&ring->lro_mgr, skb, rx_desc);
 400                 ring->lro_used = true;
 401         } else {
 402                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
 403                         if (adapter->vlgrp && is_vlan)
 404                                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
 405                         else
 406                                 netif_receive_skb(skb);
 407                 } else {
 408                         if (adapter->vlgrp && is_vlan)
 409                                 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
 410                         else
 411                                 netif_rx(skb);
 412                 }
 413         }
 414 }
 415
 416 /**
 417  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
 418  * @adapter: address of board private structure
 419  * @status_err: hardware indication of status of receive
 420  * @skb: skb currently being received and modified
 421  **/
 422 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
 423                                          u32 status_err,
 424                                          struct sk_buff *skb)
 425 {
 426         skb->ip_summed = CHECKSUM_NONE;
 427
 428         /* Ignore Checksum bit is set, or rx csum disabled */
 429         if ((status_err & IXGBE_RXD_STAT_IXSM) ||
 430             !(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
 431                 return;
 432
 433         /* if IP and error */
 434         if ((status_err & IXGBE_RXD_STAT_IPCS) &&
 435             (status_err & IXGBE_RXDADV_ERR_IPE)) {
 436                 adapter->hw_csum_rx_error++;
 437                 return;
 438         }
 439
 440         if (!(status_err & IXGBE_RXD_STAT_L4CS))
 441                 return;
 442
 443         if (status_err & IXGBE_RXDADV_ERR_TCPE) {
 444                 adapter->hw_csum_rx_error++;
 445                 return;
 446         }
 447
 448         /* It must be a TCP or UDP packet with a valid checksum */
 449         skb->ip_summed = CHECKSUM_UNNECESSARY;
 450         adapter->hw_csum_rx_good++;
 451 }
 452
 453 /**
 454  * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
 455  * @adapter: address of board private structure
 456  **/
 457 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
 458                                        struct ixgbe_ring *rx_ring,
 459                                        int cleaned_count)
 460 {
 461         struct net_device *netdev = adapter->netdev;
 462         struct pci_dev *pdev = adapter->pdev;
 463         union ixgbe_adv_rx_desc *rx_desc;
 464         struct ixgbe_rx_buffer *rx_buffer_info;
 465         struct sk_buff *skb;
 466         unsigned int i;
 467         unsigned int bufsz = adapter->rx_buf_len + NET_IP_ALIGN;
 468
 469         i = rx_ring->next_to_use;
 470         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 471
 472         while (cleaned_count--) {
 473                 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 474
 475                 if (!rx_buffer_info->page &&
 476                                 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
 477                         rx_buffer_info->page = alloc_page(GFP_ATOMIC);
 478                         if (!rx_buffer_info->page) {
 479                                 adapter->alloc_rx_page_failed++;
 480                                 goto no_buffers;
 481                         }
 482                         rx_buffer_info->page_dma =
 483                             pci_map_page(pdev, rx_buffer_info->page,
 484                                          0, PAGE_SIZE, PCI_DMA_FROMDEVICE);
 485                 }
 486
 487                 if (!rx_buffer_info->skb) {
 488                         skb = netdev_alloc_skb(netdev, bufsz);
 489
 490                         if (!skb) {
 491                                 adapter->alloc_rx_buff_failed++;
 492                                 goto no_buffers;
 493                         }
 494
 495                         /*
 496                          * Make buffer alignment 2 beyond a 16 byte boundary
 497                          * this will result in a 16 byte aligned IP header after
 498                          * the 14 byte MAC header is removed
 499                          */
 500                         skb_reserve(skb, NET_IP_ALIGN);
 501
 502                         rx_buffer_info->skb = skb;
 503                         rx_buffer_info->dma = pci_map_single(pdev, skb->data,
 504                                                           bufsz,
 505                                                           PCI_DMA_FROMDEVICE);
 506                 }
 507                 /* Refresh the desc even if buffer_addrs didn't change because
 508                  * each write-back erases this info. */
 509                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 510                         rx_desc->read.pkt_addr =
 511                             cpu_to_le64(rx_buffer_info->page_dma);
 512                         rx_desc->read.hdr_addr =
 513                                         cpu_to_le64(rx_buffer_info->dma);
 514                 } else {
 515                         rx_desc->read.pkt_addr =
 516                                         cpu_to_le64(rx_buffer_info->dma);
 517                 }
 518
 519                 i++;
 520                 if (i == rx_ring->count)
 521                         i = 0;
 522                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
 523         }
 524 no_buffers:
 525         if (rx_ring->next_to_use != i) {
 526                 rx_ring->next_to_use = i;
 527                 if (i-- == 0)
 528                         i = (rx_ring->count - 1);
 529
 530                 /*
 531                  * Force memory writes to complete before letting h/w
 532                  * know there are new descriptors to fetch.  (Only
 533                  * applicable for weak-ordered memory model archs,
 534                  * such as IA-64).
 535                  */
 536                 wmb();
 537                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
 538         }
 539 }
 540
 541 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
 542                                struct ixgbe_ring *rx_ring,
 543                                int *work_done, int work_to_do)
 544 {
 545         struct net_device *netdev = adapter->netdev;
 546         struct pci_dev *pdev = adapter->pdev;
 547         union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
 548         struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
 549         struct sk_buff *skb;
 550         unsigned int i;
 551         u32 upper_len, len, staterr;
 552         u16 hdr_info;
 553         bool cleaned = false;
 554         int cleaned_count = 0;
 555         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 556
 557         i = rx_ring->next_to_clean;
 558         upper_len = 0;
 559         rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 560         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 561         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 562
 563         while (staterr & IXGBE_RXD_STAT_DD) {
 564                 if (*work_done >= work_to_do)
 565                         break;
 566                 (*work_done)++;
 567
 568                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 569                         hdr_info =
 570                             le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info);
 571                         len =
 572                             ((hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
 573                              IXGBE_RXDADV_HDRBUFLEN_SHIFT);
 574                         if (hdr_info & IXGBE_RXDADV_SPH)
 575                                 adapter->rx_hdr_split++;
 576                         if (len > IXGBE_RX_HDR_SIZE)
 577                                 len = IXGBE_RX_HDR_SIZE;
 578                         upper_len = le16_to_cpu(rx_desc->wb.upper.length);
 579                 } else
 580                         len = le16_to_cpu(rx_desc->wb.upper.length);
 581
 582                 cleaned = true;
 583                 skb = rx_buffer_info->skb;
 584                 prefetch(skb->data - NET_IP_ALIGN);
 585                 rx_buffer_info->skb = NULL;
 586
 587                 if (len && !skb_shinfo(skb)->nr_frags) {
 588                         pci_unmap_single(pdev, rx_buffer_info->dma,
 589                                          adapter->rx_buf_len + NET_IP_ALIGN,
 590                                          PCI_DMA_FROMDEVICE);
 591                         skb_put(skb, len);
 592                 }
 593
 594                 if (upper_len) {
 595                         pci_unmap_page(pdev, rx_buffer_info->page_dma,
 596                                        PAGE_SIZE, PCI_DMA_FROMDEVICE);
 597                         rx_buffer_info->page_dma = 0;
 598                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
 599                                            rx_buffer_info->page, 0, upper_len);
 600                         rx_buffer_info->page = NULL;
 601
 602                         skb->len += upper_len;
 603                         skb->data_len += upper_len;
 604                         skb->truesize += upper_len;
 605                 }
 606
 607                 i++;
 608                 if (i == rx_ring->count)
 609                         i = 0;
 610                 next_buffer = &rx_ring->rx_buffer_info[i];
 611
 612                 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
 613                 prefetch(next_rxd);
 614
 615                 cleaned_count++;
 616                 if (staterr & IXGBE_RXD_STAT_EOP) {
 617                         rx_ring->stats.packets++;
 618                         rx_ring->stats.bytes += skb->len;
 619                 } else {
 620                         rx_buffer_info->skb = next_buffer->skb;
 621                         rx_buffer_info->dma = next_buffer->dma;
 622                         next_buffer->skb = skb;
 623                         adapter->non_eop_descs++;
 624                         goto next_desc;
 625                 }
 626
 627                 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
 628                         dev_kfree_skb_irq(skb);
 629                         goto next_desc;
 630                 }
 631
 632                 ixgbe_rx_checksum(adapter, staterr, skb);
 633
 634                 /* probably a little skewed due to removing CRC */
 635                 total_rx_bytes += skb->len;
 636                 total_rx_packets++;
 637
 638                 skb->protocol = eth_type_trans(skb, netdev);
 639                 ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc);
 640                 netdev->last_rx = jiffies;
 641
 642 next_desc:
 643                 rx_desc->wb.upper.status_error = 0;
 644
 645                 /* return some buffers to hardware, one at a time is too slow */
 646                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
 647                         ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 648                         cleaned_count = 0;
 649                 }
 650
 651                 /* use prefetched values */
 652                 rx_desc = next_rxd;
 653                 rx_buffer_info = next_buffer;
 654
 655                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 656         }
 657
 658         if (rx_ring->lro_used) {
 659                 lro_flush_all(&rx_ring->lro_mgr);
 660                 rx_ring->lro_used = false;
 661         }
 662
 663         rx_ring->next_to_clean = i;
 664         cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
 665
 666         if (cleaned_count)
 667                 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 668
 669         adapter->net_stats.rx_bytes += total_rx_bytes;
 670         adapter->net_stats.rx_packets += total_rx_packets;
 671
 672         rx_ring->total_packets += total_rx_packets;
 673         rx_ring->total_bytes += total_rx_bytes;
 674         adapter->net_stats.rx_bytes += total_rx_bytes;
 675         adapter->net_stats.rx_packets += total_rx_packets;
 676
 677         return cleaned;
 678 }
 679
 680 static int ixgbe_clean_rxonly(struct napi_struct *, int);
 681 /**
 682  * ixgbe_configure_msix - Configure MSI-X hardware
 683  * @adapter: board private structure
 684  *
 685  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
 686  * interrupts.
 687  **/
 688 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
 689 {
 690         struct ixgbe_q_vector *q_vector;
 691         int i, j, q_vectors, v_idx, r_idx;
 692         u32 mask;
 693
 694         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
 695
 696         /* Populate the IVAR table and set the ITR values to the
 697          * corresponding register.
 698          */
 699         for (v_idx = 0; v_idx < q_vectors; v_idx++) {
 700                 q_vector = &adapter->q_vector[v_idx];
 701                 /* XXX for_each_bit(...) */
 702                 r_idx = find_first_bit(q_vector->rxr_idx,
 703                                       adapter->num_rx_queues);
 704
 705                 for (i = 0; i < q_vector->rxr_count; i++) {
 706                         j = adapter->rx_ring[r_idx].reg_idx;
 707                         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
 708                         r_idx = find_next_bit(q_vector->rxr_idx,
 709                                               adapter->num_rx_queues,
 710                                               r_idx + 1);
 711                 }
 712                 r_idx = find_first_bit(q_vector->txr_idx,
 713                                        adapter->num_tx_queues);
 714
 715                 for (i = 0; i < q_vector->txr_count; i++) {
 716                         j = adapter->tx_ring[r_idx].reg_idx;
 717                         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
 718                         r_idx = find_next_bit(q_vector->txr_idx,
 719                                               adapter->num_tx_queues,
 720                                               r_idx + 1);
 721                 }
 722
 723                 /* if this is a tx only vector use half the irq (tx) rate */
 724                 if (q_vector->txr_count && !q_vector->rxr_count)
 725                         q_vector->eitr = adapter->tx_eitr;
 726                 else
 727                         /* rx only or mixed */
 728                         q_vector->eitr = adapter->rx_eitr;
 729
 730                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
 731                                 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
 732         }
 733
 734         ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
 735         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
 736
 737         /* set up to autoclear timer, lsc, and the vectors */
 738         mask = IXGBE_EIMS_ENABLE_MASK;
 739         mask &= ~IXGBE_EIMS_OTHER;
 740         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
 741 }
 742
 743 enum latency_range {
 744         lowest_latency = 0,
 745         low_latency = 1,
 746         bulk_latency = 2,
 747         latency_invalid = 255
 748 };
 749
 750 /**
 751  * ixgbe_update_itr - update the dynamic ITR value based on statistics
 752  * @adapter: pointer to adapter
 753  * @eitr: eitr setting (ints per sec) to give last timeslice
 754  * @itr_setting: current throttle rate in ints/second
 755  * @packets: the number of packets during this measurement interval
 756  * @bytes: the number of bytes during this measurement interval
 757  *
 758  *      Stores a new ITR value based on packets and byte
 759  *      counts during the last interrupt.  The advantage of per interrupt
 760  *      computation is faster updates and more accurate ITR for the current
 761  *      traffic pattern.  Constants in this function were computed
 762  *      based on theoretical maximum wire speed and thresholds were set based
 763  *      on testing data as well as attempting to minimize response time
 764  *      while increasing bulk throughput.
 765  *      this functionality is controlled by the InterruptThrottleRate module
 766  *      parameter (see ixgbe_param.c)
 767  **/
 768 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
 769                            u32 eitr, u8 itr_setting,
 770                            int packets, int bytes)
 771 {
 772         unsigned int retval = itr_setting;
 773         u32 timepassed_us;
 774         u64 bytes_perint;
 775
 776         if (packets == 0)
 777                 goto update_itr_done;
 778
 779
 780         /* simple throttlerate management
 781          *    0-20MB/s lowest (100000 ints/s)
 782          *   20-100MB/s low   (20000 ints/s)
 783          *  100-1249MB/s bulk (8000 ints/s)
 784          */
 785         /* what was last interrupt timeslice? */
 786         timepassed_us = 1000000/eitr;
 787         bytes_perint = bytes / timepassed_us; /* bytes/usec */
 788
 789         switch (itr_setting) {
 790         case lowest_latency:
 791                 if (bytes_perint > adapter->eitr_low)
 792                         retval = low_latency;
 793                 break;
 794         case low_latency:
 795                 if (bytes_perint > adapter->eitr_high)
 796                         retval = bulk_latency;
 797                 else if (bytes_perint <= adapter->eitr_low)
 798                         retval = lowest_latency;
 799                 break;
 800         case bulk_latency:
 801                 if (bytes_perint <= adapter->eitr_high)
 802                         retval = low_latency;
 803                 break;
 804         }
 805
 806 update_itr_done:
 807         return retval;
 808 }
 809
 810 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
 811 {
 812         struct ixgbe_adapter *adapter = q_vector->adapter;
 813         struct ixgbe_hw *hw = &adapter->hw;
 814         u32 new_itr;
 815         u8 current_itr, ret_itr;
 816         int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
 817                               sizeof(struct ixgbe_q_vector);
 818         struct ixgbe_ring *rx_ring, *tx_ring;
 819
 820         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 821         for (i = 0; i < q_vector->txr_count; i++) {
 822                 tx_ring = &(adapter->tx_ring[r_idx]);
 823                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 824                                            q_vector->tx_eitr,
 825                                            tx_ring->total_packets,
 826                                            tx_ring->total_bytes);
 827                 /* if the result for this queue would decrease interrupt
 828                  * rate for this vector then use that result */
 829                 q_vector->tx_eitr = ((q_vector->tx_eitr > ret_itr) ?
 830                                     q_vector->tx_eitr - 1 : ret_itr);
 831                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 832                                       r_idx + 1);
 833         }
 834
 835         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 836         for (i = 0; i < q_vector->rxr_count; i++) {
 837                 rx_ring = &(adapter->rx_ring[r_idx]);
 838                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 839                                            q_vector->rx_eitr,
 840                                            rx_ring->total_packets,
 841                                            rx_ring->total_bytes);
 842                 /* if the result for this queue would decrease interrupt
 843                  * rate for this vector then use that result */
 844                 q_vector->rx_eitr = ((q_vector->rx_eitr > ret_itr) ?
 845                                     q_vector->rx_eitr - 1 : ret_itr);
 846                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
 847                                       r_idx + 1);
 848         }
 849
 850         current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr);
 851
 852         switch (current_itr) {
 853         /* counts and packets in update_itr are dependent on these numbers */
 854         case lowest_latency:
 855                 new_itr = 100000;
 856                 break;
 857         case low_latency:
 858                 new_itr = 20000; /* aka hwitr = ~200 */
 859                 break;
 860         case bulk_latency:
 861         default:
 862                 new_itr = 8000;
 863                 break;
 864         }
 865
 866         if (new_itr != q_vector->eitr) {
 867                 u32 itr_reg;
 868                 /* do an exponential smoothing */
 869                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
 870                 q_vector->eitr = new_itr;
 871                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
 872                 /* must write high and low 16 bits to reset counter */
 873                 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
 874                         itr_reg);
 875                 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
 876         }
 877
 878         return;
 879 }
 880
 881 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
 882 {
 883         struct net_device *netdev = data;
 884         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 885         struct ixgbe_hw *hw = &adapter->hw;
 886         u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
 887
 888         if (eicr & IXGBE_EICR_LSC) {
 889                 adapter->lsc_int++;
 890                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
 891                         mod_timer(&adapter->watchdog_timer, jiffies);
 892         }
 893
 894         if (!test_bit(__IXGBE_DOWN, &adapter->state))
 895                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
 896
 897         return IRQ_HANDLED;
 898 }
 899
 900 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
 901 {
 902         struct ixgbe_q_vector *q_vector = data;
 903         struct ixgbe_adapter  *adapter = q_vector->adapter;
 904         struct ixgbe_ring     *txr;
 905         int i, r_idx;
 906
 907         if (!q_vector->txr_count)
 908                 return IRQ_HANDLED;
 909
 910         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 911         for (i = 0; i < q_vector->txr_count; i++) {
 912                 txr = &(adapter->tx_ring[r_idx]);
 913 #ifdef CONFIG_DCA
 914                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 915                         ixgbe_update_tx_dca(adapter, txr);
 916 #endif
 917                 txr->total_bytes = 0;
 918                 txr->total_packets = 0;
 919                 ixgbe_clean_tx_irq(adapter, txr);
 920                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 921                                       r_idx + 1);
 922         }
 923
 924         return IRQ_HANDLED;
 925 }
 926
 927 /**
 928  * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
 929  * @irq: unused
 930  * @data: pointer to our q_vector struct for this interrupt vector
 931  **/
 932 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
 933 {
 934         struct ixgbe_q_vector *q_vector = data;
 935         struct ixgbe_adapter  *adapter = q_vector->adapter;
 936         struct ixgbe_ring  *rxr;
 937         int r_idx;
 938
 939         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 940         if (!q_vector->rxr_count)
 941                 return IRQ_HANDLED;
 942
 943         rxr = &(adapter->rx_ring[r_idx]);
 944         /* disable interrupts on this vector only */
 945         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rxr->v_idx);
 946         rxr->total_bytes = 0;
 947         rxr->total_packets = 0;
 948         netif_rx_schedule(adapter->netdev, &q_vector->napi);
 949
 950         return IRQ_HANDLED;
 951 }
 952
 953 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
 954 {
 955         ixgbe_msix_clean_rx(irq, data);
 956         ixgbe_msix_clean_tx(irq, data);
 957
 958         return IRQ_HANDLED;
 959 }
 960
 961 /**
 962  * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
 963  * @napi: napi struct with our devices info in it
 964  * @budget: amount of work driver is allowed to do this pass, in packets
 965  *
 966  **/
 967 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
 968 {
 969         struct ixgbe_q_vector *q_vector =
 970                                container_of(napi, struct ixgbe_q_vector, napi);
 971         struct ixgbe_adapter *adapter = q_vector->adapter;
 972         struct ixgbe_ring *rxr;
 973         int work_done = 0;
 974         long r_idx;
 975
 976         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 977         rxr = &(adapter->rx_ring[r_idx]);
 978 #ifdef CONFIG_DCA
 979         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 980                 ixgbe_update_rx_dca(adapter, rxr);
 981 #endif
 982
 983         ixgbe_clean_rx_irq(adapter, rxr, &work_done, budget);
 984
 985         /* If all Rx work done, exit the polling mode */
 986         if (work_done < budget) {
 987                 netif_rx_complete(adapter->netdev, napi);
 988                 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS)
 989                         ixgbe_set_itr_msix(q_vector);
 990                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
 991                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rxr->v_idx);
 992         }
 993
 994         return work_done;
 995 }
 996
 997 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
 998                                      int r_idx)
 999 {
1000         a->q_vector[v_idx].adapter = a;
1001         set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1002         a->q_vector[v_idx].rxr_count++;
1003         a->rx_ring[r_idx].v_idx = 1 << v_idx;
1004 }
1005
1006 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1007                                      int r_idx)
1008 {
1009         a->q_vector[v_idx].adapter = a;
1010         set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1011         a->q_vector[v_idx].txr_count++;
1012         a->tx_ring[r_idx].v_idx = 1 << v_idx;
1013 }
1014
1015 /**
1016  * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1017  * @adapter: board private structure to initialize
1018  * @vectors: allotted vector count for descriptor rings
1019  *
1020  * This function maps descriptor rings to the queue-specific vectors
1021  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
1022  * one vector per ring/queue, but on a constrained vector budget, we
1023  * group the rings as "efficiently" as possible.  You would add new
1024  * mapping configurations in here.
1025  **/
1026 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1027                                       int vectors)
1028 {
1029         int v_start = 0;
1030         int rxr_idx = 0, txr_idx = 0;
1031         int rxr_remaining = adapter->num_rx_queues;
1032         int txr_remaining = adapter->num_tx_queues;
1033         int i, j;
1034         int rqpv, tqpv;
1035         int err = 0;
1036
1037         /* No mapping required if MSI-X is disabled. */
1038         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1039                 goto out;
1040
1041         /*
1042          * The ideal configuration...
1043          * We have enough vectors to map one per queue.
1044          */
1045         if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1046                 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1047                         map_vector_to_rxq(adapter, v_start, rxr_idx);
1048
1049                 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1050                         map_vector_to_txq(adapter, v_start, txr_idx);
1051
1052                 goto out;
1053         }
1054
1055         /*
1056          * If we don't have enough vectors for a 1-to-1
1057          * mapping, we'll have to group them so there are
1058          * multiple queues per vector.
1059          */
1060         /* Re-adjusting *qpv takes care of the remainder. */
1061         for (i = v_start; i < vectors; i++) {
1062                 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1063                 for (j = 0; j < rqpv; j++) {
1064                         map_vector_to_rxq(adapter, i, rxr_idx);
1065                         rxr_idx++;
1066                         rxr_remaining--;
1067                 }
1068         }
1069         for (i = v_start; i < vectors; i++) {
1070                 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1071                 for (j = 0; j < tqpv; j++) {
1072                         map_vector_to_txq(adapter, i, txr_idx);
1073                         txr_idx++;
1074                         txr_remaining--;
1075                 }
1076         }
1077
1078 out:
1079         return err;
1080 }
1081
1082 /**
1083  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1084  * @adapter: board private structure
1085  *
1086  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1087  * interrupts from the kernel.
1088  **/
1089 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1090 {
1091         struct net_device *netdev = adapter->netdev;
1092         irqreturn_t (*handler)(int, void *);
1093         int i, vector, q_vectors, err;
1094
1095         /* Decrement for Other and TCP Timer vectors */
1096         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1097
1098         /* Map the Tx/Rx rings to the vectors we were allotted. */
1099         err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1100         if (err)
1101                 goto out;
1102
1103 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1104                          (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1105                          &ixgbe_msix_clean_many)
1106         for (vector = 0; vector < q_vectors; vector++) {
1107                 handler = SET_HANDLER(&adapter->q_vector[vector]);
1108                 sprintf(adapter->name[vector], "%s:v%d-%s",
1109                         netdev->name, vector,
1110                         (handler == &ixgbe_msix_clean_rx) ? "Rx" :
1111                          ((handler == &ixgbe_msix_clean_tx) ? "Tx" : "TxRx"));
1112                 err = request_irq(adapter->msix_entries[vector].vector,
1113                                   handler, 0, adapter->name[vector],
1114                                   &(adapter->q_vector[vector]));
1115                 if (err) {
1116                         DPRINTK(PROBE, ERR,
1117                                 "request_irq failed for MSIX interrupt "
1118                                 "Error: %d\n", err);
1119                         goto free_queue_irqs;
1120                 }
1121         }
1122
1123         sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1124         err = request_irq(adapter->msix_entries[vector].vector,
1125                           &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1126         if (err) {
1127                 DPRINTK(PROBE, ERR,
1128                         "request_irq for msix_lsc failed: %d\n", err);
1129                 goto free_queue_irqs;
1130         }
1131
1132         return 0;
1133
1134 free_queue_irqs:
1135         for (i = vector - 1; i >= 0; i--)
1136                 free_irq(adapter->msix_entries[--vector].vector,
1137                          &(adapter->q_vector[i]));
1138         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1139         pci_disable_msix(adapter->pdev);
1140         kfree(adapter->msix_entries);
1141         adapter->msix_entries = NULL;
1142 out:
1143         return err;
1144 }
1145
1146 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1147 {
1148         struct ixgbe_hw *hw = &adapter->hw;
1149         struct ixgbe_q_vector *q_vector = adapter->q_vector;
1150         u8 current_itr;
1151         u32 new_itr = q_vector->eitr;
1152         struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1153         struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1154
1155         q_vector->tx_eitr = ixgbe_update_itr(adapter, new_itr,
1156                                              q_vector->tx_eitr,
1157                                              tx_ring->total_packets,
1158                                              tx_ring->total_bytes);
1159         q_vector->rx_eitr = ixgbe_update_itr(adapter, new_itr,
1160                                              q_vector->rx_eitr,
1161                                              rx_ring->total_packets,
1162                                              rx_ring->total_bytes);
1163
1164         current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr);
1165
1166         switch (current_itr) {
1167         /* counts and packets in update_itr are dependent on these numbers */
1168         case lowest_latency:
1169                 new_itr = 100000;
1170                 break;
1171         case low_latency:
1172                 new_itr = 20000; /* aka hwitr = ~200 */
1173                 break;
1174         case bulk_latency:
1175                 new_itr = 8000;
1176                 break;
1177         default:
1178                 break;
1179         }
1180
1181         if (new_itr != q_vector->eitr) {
1182                 u32 itr_reg;
1183                 /* do an exponential smoothing */
1184                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1185                 q_vector->eitr = new_itr;
1186                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1187                 /* must write high and low 16 bits to reset counter */
1188                 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1189         }
1190
1191         return;
1192 }
1193
1194 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter);
1195
1196 /**
1197  * ixgbe_intr - legacy mode Interrupt Handler
1198  * @irq: interrupt number
1199  * @data: pointer to a network interface device structure
1200  * @pt_regs: CPU registers structure
1201  **/
1202 static irqreturn_t ixgbe_intr(int irq, void *data)
1203 {
1204         struct net_device *netdev = data;
1205         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1206         struct ixgbe_hw *hw = &adapter->hw;
1207         u32 eicr;
1208
1209
1210         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1211          * therefore no explict interrupt disable is necessary */
1212         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1213         if (!eicr)
1214                 return IRQ_NONE;        /* Not our interrupt */
1215
1216         if (eicr & IXGBE_EICR_LSC) {
1217                 adapter->lsc_int++;
1218                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1219                         mod_timer(&adapter->watchdog_timer, jiffies);
1220         }
1221
1222
1223         if (netif_rx_schedule_prep(netdev, &adapter->q_vector[0].napi)) {
1224                 adapter->tx_ring[0].total_packets = 0;
1225                 adapter->tx_ring[0].total_bytes = 0;
1226                 adapter->rx_ring[0].total_packets = 0;
1227                 adapter->rx_ring[0].total_bytes = 0;
1228                 /* would disable interrupts here but EIAM disabled it */
1229                 __netif_rx_schedule(netdev, &adapter->q_vector[0].napi);
1230         }
1231
1232         return IRQ_HANDLED;
1233 }
1234
1235 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1236 {
1237         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1238
1239         for (i = 0; i < q_vectors; i++) {
1240                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1241                 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1242                 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1243                 q_vector->rxr_count = 0;
1244                 q_vector->txr_count = 0;
1245         }
1246 }
1247
1248 /**
1249  * ixgbe_request_irq - initialize interrupts
1250  * @adapter: board private structure
1251  *
1252  * Attempts to configure interrupts using the best available
1253  * capabilities of the hardware and kernel.
1254  **/
1255 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1256 {
1257         struct net_device *netdev = adapter->netdev;
1258         int err;
1259
1260         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1261                 err = ixgbe_request_msix_irqs(adapter);
1262         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1263                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1264                                   netdev->name, netdev);
1265         } else {
1266                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1267                                   netdev->name, netdev);
1268         }
1269
1270         if (err)
1271                 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1272
1273         return err;
1274 }
1275
1276 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1277 {
1278         struct net_device *netdev = adapter->netdev;
1279
1280         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1281                 int i, q_vectors;
1282
1283                 q_vectors = adapter->num_msix_vectors;
1284
1285                 i = q_vectors - 1;
1286                 free_irq(adapter->msix_entries[i].vector, netdev);
1287
1288                 i--;
1289                 for (; i >= 0; i--) {
1290                         free_irq(adapter->msix_entries[i].vector,
1291                                  &(adapter->q_vector[i]));
1292                 }
1293
1294                 ixgbe_reset_q_vectors(adapter);
1295         } else {
1296                 free_irq(adapter->pdev->irq, netdev);
1297         }
1298 }
1299
1300 /**
1301  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1302  * @adapter: board private structure
1303  **/
1304 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1305 {
1306         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1307         IXGBE_WRITE_FLUSH(&adapter->hw);
1308         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1309                 int i;
1310                 for (i = 0; i < adapter->num_msix_vectors; i++)
1311                         synchronize_irq(adapter->msix_entries[i].vector);
1312         } else {
1313                 synchronize_irq(adapter->pdev->irq);
1314         }
1315 }
1316
1317 /**
1318  * ixgbe_irq_enable - Enable default interrupt generation settings
1319  * @adapter: board private structure
1320  **/
1321 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1322 {
1323         u32 mask;
1324         mask = IXGBE_EIMS_ENABLE_MASK;
1325         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1326         IXGBE_WRITE_FLUSH(&adapter->hw);
1327 }
1328
1329 /**
1330  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1331  *
1332  **/
1333 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1334 {
1335         struct ixgbe_hw *hw = &adapter->hw;
1336
1337         IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1338                         EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr));
1339
1340         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1341         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1342
1343         map_vector_to_rxq(adapter, 0, 0);
1344         map_vector_to_txq(adapter, 0, 0);
1345
1346         DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1347 }
1348
1349 /**
1350  * ixgbe_configure_tx - Configure 8254x Transmit Unit after Reset
1351  * @adapter: board private structure
1352  *
1353  * Configure the Tx unit of the MAC after a reset.
1354  **/
1355 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1356 {
1357         u64 tdba;
1358         struct ixgbe_hw *hw = &adapter->hw;
1359         u32 i, j, tdlen, txctrl;
1360
1361         /* Setup the HW Tx Head and Tail descriptor pointers */
1362         for (i = 0; i < adapter->num_tx_queues; i++) {
1363                 j = adapter->tx_ring[i].reg_idx;
1364                 tdba = adapter->tx_ring[i].dma;
1365                 tdlen = adapter->tx_ring[i].count *
1366                         sizeof(union ixgbe_adv_tx_desc);
1367                 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1368                                 (tdba & DMA_32BIT_MASK));
1369                 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1370                 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1371                 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1372                 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1373                 adapter->tx_ring[i].head = IXGBE_TDH(j);
1374                 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1375                 /* Disable Tx Head Writeback RO bit, since this hoses
1376                  * bookkeeping if things aren't delivered in order.
1377                  */
1378                 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
1379                 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1380                 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), txctrl);
1381         }
1382 }
1383
1384 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1385                         (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1386
1387 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT                 2
1388 /**
1389  * ixgbe_get_skb_hdr - helper function for LRO header processing
1390  * @skb: pointer to sk_buff to be added to LRO packet
1391  * @iphdr: pointer to tcp header structure
1392  * @tcph: pointer to tcp header structure
1393  * @hdr_flags: pointer to header flags
1394  * @priv: private data
1395  **/
1396 static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
1397                              u64 *hdr_flags, void *priv)
1398 {
1399         union ixgbe_adv_rx_desc *rx_desc = priv;
1400
1401         /* Verify that this is a valid IPv4 TCP packet */
1402         if (!(rx_desc->wb.lower.lo_dword.pkt_info &
1403             (IXGBE_RXDADV_PKTTYPE_IPV4 | IXGBE_RXDADV_PKTTYPE_TCP)))
1404                 return -1;
1405
1406         /* Set network headers */
1407         skb_reset_network_header(skb);
1408         skb_set_transport_header(skb, ip_hdrlen(skb));
1409         *iphdr = ip_hdr(skb);
1410         *tcph = tcp_hdr(skb);
1411         *hdr_flags = LRO_IPV4 | LRO_TCP;
1412         return 0;
1413 }
1414
1415 /**
1416  * ixgbe_configure_rx - Configure 8254x Receive Unit after Reset
1417  * @adapter: board private structure
1418  *
1419  * Configure the Rx unit of the MAC after a reset.
1420  **/
1421 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1422 {
1423         u64 rdba;
1424         struct ixgbe_hw *hw = &adapter->hw;
1425         struct net_device *netdev = adapter->netdev;
1426         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1427         int i, j;
1428         u32 rdlen, rxctrl, rxcsum;
1429         u32 random[10];
1430         u32 fctrl, hlreg0;
1431         u32 pages;
1432         u32 reta = 0, mrqc, srrctl;
1433
1434         /* Decide whether to use packet split mode or not */
1435         if (netdev->mtu > ETH_DATA_LEN)
1436                 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1437         else
1438                 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1439
1440         /* Set the RX buffer length according to the mode */
1441         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1442                 adapter->rx_buf_len = IXGBE_RX_HDR_SIZE;
1443         } else {
1444                 if (netdev->mtu <= ETH_DATA_LEN)
1445                         adapter->rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1446                 else
1447                         adapter->rx_buf_len = ALIGN(max_frame, 1024);
1448         }
1449
1450         fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1451         fctrl |= IXGBE_FCTRL_BAM;
1452         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1453         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1454
1455         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1456         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1457                 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1458         else
1459                 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1460         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1461
1462         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1463
1464         srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0));
1465         srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1466         srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1467
1468         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1469                 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1470                 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1471                 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1472                             IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1473                            IXGBE_SRRCTL_BSIZEHDR_MASK);
1474         } else {
1475                 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1476
1477                 if (adapter->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1478                         srrctl |=
1479                              IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1480                 else
1481                         srrctl |=
1482                              adapter->rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1483         }
1484         IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl);
1485
1486         rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1487         /* disable receives while setting up the descriptors */
1488         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1489         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1490
1491         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1492          * the Base and Length of the Rx Descriptor Ring */
1493         for (i = 0; i < adapter->num_rx_queues; i++) {
1494                 rdba = adapter->rx_ring[i].dma;
1495                 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), (rdba & DMA_32BIT_MASK));
1496                 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(i), (rdba >> 32));
1497                 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(i), rdlen);
1498                 IXGBE_WRITE_REG(hw, IXGBE_RDH(i), 0);
1499                 IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0);
1500                 adapter->rx_ring[i].head = IXGBE_RDH(i);
1501                 adapter->rx_ring[i].tail = IXGBE_RDT(i);
1502         }
1503
1504         /* Intitial LRO Settings */
1505         adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE;
1506         adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS;
1507         adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr;
1508         adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID;
1509         if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1510                 adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI;
1511         adapter->rx_ring[i].lro_mgr.dev = adapter->netdev;
1512         adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1513         adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1514
1515         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1516                 /* Fill out redirection table */
1517                 for (i = 0, j = 0; i < 128; i++, j++) {
1518                         if (j == adapter->ring_feature[RING_F_RSS].indices)
1519                                 j = 0;
1520                         /* reta = 4-byte sliding window of
1521                          * 0x00..(indices-1)(indices-1)00..etc. */
1522                         reta = (reta << 8) | (j * 0x11);
1523                         if ((i & 3) == 3)
1524                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1525                 }
1526
1527                 /* Fill out hash function seeds */
1528                 /* XXX use a random constant here to glue certain flows */
1529                 get_random_bytes(&random[0], 40);
1530                 for (i = 0; i < 10; i++)
1531                         IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), random[i]);
1532
1533                 mrqc = IXGBE_MRQC_RSSEN
1534                     /* Perform hash on these packet types */
1535                     | IXGBE_MRQC_RSS_FIELD_IPV4
1536                     | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1537                     | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1538                     | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1539                     | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1540                     | IXGBE_MRQC_RSS_FIELD_IPV6
1541                     | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1542                     | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1543                     | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1544                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1545         }
1546
1547         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1548
1549         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1550             adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1551                 /* Disable indicating checksum in descriptor, enables
1552                  * RSS hash */
1553                 rxcsum |= IXGBE_RXCSUM_PCSD;
1554         }
1555         if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1556                 /* Enable IPv4 payload checksum for UDP fragments
1557                  * if PCSD is not set */
1558                 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1559         }
1560
1561         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1562 }
1563
1564 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1565                                    struct vlan_group *grp)
1566 {
1567         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1568         u32 ctrl;
1569
1570         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1571                 ixgbe_irq_disable(adapter);
1572         adapter->vlgrp = grp;
1573
1574         if (grp) {
1575                 /* enable VLAN tag insert/strip */
1576                 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1577                 ctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1578                 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1579                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1580         }
1581
1582         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1583                 ixgbe_irq_enable(adapter);
1584 }
1585
1586 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1587 {
1588         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1589
1590         /* add VID to filter table */
1591         ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1592 }
1593
1594 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1595 {
1596         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1597
1598         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1599                 ixgbe_irq_disable(adapter);
1600
1601         vlan_group_set_device(adapter->vlgrp, vid, NULL);
1602
1603         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1604                 ixgbe_irq_enable(adapter);
1605
1606         /* remove VID from filter table */
1607         ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1608 }
1609
1610 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1611 {
1612         ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1613
1614         if (adapter->vlgrp) {
1615                 u16 vid;
1616                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1617                         if (!vlan_group_get_device(adapter->vlgrp, vid))
1618                                 continue;
1619                         ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1620                 }
1621         }
1622 }
1623
1624 /**
1625  * ixgbe_set_multi - Multicast and Promiscuous mode set
1626  * @netdev: network interface device structure
1627  *
1628  * The set_multi entry point is called whenever the multicast address
1629  * list or the network interface flags are updated.  This routine is
1630  * responsible for configuring the hardware for proper multicast,
1631  * promiscuous mode, and all-multi behavior.
1632  **/
1633 static void ixgbe_set_multi(struct net_device *netdev)
1634 {
1635         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1636         struct ixgbe_hw *hw = &adapter->hw;
1637         struct dev_mc_list *mc_ptr;
1638         u8 *mta_list;
1639         u32 fctrl;
1640         int i;
1641
1642         /* Check for Promiscuous and All Multicast modes */
1643
1644         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1645
1646         if (netdev->flags & IFF_PROMISC) {
1647                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1648         } else if (netdev->flags & IFF_ALLMULTI) {
1649                 fctrl |= IXGBE_FCTRL_MPE;
1650                 fctrl &= ~IXGBE_FCTRL_UPE;
1651         } else {
1652                 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1653         }
1654
1655         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1656
1657         if (netdev->mc_count) {
1658                 mta_list = kcalloc(netdev->mc_count, ETH_ALEN, GFP_ATOMIC);
1659                 if (!mta_list)
1660                         return;
1661
1662                 /* Shared function expects packed array of only addresses. */
1663                 mc_ptr = netdev->mc_list;
1664
1665                 for (i = 0; i < netdev->mc_count; i++) {
1666                         if (!mc_ptr)
1667                                 break;
1668                         memcpy(mta_list + (i * ETH_ALEN), mc_ptr->dmi_addr,
1669                                ETH_ALEN);
1670                         mc_ptr = mc_ptr->next;
1671                 }
1672
1673                 ixgbe_update_mc_addr_list(hw, mta_list, i, 0);
1674                 kfree(mta_list);
1675         } else {
1676                 ixgbe_update_mc_addr_list(hw, NULL, 0, 0);
1677         }
1678
1679 }
1680
1681 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1682 {
1683         int q_idx;
1684         struct ixgbe_q_vector *q_vector;
1685         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1686
1687         /* legacy and MSI only use one vector */
1688         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1689                 q_vectors = 1;
1690
1691         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1692                 q_vector = &adapter->q_vector[q_idx];
1693                 if (!q_vector->rxr_count)
1694                         continue;
1695                 napi_enable(&q_vector->napi);
1696         }
1697 }
1698
1699 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1700 {
1701         int q_idx;
1702         struct ixgbe_q_vector *q_vector;
1703         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1704
1705         /* legacy and MSI only use one vector */
1706         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1707                 q_vectors = 1;
1708
1709         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1710                 q_vector = &adapter->q_vector[q_idx];
1711                 if (!q_vector->rxr_count)
1712                         continue;
1713                 napi_disable(&q_vector->napi);
1714         }
1715 }
1716
1717 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1718 {
1719         struct net_device *netdev = adapter->netdev;
1720         int i;
1721
1722         ixgbe_set_multi(netdev);
1723
1724         ixgbe_restore_vlan(adapter);
1725
1726         ixgbe_configure_tx(adapter);
1727         ixgbe_configure_rx(adapter);
1728         for (i = 0; i < adapter->num_rx_queues; i++)
1729                 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1730                                            (adapter->rx_ring[i].count - 1));
1731 }
1732
1733 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1734 {
1735         struct net_device *netdev = adapter->netdev;
1736         struct ixgbe_hw *hw = &adapter->hw;
1737         int i, j = 0;
1738         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1739         u32 txdctl, rxdctl, mhadd;
1740         u32 gpie;
1741
1742         ixgbe_get_hw_control(adapter);
1743
1744         if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
1745             (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
1746                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1747                         gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1748                                 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1749                 } else {
1750                         /* MSI only */
1751                         gpie = 0;
1752                 }
1753                 /* XXX: to interrupt immediately for EICS writes, enable this */
1754                 /* gpie |= IXGBE_GPIE_EIMEN; */
1755                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
1756         }
1757
1758         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1759                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1760                  * specifically only auto mask tx and rx interrupts */
1761                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
1762         }
1763
1764         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1765         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1766                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1767                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1768
1769                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1770         }
1771
1772         for (i = 0; i < adapter->num_tx_queues; i++) {
1773                 j = adapter->tx_ring[i].reg_idx;
1774                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1775                 txdctl |= IXGBE_TXDCTL_ENABLE;
1776                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1777         }
1778
1779         for (i = 0; i < adapter->num_rx_queues; i++) {
1780                 j = adapter->rx_ring[i].reg_idx;
1781                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
1782                 /* enable PTHRESH=32 descriptors (half the internal cache)
1783                  * and HTHRESH=0 descriptors (to minimize latency on fetch),
1784                  * this also removes a pesky rx_no_buffer_count increment */
1785                 rxdctl |= 0x0020;
1786                 rxdctl |= IXGBE_RXDCTL_ENABLE;
1787                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
1788         }
1789         /* enable all receives */
1790         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1791         rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1792         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1793
1794         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1795                 ixgbe_configure_msix(adapter);
1796         else
1797                 ixgbe_configure_msi_and_legacy(adapter);
1798
1799         clear_bit(__IXGBE_DOWN, &adapter->state);
1800         ixgbe_napi_enable_all(adapter);
1801
1802         /* clear any pending interrupts, may auto mask */
1803         IXGBE_READ_REG(hw, IXGBE_EICR);
1804
1805         ixgbe_irq_enable(adapter);
1806
1807         /* bring the link up in the watchdog, this could race with our first
1808          * link up interrupt but shouldn't be a problem */
1809         mod_timer(&adapter->watchdog_timer, jiffies);
1810         return 0;
1811 }
1812
1813 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
1814 {
1815         WARN_ON(in_interrupt());
1816         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1817                 msleep(1);
1818         ixgbe_down(adapter);
1819         ixgbe_up(adapter);
1820         clear_bit(__IXGBE_RESETTING, &adapter->state);
1821 }
1822
1823 int ixgbe_up(struct ixgbe_adapter *adapter)
1824 {
1825         /* hardware has been reset, we need to reload some things */
1826         ixgbe_configure(adapter);
1827
1828         return ixgbe_up_complete(adapter);
1829 }
1830
1831 void ixgbe_reset(struct ixgbe_adapter *adapter)
1832 {
1833         if (ixgbe_init_hw(&adapter->hw))
1834                 DPRINTK(PROBE, ERR, "Hardware Error\n");
1835
1836         /* reprogram the RAR[0] in case user changed it. */
1837         ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1838
1839 }
1840
1841 #ifdef CONFIG_PM
1842 static int ixgbe_resume(struct pci_dev *pdev)
1843 {
1844         struct net_device *netdev = pci_get_drvdata(pdev);
1845         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1846         u32 err;
1847
1848         pci_set_power_state(pdev, PCI_D0);
1849         pci_restore_state(pdev);
1850         err = pci_enable_device(pdev);
1851         if (err) {
1852                 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1853                                 "suspend\n");
1854                 return err;
1855         }
1856         pci_set_master(pdev);
1857
1858         pci_enable_wake(pdev, PCI_D3hot, 0);
1859         pci_enable_wake(pdev, PCI_D3cold, 0);
1860
1861         if (netif_running(netdev)) {
1862                 err = ixgbe_request_irq(adapter);
1863                 if (err)
1864                         return err;
1865         }
1866
1867         ixgbe_reset(adapter);
1868
1869         if (netif_running(netdev))
1870                 ixgbe_up(adapter);
1871
1872         netif_device_attach(netdev);
1873
1874         return 0;
1875 }
1876 #endif
1877
1878 /**
1879  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1880  * @adapter: board private structure
1881  * @rx_ring: ring to free buffers from
1882  **/
1883 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1884                                 struct ixgbe_ring *rx_ring)
1885 {
1886         struct pci_dev *pdev = adapter->pdev;
1887         unsigned long size;
1888         unsigned int i;
1889
1890         /* Free all the Rx ring sk_buffs */
1891
1892         for (i = 0; i < rx_ring->count; i++) {
1893                 struct ixgbe_rx_buffer *rx_buffer_info;
1894
1895                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1896                 if (rx_buffer_info->dma) {
1897                         pci_unmap_single(pdev, rx_buffer_info->dma,
1898                                          adapter->rx_buf_len,
1899                                          PCI_DMA_FROMDEVICE);
1900                         rx_buffer_info->dma = 0;
1901                 }
1902                 if (rx_buffer_info->skb) {
1903                         dev_kfree_skb(rx_buffer_info->skb);
1904                         rx_buffer_info->skb = NULL;
1905                 }
1906                 if (!rx_buffer_info->page)
1907                         continue;
1908                 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
1909                                PCI_DMA_FROMDEVICE);
1910                 rx_buffer_info->page_dma = 0;
1911
1912                 put_page(rx_buffer_info->page);
1913                 rx_buffer_info->page = NULL;
1914         }
1915
1916         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
1917         memset(rx_ring->rx_buffer_info, 0, size);
1918
1919         /* Zero out the descriptor ring */
1920         memset(rx_ring->desc, 0, rx_ring->size);
1921
1922         rx_ring->next_to_clean = 0;
1923         rx_ring->next_to_use = 0;
1924
1925         writel(0, adapter->hw.hw_addr + rx_ring->head);
1926         writel(0, adapter->hw.hw_addr + rx_ring->tail);
1927 }
1928
1929 /**
1930  * ixgbe_clean_tx_ring - Free Tx Buffers
1931  * @adapter: board private structure
1932  * @tx_ring: ring to be cleaned
1933  **/
1934 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
1935                                 struct ixgbe_ring *tx_ring)
1936 {
1937         struct ixgbe_tx_buffer *tx_buffer_info;
1938         unsigned long size;
1939         unsigned int i;
1940
1941         /* Free all the Tx ring sk_buffs */
1942
1943         for (i = 0; i < tx_ring->count; i++) {
1944                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1945                 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1946         }
1947
1948         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
1949         memset(tx_ring->tx_buffer_info, 0, size);
1950
1951         /* Zero out the descriptor ring */
1952         memset(tx_ring->desc, 0, tx_ring->size);
1953
1954         tx_ring->next_to_use = 0;
1955         tx_ring->next_to_clean = 0;
1956
1957         writel(0, adapter->hw.hw_addr + tx_ring->head);
1958         writel(0, adapter->hw.hw_addr + tx_ring->tail);
1959 }
1960
1961 /**
1962  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
1963  * @adapter: board private structure
1964  **/
1965 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
1966 {
1967         int i;
1968
1969         for (i = 0; i < adapter->num_rx_queues; i++)
1970                 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1971 }
1972
1973 /**
1974  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
1975  * @adapter: board private structure
1976  **/
1977 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
1978 {
1979         int i;
1980
1981         for (i = 0; i < adapter->num_tx_queues; i++)
1982                 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1983 }
1984
1985 void ixgbe_down(struct ixgbe_adapter *adapter)
1986 {
1987         struct net_device *netdev = adapter->netdev;
1988         u32 rxctrl;
1989
1990         /* signal that we are down to the interrupt handler */
1991         set_bit(__IXGBE_DOWN, &adapter->state);
1992
1993         /* disable receives */
1994         rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1995         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
1996                         rxctrl & ~IXGBE_RXCTRL_RXEN);
1997
1998         netif_tx_disable(netdev);
1999
2000         /* disable transmits in the hardware */
2001
2002         /* flush both disables */
2003         IXGBE_WRITE_FLUSH(&adapter->hw);
2004         msleep(10);
2005
2006         ixgbe_irq_disable(adapter);
2007
2008         ixgbe_napi_disable_all(adapter);
2009         del_timer_sync(&adapter->watchdog_timer);
2010
2011         netif_carrier_off(netdev);
2012         netif_stop_queue(netdev);
2013
2014         if (!pci_channel_offline(adapter->pdev))
2015                 ixgbe_reset(adapter);
2016         ixgbe_clean_all_tx_rings(adapter);
2017         ixgbe_clean_all_rx_rings(adapter);
2018
2019 }
2020
2021 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
2022 {
2023         struct net_device *netdev = pci_get_drvdata(pdev);
2024         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2025 #ifdef CONFIG_PM
2026         int retval = 0;
2027 #endif
2028
2029         netif_device_detach(netdev);
2030
2031         if (netif_running(netdev)) {
2032                 ixgbe_down(adapter);
2033                 ixgbe_free_irq(adapter);
2034         }
2035
2036 #ifdef CONFIG_PM
2037         retval = pci_save_state(pdev);
2038         if (retval)
2039                 return retval;
2040 #endif
2041
2042         pci_enable_wake(pdev, PCI_D3hot, 0);
2043         pci_enable_wake(pdev, PCI_D3cold, 0);
2044
2045         ixgbe_release_hw_control(adapter);
2046
2047         pci_disable_device(pdev);
2048
2049         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2050
2051         return 0;
2052 }
2053
2054 static void ixgbe_shutdown(struct pci_dev *pdev)
2055 {
2056         ixgbe_suspend(pdev, PMSG_SUSPEND);
2057 }
2058
2059 /**
2060  * ixgbe_poll - NAPI Rx polling callback
2061  * @napi: structure for representing this polling device
2062  * @budget: how many packets driver is allowed to clean
2063  *
2064  * This function is used for legacy and MSI, NAPI mode
2065  **/
2066 static int ixgbe_poll(struct napi_struct *napi, int budget)
2067 {
2068         struct ixgbe_q_vector *q_vector = container_of(napi,
2069                                           struct ixgbe_q_vector, napi);
2070         struct ixgbe_adapter *adapter = q_vector->adapter;
2071         int tx_cleaned = 0, work_done = 0;
2072
2073 #ifdef CONFIG_DCA
2074         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2075                 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2076                 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2077         }
2078 #endif
2079
2080         tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2081         ixgbe_clean_rx_irq(adapter, adapter->rx_ring, &work_done, budget);
2082
2083         if (tx_cleaned)
2084                 work_done = budget;
2085
2086         /* If budget not fully consumed, exit the polling mode */
2087         if (work_done < budget) {
2088                 netif_rx_complete(adapter->netdev, napi);
2089                 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS)
2090                         ixgbe_set_itr(adapter);
2091                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2092                         ixgbe_irq_enable(adapter);
2093         }
2094
2095         return work_done;
2096 }
2097
2098 /**
2099  * ixgbe_tx_timeout - Respond to a Tx Hang
2100  * @netdev: network interface device structure
2101  **/
2102 static void ixgbe_tx_timeout(struct net_device *netdev)
2103 {
2104         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2105
2106         /* Do the reset outside of interrupt context */
2107         schedule_work(&adapter->reset_task);
2108 }
2109
2110 static void ixgbe_reset_task(struct work_struct *work)
2111 {
2112         struct ixgbe_adapter *adapter;
2113         adapter = container_of(work, struct ixgbe_adapter, reset_task);
2114
2115         adapter->tx_timeout_count++;
2116
2117         ixgbe_reinit_locked(adapter);
2118 }
2119
2120 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2121                                        int vectors)
2122 {
2123         int err, vector_threshold;
2124
2125         /* We'll want at least 3 (vector_threshold):
2126          * 1) TxQ[0] Cleanup
2127          * 2) RxQ[0] Cleanup
2128          * 3) Other (Link Status Change, etc.)
2129          * 4) TCP Timer (optional)
2130          */
2131         vector_threshold = MIN_MSIX_COUNT;
2132
2133         /* The more we get, the more we will assign to Tx/Rx Cleanup
2134          * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2135          * Right now, we simply care about how many we'll get; we'll
2136          * set them up later while requesting irq's.
2137          */
2138         while (vectors >= vector_threshold) {
2139                 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2140                                       vectors);
2141                 if (!err) /* Success in acquiring all requested vectors. */
2142                         break;
2143                 else if (err < 0)
2144                         vectors = 0; /* Nasty failure, quit now */
2145                 else /* err == number of vectors we should try again with */
2146                         vectors = err;
2147         }
2148
2149         if (vectors < vector_threshold) {
2150                 /* Can't allocate enough MSI-X interrupts?  Oh well.
2151                  * This just means we'll go with either a single MSI
2152                  * vector or fall back to legacy interrupts.
2153                  */
2154                 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2155                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2156                 kfree(adapter->msix_entries);
2157                 adapter->msix_entries = NULL;
2158                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2159                 adapter->num_tx_queues = 1;
2160                 adapter->num_rx_queues = 1;
2161         } else {
2162                 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2163                 adapter->num_msix_vectors = vectors;
2164         }
2165 }
2166
2167 static void __devinit ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2168 {
2169         int nrq, ntq;
2170         int feature_mask = 0, rss_i, rss_m;
2171
2172         /* Number of supported queues */
2173         switch (adapter->hw.mac.type) {
2174         case ixgbe_mac_82598EB:
2175                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2176                 rss_m = 0;
2177                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2178
2179                 switch (adapter->flags & feature_mask) {
2180                 case (IXGBE_FLAG_RSS_ENABLED):
2181                         rss_m = 0xF;
2182                         nrq = rss_i;
2183                         ntq = rss_i;
2184                         break;
2185                 case 0:
2186                 default:
2187                         rss_i = 0;
2188                         rss_m = 0;
2189                         nrq = 1;
2190                         ntq = 1;
2191                         break;
2192                 }
2193
2194                 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2195                 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2196                 break;
2197         default:
2198                 nrq = 1;
2199                 ntq = 1;
2200                 break;
2201         }
2202
2203         adapter->num_rx_queues = nrq;
2204         adapter->num_tx_queues = ntq;
2205 }
2206
2207 /**
2208  * ixgbe_cache_ring_register - Descriptor ring to register mapping
2209  * @adapter: board private structure to initialize
2210  *
2211  * Once we know the feature-set enabled for the device, we'll cache
2212  * the register offset the descriptor ring is assigned to.
2213  **/
2214 static void __devinit ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2215 {
2216         /* TODO: Remove all uses of the indices in the cases where multiple
2217          *       features are OR'd together, if the feature set makes sense.
2218          */
2219         int feature_mask = 0, rss_i;
2220         int i, txr_idx, rxr_idx;
2221
2222         /* Number of supported queues */
2223         switch (adapter->hw.mac.type) {
2224         case ixgbe_mac_82598EB:
2225                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2226                 txr_idx = 0;
2227                 rxr_idx = 0;
2228                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2229                 switch (adapter->flags & feature_mask) {
2230                 case (IXGBE_FLAG_RSS_ENABLED):
2231                         for (i = 0; i < adapter->num_rx_queues; i++)
2232                                 adapter->rx_ring[i].reg_idx = i;
2233                         for (i = 0; i < adapter->num_tx_queues; i++)
2234                                 adapter->tx_ring[i].reg_idx = i;
2235                         break;
2236                 case 0:
2237                 default:
2238                         break;
2239                 }
2240                 break;
2241         default:
2242                 break;
2243         }
2244 }
2245
2246 /**
2247  * ixgbe_alloc_queues - Allocate memory for all rings
2248  * @adapter: board private structure to initialize
2249  *
2250  * We allocate one ring per queue at run-time since we don't know the
2251  * number of queues at compile-time.  The polling_netdev array is
2252  * intended for Multiqueue, but should work fine with a single queue.
2253  **/
2254 static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2255 {
2256         int i;
2257
2258         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2259                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2260         if (!adapter->tx_ring)
2261                 goto err_tx_ring_allocation;
2262
2263         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2264                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2265         if (!adapter->rx_ring)
2266                 goto err_rx_ring_allocation;
2267
2268         for (i = 0; i < adapter->num_tx_queues; i++) {
2269                 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
2270                 adapter->tx_ring[i].queue_index = i;
2271         }
2272         for (i = 0; i < adapter->num_rx_queues; i++) {
2273                 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
2274                 adapter->rx_ring[i].queue_index = i;
2275         }
2276
2277         ixgbe_cache_ring_register(adapter);
2278
2279         return 0;
2280
2281 err_rx_ring_allocation:
2282         kfree(adapter->tx_ring);
2283 err_tx_ring_allocation:
2284         return -ENOMEM;
2285 }
2286
2287 /**
2288  * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2289  * @adapter: board private structure to initialize
2290  *
2291  * Attempt to configure the interrupts using the best available
2292  * capabilities of the hardware and the kernel.
2293  **/
2294 static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter
2295                                                     *adapter)
2296 {
2297         int err = 0;
2298         int vector, v_budget;
2299
2300         /*
2301          * It's easy to be greedy for MSI-X vectors, but it really
2302          * doesn't do us much good if we have a lot more vectors
2303          * than CPU's.  So let's be conservative and only ask for
2304          * (roughly) twice the number of vectors as there are CPU's.
2305          */
2306         v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2307                        (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2308
2309         /*
2310          * At the same time, hardware can only support a maximum of
2311          * MAX_MSIX_COUNT vectors.  With features such as RSS and VMDq,
2312          * we can easily reach upwards of 64 Rx descriptor queues and
2313          * 32 Tx queues.  Thus, we cap it off in those rare cases where
2314          * the cpu count also exceeds our vector limit.
2315          */
2316         v_budget = min(v_budget, MAX_MSIX_COUNT);
2317
2318         /* A failure in MSI-X entry allocation isn't fatal, but it does
2319          * mean we disable MSI-X capabilities of the adapter. */
2320         adapter->msix_entries = kcalloc(v_budget,
2321                                         sizeof(struct msix_entry), GFP_KERNEL);
2322         if (!adapter->msix_entries) {
2323                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2324                 ixgbe_set_num_queues(adapter);
2325                 kfree(adapter->tx_ring);
2326                 kfree(adapter->rx_ring);
2327                 err = ixgbe_alloc_queues(adapter);
2328                 if (err) {
2329                         DPRINTK(PROBE, ERR, "Unable to allocate memory "
2330                                             "for queues\n");
2331                         goto out;
2332                 }
2333
2334                 goto try_msi;
2335         }
2336
2337         for (vector = 0; vector < v_budget; vector++)
2338                 adapter->msix_entries[vector].entry = vector;
2339
2340         ixgbe_acquire_msix_vectors(adapter, v_budget);
2341
2342         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2343                 goto out;
2344
2345 try_msi:
2346         err = pci_enable_msi(adapter->pdev);
2347         if (!err) {
2348                 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2349         } else {
2350                 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2351                                    "falling back to legacy.  Error: %d\n", err);
2352                 /* reset err */
2353                 err = 0;
2354         }
2355
2356 out:
2357         /* Notify the stack of the (possibly) reduced Tx Queue count. */
2358         adapter->netdev->egress_subqueue_count = adapter->num_tx_queues;
2359
2360         return err;
2361 }
2362
2363 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2364 {
2365         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2366                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2367                 pci_disable_msix(adapter->pdev);
2368                 kfree(adapter->msix_entries);
2369                 adapter->msix_entries = NULL;
2370         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2371                 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2372                 pci_disable_msi(adapter->pdev);
2373         }
2374         return;
2375 }
2376
2377 /**
2378  * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2379  * @adapter: board private structure to initialize
2380  *
2381  * We determine which interrupt scheme to use based on...
2382  * - Kernel support (MSI, MSI-X)
2383  *   - which can be user-defined (via MODULE_PARAM)
2384  * - Hardware queue count (num_*_queues)
2385  *   - defined by miscellaneous hardware support/features (RSS, etc.)
2386  **/
2387 static int __devinit ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2388 {
2389         int err;
2390
2391         /* Number of supported queues */
2392         ixgbe_set_num_queues(adapter);
2393
2394         err = ixgbe_alloc_queues(adapter);
2395         if (err) {
2396                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2397                 goto err_alloc_queues;
2398         }
2399
2400         err = ixgbe_set_interrupt_capability(adapter);
2401         if (err) {
2402                 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2403                 goto err_set_interrupt;
2404         }
2405
2406         DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2407                            "Tx Queue count = %u\n",
2408                 (adapter->num_rx_queues > 1) ? "Enabled" :
2409                 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2410
2411         set_bit(__IXGBE_DOWN, &adapter->state);
2412
2413         return 0;
2414
2415 err_set_interrupt:
2416         kfree(adapter->tx_ring);
2417         kfree(adapter->rx_ring);
2418 err_alloc_queues:
2419         return err;
2420 }
2421
2422 /**
2423  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2424  * @adapter: board private structure to initialize
2425  *
2426  * ixgbe_sw_init initializes the Adapter private data structure.
2427  * Fields are initialized based on PCI device information and
2428  * OS network device settings (MTU size).
2429  **/
2430 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2431 {
2432         struct ixgbe_hw *hw = &adapter->hw;
2433         struct pci_dev *pdev = adapter->pdev;
2434         unsigned int rss;
2435
2436         /* Set capability flags */
2437         rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2438         adapter->ring_feature[RING_F_RSS].indices = rss;
2439         adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2440
2441         /* Enable Dynamic interrupt throttling by default */
2442         adapter->rx_eitr = 1;
2443         adapter->tx_eitr = 1;
2444
2445         /* default flow control settings */
2446         hw->fc.original_type = ixgbe_fc_full;
2447         hw->fc.type = ixgbe_fc_full;
2448
2449         /* select 10G link by default */
2450         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2451         if (hw->mac.ops.reset(hw)) {
2452                 dev_err(&pdev->dev, "HW Init failed\n");
2453                 return -EIO;
2454         }
2455         if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
2456                                          false)) {
2457                 dev_err(&pdev->dev, "Link Speed setup failed\n");
2458                 return -EIO;
2459         }
2460
2461         /* initialize eeprom parameters */
2462         if (ixgbe_init_eeprom(hw)) {
2463                 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2464                 return -EIO;
2465         }
2466
2467         /* enable rx csum by default */
2468         adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2469
2470         set_bit(__IXGBE_DOWN, &adapter->state);
2471
2472         return 0;
2473 }
2474
2475 /**
2476  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2477  * @adapter: board private structure
2478  * @txdr:    tx descriptor ring (for a specific queue) to setup
2479  *
2480  * Return 0 on success, negative on failure
2481  **/
2482 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2483                              struct ixgbe_ring *txdr)
2484 {
2485         struct pci_dev *pdev = adapter->pdev;
2486         int size;
2487
2488         size = sizeof(struct ixgbe_tx_buffer) * txdr->count;
2489         txdr->tx_buffer_info = vmalloc(size);
2490         if (!txdr->tx_buffer_info) {
2491                 DPRINTK(PROBE, ERR,
2492                 "Unable to allocate memory for the transmit descriptor ring\n");
2493                 return -ENOMEM;
2494         }
2495         memset(txdr->tx_buffer_info, 0, size);
2496
2497         /* round up to nearest 4K */
2498         txdr->size = txdr->count * sizeof(union ixgbe_adv_tx_desc);
2499         txdr->size = ALIGN(txdr->size, 4096);
2500
2501         txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2502         if (!txdr->desc) {
2503                 vfree(txdr->tx_buffer_info);
2504                 DPRINTK(PROBE, ERR,
2505                         "Memory allocation failed for the tx desc ring\n");
2506                 return -ENOMEM;
2507         }
2508
2509         txdr->next_to_use = 0;
2510         txdr->next_to_clean = 0;
2511         txdr->work_limit = txdr->count;
2512
2513         return 0;
2514 }
2515
2516 /**
2517  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2518  * @adapter: board private structure
2519  * @rxdr:    rx descriptor ring (for a specific queue) to setup
2520  *
2521  * Returns 0 on success, negative on failure
2522  **/
2523 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2524                              struct ixgbe_ring *rxdr)
2525 {
2526         struct pci_dev *pdev = adapter->pdev;
2527         int size;
2528
2529         size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS;
2530         rxdr->lro_mgr.lro_arr = vmalloc(size);
2531         if (!rxdr->lro_mgr.lro_arr)
2532                 return -ENOMEM;
2533         memset(rxdr->lro_mgr.lro_arr, 0, size);
2534
2535         size = sizeof(struct ixgbe_rx_buffer) * rxdr->count;
2536         rxdr->rx_buffer_info = vmalloc(size);
2537         if (!rxdr->rx_buffer_info) {
2538                 DPRINTK(PROBE, ERR,
2539                         "vmalloc allocation failed for the rx desc ring\n");
2540                 goto alloc_failed;
2541         }
2542         memset(rxdr->rx_buffer_info, 0, size);
2543
2544         /* Round up to nearest 4K */
2545         rxdr->size = rxdr->count * sizeof(union ixgbe_adv_rx_desc);
2546         rxdr->size = ALIGN(rxdr->size, 4096);
2547
2548         rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2549
2550         if (!rxdr->desc) {
2551                 DPRINTK(PROBE, ERR,
2552                         "Memory allocation failed for the rx desc ring\n");
2553                 vfree(rxdr->rx_buffer_info);
2554                 goto alloc_failed;
2555         }
2556
2557         rxdr->next_to_clean = 0;
2558         rxdr->next_to_use = 0;
2559
2560         return 0;
2561
2562 alloc_failed:
2563         vfree(rxdr->lro_mgr.lro_arr);
2564         rxdr->lro_mgr.lro_arr = NULL;
2565         return -ENOMEM;
2566 }
2567
2568 /**
2569  * ixgbe_free_tx_resources - Free Tx Resources per Queue
2570  * @adapter: board private structure
2571  * @tx_ring: Tx descriptor ring for a specific queue
2572  *
2573  * Free all transmit software resources
2574  **/
2575 static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2576                                     struct ixgbe_ring *tx_ring)
2577 {
2578         struct pci_dev *pdev = adapter->pdev;
2579
2580         ixgbe_clean_tx_ring(adapter, tx_ring);
2581
2582         vfree(tx_ring->tx_buffer_info);
2583         tx_ring->tx_buffer_info = NULL;
2584
2585         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2586
2587         tx_ring->desc = NULL;
2588 }
2589
2590 /**
2591  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2592  * @adapter: board private structure
2593  *
2594  * Free all transmit software resources
2595  **/
2596 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
2597 {
2598         int i;
2599
2600         for (i = 0; i < adapter->num_tx_queues; i++)
2601                 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
2602 }
2603
2604 /**
2605  * ixgbe_free_rx_resources - Free Rx Resources
2606  * @adapter: board private structure
2607  * @rx_ring: ring to clean the resources from
2608  *
2609  * Free all receive software resources
2610  **/
2611 static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
2612                                     struct ixgbe_ring *rx_ring)
2613 {
2614         struct pci_dev *pdev = adapter->pdev;
2615
2616         vfree(rx_ring->lro_mgr.lro_arr);
2617         rx_ring->lro_mgr.lro_arr = NULL;
2618
2619         ixgbe_clean_rx_ring(adapter, rx_ring);
2620
2621         vfree(rx_ring->rx_buffer_info);
2622         rx_ring->rx_buffer_info = NULL;
2623
2624         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2625
2626         rx_ring->desc = NULL;
2627 }
2628
2629 /**
2630  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
2631  * @adapter: board private structure
2632  *
2633  * Free all receive software resources
2634  **/
2635 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
2636 {
2637         int i;
2638
2639         for (i = 0; i < adapter->num_rx_queues; i++)
2640                 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
2641 }
2642
2643 /**
2644  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2645  * @adapter: board private structure
2646  *
2647  * If this function returns with an error, then it's possible one or
2648  * more of the rings is populated (while the rest are not).  It is the
2649  * callers duty to clean those orphaned rings.
2650  *
2651  * Return 0 on success, negative on failure
2652  **/
2653 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2654 {
2655         int i, err = 0;
2656
2657         for (i = 0; i < adapter->num_tx_queues; i++) {
2658                 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2659                 if (err) {
2660                         DPRINTK(PROBE, ERR,
2661                                 "Allocation for Tx Queue %u failed\n", i);
2662                         break;
2663                 }
2664         }
2665
2666         return err;
2667 }
2668
2669 /**
2670  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2671  * @adapter: board private structure
2672  *
2673  * If this function returns with an error, then it's possible one or
2674  * more of the rings is populated (while the rest are not).  It is the
2675  * callers duty to clean those orphaned rings.
2676  *
2677  * Return 0 on success, negative on failure
2678  **/
2679
2680 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2681 {
2682         int i, err = 0;
2683
2684         for (i = 0; i < adapter->num_rx_queues; i++) {
2685                 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2686                 if (err) {
2687                         DPRINTK(PROBE, ERR,
2688                                 "Allocation for Rx Queue %u failed\n", i);
2689                         break;
2690                 }
2691         }
2692
2693         return err;
2694 }
2695
2696 /**
2697  * ixgbe_change_mtu - Change the Maximum Transfer Unit
2698  * @netdev: network interface device structure
2699  * @new_mtu: new value for maximum frame size
2700  *
2701  * Returns 0 on success, negative on failure
2702  **/
2703 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
2704 {
2705         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2706         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2707
2708         if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) ||
2709             (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
2710                 return -EINVAL;
2711
2712         DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
2713                 netdev->mtu, new_mtu);
2714         /* must set new MTU before calling down or up */
2715         netdev->mtu = new_mtu;
2716
2717         if (netif_running(netdev))
2718                 ixgbe_reinit_locked(adapter);
2719
2720         return 0;
2721 }
2722
2723 /**
2724  * ixgbe_open - Called when a network interface is made active
2725  * @netdev: network interface device structure
2726  *
2727  * Returns 0 on success, negative value on failure
2728  *
2729  * The open entry point is called when a network interface is made
2730  * active by the system (IFF_UP).  At this point all resources needed
2731  * for transmit and receive operations are allocated, the interrupt
2732  * handler is registered with the OS, the watchdog timer is started,
2733  * and the stack is notified that the interface is ready.
2734  **/
2735 static int ixgbe_open(struct net_device *netdev)
2736 {
2737         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2738         int err;
2739
2740         /* disallow open during test */
2741         if (test_bit(__IXGBE_TESTING, &adapter->state))
2742                 return -EBUSY;
2743
2744         /* allocate transmit descriptors */
2745         err = ixgbe_setup_all_tx_resources(adapter);
2746         if (err)
2747                 goto err_setup_tx;
2748
2749         /* allocate receive descriptors */
2750         err = ixgbe_setup_all_rx_resources(adapter);
2751         if (err)
2752                 goto err_setup_rx;
2753
2754         ixgbe_configure(adapter);
2755
2756         err = ixgbe_request_irq(adapter);
2757         if (err)
2758                 goto err_req_irq;
2759
2760         err = ixgbe_up_complete(adapter);
2761         if (err)
2762                 goto err_up;
2763
2764         return 0;
2765
2766 err_up:
2767         ixgbe_release_hw_control(adapter);
2768         ixgbe_free_irq(adapter);
2769 err_req_irq:
2770         ixgbe_free_all_rx_resources(adapter);
2771 err_setup_rx:
2772         ixgbe_free_all_tx_resources(adapter);
2773 err_setup_tx:
2774         ixgbe_reset(adapter);
2775
2776         return err;
2777 }
2778
2779 /**
2780  * ixgbe_close - Disables a network interface
2781  * @netdev: network interface device structure
2782  *
2783  * Returns 0, this is not allowed to fail
2784  *
2785  * The close entry point is called when an interface is de-activated
2786  * by the OS.  The hardware is still under the drivers control, but
2787  * needs to be disabled.  A global MAC reset is issued to stop the
2788  * hardware, and all transmit and receive resources are freed.
2789  **/
2790 static int ixgbe_close(struct net_device *netdev)
2791 {
2792         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2793
2794         ixgbe_down(adapter);
2795         ixgbe_free_irq(adapter);
2796
2797         ixgbe_free_all_tx_resources(adapter);
2798         ixgbe_free_all_rx_resources(adapter);
2799
2800         ixgbe_release_hw_control(adapter);
2801
2802         return 0;
2803 }
2804
2805 /**
2806  * ixgbe_update_stats - Update the board statistics counters.
2807  * @adapter: board private structure
2808  **/
2809 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
2810 {
2811         struct ixgbe_hw *hw = &adapter->hw;
2812         u64 total_mpc = 0;
2813         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
2814
2815         adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
2816         for (i = 0; i < 8; i++) {
2817                 /* for packet buffers not used, the register should read 0 */
2818                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
2819                 missed_rx += mpc;
2820                 adapter->stats.mpc[i] += mpc;
2821                 total_mpc += adapter->stats.mpc[i];
2822                 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
2823         }
2824         adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
2825         /* work around hardware counting issue */
2826         adapter->stats.gprc -= missed_rx;
2827
2828         /* 82598 hardware only has a 32 bit counter in the high register */
2829         adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
2830         adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
2831         adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2832         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
2833         adapter->stats.bprc += bprc;
2834         adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
2835         adapter->stats.mprc -= bprc;
2836         adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
2837         adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
2838         adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
2839         adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
2840         adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
2841         adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
2842         adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
2843         adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
2844         adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
2845         adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
2846         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
2847         adapter->stats.lxontxc += lxon;
2848         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
2849         adapter->stats.lxofftxc += lxoff;
2850         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2851         adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
2852         adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2853         /*
2854          * 82598 errata - tx of flow control packets is included in tx counters
2855          */
2856         xon_off_tot = lxon + lxoff;
2857         adapter->stats.gptc -= xon_off_tot;
2858         adapter->stats.mptc -= xon_off_tot;
2859         adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
2860         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2861         adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2862         adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2863         adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2864         adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2865         adapter->stats.ptc64 -= xon_off_tot;
2866         adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2867         adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2868         adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2869         adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2870         adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2871         adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2872
2873         /* Fill out the OS statistics structure */
2874         adapter->net_stats.multicast = adapter->stats.mprc;
2875
2876         /* Rx Errors */
2877         adapter->net_stats.rx_errors = adapter->stats.crcerrs +
2878                                                 adapter->stats.rlec;
2879         adapter->net_stats.rx_dropped = 0;
2880         adapter->net_stats.rx_length_errors = adapter->stats.rlec;
2881         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2882         adapter->net_stats.rx_missed_errors = total_mpc;
2883 }
2884
2885 /**
2886  * ixgbe_watchdog - Timer Call-back
2887  * @data: pointer to adapter cast into an unsigned long
2888  **/
2889 static void ixgbe_watchdog(unsigned long data)
2890 {
2891         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2892         struct net_device *netdev = adapter->netdev;
2893         bool link_up;
2894         u32 link_speed = 0;
2895         int i;
2896
2897         adapter->hw.mac.ops.check_link(&adapter->hw, &(link_speed), &link_up);
2898
2899         if (link_up) {
2900                 if (!netif_carrier_ok(netdev)) {
2901                         u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2902                         u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS);
2903 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
2904 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
2905                         DPRINTK(LINK, INFO, "NIC Link is Up %s, "
2906                                 "Flow Control: %s\n",
2907                                 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
2908                                  "10 Gbps" :
2909                                  (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
2910                                   "1 Gbps" : "unknown speed")),
2911                                 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
2912                                  (FLOW_RX ? "RX" :
2913                                  (FLOW_TX ? "TX" : "None"))));
2914
2915                         netif_carrier_on(netdev);
2916                         netif_wake_queue(netdev);
2917                         for (i = 0; i < adapter->num_tx_queues; i++)
2918                                 netif_wake_subqueue(netdev, i);
2919                 } else {
2920                         /* Force detection of hung controller */
2921                         adapter->detect_tx_hung = true;
2922                 }
2923         } else {
2924                 if (netif_carrier_ok(netdev)) {
2925                         DPRINTK(LINK, INFO, "NIC Link is Down\n");
2926                         netif_carrier_off(netdev);
2927                         netif_stop_queue(netdev);
2928                 }
2929         }
2930
2931         ixgbe_update_stats(adapter);
2932
2933         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2934                 /* Cause software interrupt to ensure rx rings are cleaned */
2935                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2936                         u32 eics =
2937                          (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
2938                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, eics);
2939                 } else {
2940                         /* for legacy and MSI interrupts don't set any bits that
2941                          * are enabled for EIAM, because this operation would
2942                          * set *both* EIMS and EICS for any bit in EIAM */
2943                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
2944                                      (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
2945                 }
2946                 /* Reset the timer */
2947                 mod_timer(&adapter->watchdog_timer,
2948                           round_jiffies(jiffies + 2 * HZ));
2949         }
2950 }
2951
2952 static int ixgbe_tso(struct ixgbe_adapter *adapter,
2953                          struct ixgbe_ring *tx_ring, struct sk_buff *skb,
2954                          u32 tx_flags, u8 *hdr_len)
2955 {
2956         struct ixgbe_adv_tx_context_desc *context_desc;
2957         unsigned int i;
2958         int err;
2959         struct ixgbe_tx_buffer *tx_buffer_info;
2960         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2961         u32 mss_l4len_idx = 0, l4len;
2962
2963         if (skb_is_gso(skb)) {
2964                 if (skb_header_cloned(skb)) {
2965                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2966                         if (err)
2967                                 return err;
2968                 }
2969                 l4len = tcp_hdrlen(skb);
2970                 *hdr_len += l4len;
2971
2972                 if (skb->protocol == htons(ETH_P_IP)) {
2973                         struct iphdr *iph = ip_hdr(skb);
2974                         iph->tot_len = 0;
2975                         iph->check = 0;
2976                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2977                                                                  iph->daddr, 0,
2978                                                                  IPPROTO_TCP,
2979                                                                  0);
2980                         adapter->hw_tso_ctxt++;
2981                 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2982                         ipv6_hdr(skb)->payload_len = 0;
2983                         tcp_hdr(skb)->check =
2984                             ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2985                                              &ipv6_hdr(skb)->daddr,
2986                                              0, IPPROTO_TCP, 0);
2987                         adapter->hw_tso6_ctxt++;
2988                 }
2989
2990                 i = tx_ring->next_to_use;
2991
2992                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2993                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2994
2995                 /* VLAN MACLEN IPLEN */
2996                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2997                         vlan_macip_lens |=
2998                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2999                 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3000                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3001                 *hdr_len += skb_network_offset(skb);
3002                 vlan_macip_lens |=
3003                     (skb_transport_header(skb) - skb_network_header(skb));
3004                 *hdr_len +=
3005                     (skb_transport_header(skb) - skb_network_header(skb));
3006                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3007                 context_desc->seqnum_seed = 0;
3008
3009                 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3010                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3011                                     IXGBE_ADVTXD_DTYP_CTXT);
3012
3013                 if (skb->protocol == htons(ETH_P_IP))
3014                         type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3015                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3016                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3017
3018                 /* MSS L4LEN IDX */
3019                 mss_l4len_idx |=
3020                     (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3021                 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3022                 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3023
3024                 tx_buffer_info->time_stamp = jiffies;
3025                 tx_buffer_info->next_to_watch = i;
3026
3027                 i++;
3028                 if (i == tx_ring->count)
3029                         i = 0;
3030                 tx_ring->next_to_use = i;
3031
3032                 return true;
3033         }
3034         return false;
3035 }
3036
3037 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3038                                    struct ixgbe_ring *tx_ring,
3039                                    struct sk_buff *skb, u32 tx_flags)
3040 {
3041         struct ixgbe_adv_tx_context_desc *context_desc;
3042         unsigned int i;
3043         struct ixgbe_tx_buffer *tx_buffer_info;
3044         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3045
3046         if (skb->ip_summed == CHECKSUM_PARTIAL ||
3047             (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3048                 i = tx_ring->next_to_use;
3049                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3050                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3051
3052                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3053                         vlan_macip_lens |=
3054                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3055                 vlan_macip_lens |= (skb_network_offset(skb) <<
3056                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3057                 if (skb->ip_summed == CHECKSUM_PARTIAL)
3058                         vlan_macip_lens |= (skb_transport_header(skb) -
3059                                             skb_network_header(skb));
3060
3061                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3062                 context_desc->seqnum_seed = 0;
3063
3064                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3065                                     IXGBE_ADVTXD_DTYP_CTXT);
3066
3067                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3068                         switch (skb->protocol) {
3069                         case __constant_htons(ETH_P_IP):
3070                                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3071                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3072                                         type_tucmd_mlhl |=
3073                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3074                                 break;
3075
3076                         case __constant_htons(ETH_P_IPV6):
3077                                 /* XXX what about other V6 headers?? */
3078                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3079                                         type_tucmd_mlhl |=
3080                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3081                                 break;
3082
3083                         default:
3084                                 if (unlikely(net_ratelimit())) {
3085                                         DPRINTK(PROBE, WARNING,
3086                                          "partial checksum but proto=%x!\n",
3087                                          skb->protocol);
3088                                 }
3089                                 break;
3090                         }
3091                 }
3092
3093                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3094                 context_desc->mss_l4len_idx = 0;
3095
3096                 tx_buffer_info->time_stamp = jiffies;
3097                 tx_buffer_info->next_to_watch = i;
3098                 adapter->hw_csum_tx_good++;
3099                 i++;
3100                 if (i == tx_ring->count)
3101                         i = 0;
3102                 tx_ring->next_to_use = i;
3103
3104                 return true;
3105         }
3106         return false;
3107 }
3108
3109 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3110                         struct ixgbe_ring *tx_ring,
3111                         struct sk_buff *skb, unsigned int first)
3112 {
3113         struct ixgbe_tx_buffer *tx_buffer_info;
3114         unsigned int len = skb->len;
3115         unsigned int offset = 0, size, count = 0, i;
3116         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3117         unsigned int f;
3118
3119         len -= skb->data_len;
3120
3121         i = tx_ring->next_to_use;
3122
3123         while (len) {
3124                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3125                 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3126
3127                 tx_buffer_info->length = size;
3128                 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3129                                                   skb->data + offset,
3130                                                   size, PCI_DMA_TODEVICE);
3131                 tx_buffer_info->time_stamp = jiffies;
3132                 tx_buffer_info->next_to_watch = i;
3133
3134                 len -= size;
3135                 offset += size;
3136                 count++;
3137                 i++;
3138                 if (i == tx_ring->count)
3139                         i = 0;
3140         }
3141
3142         for (f = 0; f < nr_frags; f++) {
3143                 struct skb_frag_struct *frag;
3144
3145                 frag = &skb_shinfo(skb)->frags[f];
3146                 len = frag->size;
3147                 offset = frag->page_offset;
3148
3149                 while (len) {
3150                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
3151                         size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3152
3153                         tx_buffer_info->length = size;
3154                         tx_buffer_info->dma = pci_map_page(adapter->pdev,
3155                                                         frag->page,
3156                                                         offset,
3157                                                         size, PCI_DMA_TODEVICE);
3158                         tx_buffer_info->time_stamp = jiffies;
3159                         tx_buffer_info->next_to_watch = i;
3160
3161                         len -= size;
3162                         offset += size;
3163                         count++;
3164                         i++;
3165                         if (i == tx_ring->count)
3166                                 i = 0;
3167                 }
3168         }
3169         if (i == 0)
3170                 i = tx_ring->count - 1;
3171         else
3172                 i = i - 1;
3173         tx_ring->tx_buffer_info[i].skb = skb;
3174         tx_ring->tx_buffer_info[first].next_to_watch = i;
3175
3176         return count;
3177 }
3178
3179 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3180                                struct ixgbe_ring *tx_ring,
3181                                int tx_flags, int count, u32 paylen, u8 hdr_len)
3182 {
3183         union ixgbe_adv_tx_desc *tx_desc = NULL;
3184         struct ixgbe_tx_buffer *tx_buffer_info;
3185         u32 olinfo_status = 0, cmd_type_len = 0;
3186         unsigned int i;
3187         u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3188
3189         cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3190
3191         cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3192
3193         if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3194                 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3195
3196         if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3197                 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3198
3199                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3200                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3201
3202                 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3203                         olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3204                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3205
3206         } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3207                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3208                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3209
3210         olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3211
3212         i = tx_ring->next_to_use;
3213         while (count--) {
3214                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3215                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3216                 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3217                 tx_desc->read.cmd_type_len =
3218                         cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3219                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3220
3221                 i++;
3222                 if (i == tx_ring->count)
3223                         i = 0;
3224         }
3225
3226         tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3227
3228         /*
3229          * Force memory writes to complete before letting h/w
3230          * know there are new descriptors to fetch.  (Only
3231          * applicable for weak-ordered memory model archs,
3232          * such as IA-64).
3233          */
3234         wmb();
3235
3236         tx_ring->next_to_use = i;
3237         writel(i, adapter->hw.hw_addr + tx_ring->tail);
3238 }
3239
3240 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3241                                  struct ixgbe_ring *tx_ring, int size)
3242 {
3243         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3244
3245         netif_stop_subqueue(netdev, tx_ring->queue_index);
3246         /* Herbert's original patch had:
3247          *  smp_mb__after_netif_stop_queue();
3248          * but since that doesn't exist yet, just open code it. */
3249         smp_mb();
3250
3251         /* We need to check again in a case another CPU has just
3252          * made room available. */
3253         if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3254                 return -EBUSY;
3255
3256         /* A reprieve! - use start_queue because it doesn't call schedule */
3257         netif_wake_subqueue(netdev, tx_ring->queue_index);
3258         ++adapter->restart_queue;
3259         return 0;
3260 }
3261
3262 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3263                                struct ixgbe_ring *tx_ring, int size)
3264 {
3265         if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3266                 return 0;
3267         return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3268 }
3269
3270
3271 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3272 {
3273         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3274         struct ixgbe_ring *tx_ring;
3275         unsigned int len = skb->len;
3276         unsigned int first;
3277         unsigned int tx_flags = 0;
3278         u8 hdr_len = 0;
3279         int r_idx = 0, tso;
3280         unsigned int mss = 0;
3281         int count = 0;
3282         unsigned int f;
3283         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3284         len -= skb->data_len;
3285         r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3286         tx_ring = &adapter->tx_ring[r_idx];
3287
3288
3289         if (skb->len <= 0) {
3290                 dev_kfree_skb(skb);
3291                 return NETDEV_TX_OK;
3292         }
3293         mss = skb_shinfo(skb)->gso_size;
3294
3295         if (mss)
3296                 count++;
3297         else if (skb->ip_summed == CHECKSUM_PARTIAL)
3298                 count++;
3299
3300         count += TXD_USE_COUNT(len);
3301         for (f = 0; f < nr_frags; f++)
3302                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3303
3304         if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3305                 adapter->tx_busy++;
3306                 return NETDEV_TX_BUSY;
3307         }
3308         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3309                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3310                 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
3311         }
3312
3313         if (skb->protocol == htons(ETH_P_IP))
3314                 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3315         first = tx_ring->next_to_use;
3316         tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3317         if (tso < 0) {
3318                 dev_kfree_skb_any(skb);
3319                 return NETDEV_TX_OK;
3320         }
3321
3322         if (tso)
3323                 tx_flags |= IXGBE_TX_FLAGS_TSO;
3324         else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3325                  (skb->ip_summed == CHECKSUM_PARTIAL))
3326                 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3327
3328         ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3329                            ixgbe_tx_map(adapter, tx_ring, skb, first),
3330                            skb->len, hdr_len);
3331
3332         netdev->trans_start = jiffies;
3333
3334         ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3335
3336         return NETDEV_TX_OK;
3337 }
3338
3339 /**
3340  * ixgbe_get_stats - Get System Network Statistics
3341  * @netdev: network interface device structure
3342  *
3343  * Returns the address of the device statistics structure.
3344  * The statistics are actually updated from the timer callback.
3345  **/
3346 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3347 {
3348         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3349
3350         /* only return the current stats */
3351         return &adapter->net_stats;
3352 }
3353
3354 /**
3355  * ixgbe_set_mac - Change the Ethernet Address of the NIC
3356  * @netdev: network interface device structure
3357  * @p: pointer to an address structure
3358  *
3359  * Returns 0 on success, negative on failure
3360  **/
3361 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3362 {
3363         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3364         struct sockaddr *addr = p;
3365
3366         if (!is_valid_ether_addr(addr->sa_data))
3367                 return -EADDRNOTAVAIL;
3368
3369         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3370         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3371
3372         ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
3373
3374         return 0;
3375 }
3376
3377 #ifdef CONFIG_NET_POLL_CONTROLLER
3378 /*
3379  * Polling 'interrupt' - used by things like netconsole to send skbs
3380  * without having to re-enable interrupts. It's not called while
3381  * the interrupt routine is executing.
3382  */
3383 static void ixgbe_netpoll(struct net_device *netdev)
3384 {
3385         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3386
3387         disable_irq(adapter->pdev->irq);
3388         adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3389         ixgbe_intr(adapter->pdev->irq, netdev);
3390         adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3391         enable_irq(adapter->pdev->irq);
3392 }
3393 #endif
3394
3395 /**
3396  * ixgbe_napi_add_all - prep napi structs for use
3397  * @adapter: private struct
3398  * helper function to napi_add each possible q_vector->napi
3399  */
3400 static void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3401 {
3402         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3403         int (*poll)(struct napi_struct *, int);
3404
3405         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3406                 poll = &ixgbe_clean_rxonly;
3407         } else {
3408                 poll = &ixgbe_poll;
3409                 /* only one q_vector for legacy modes */
3410                 q_vectors = 1;
3411         }
3412
3413         for (i = 0; i < q_vectors; i++) {
3414                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
3415                 netif_napi_add(adapter->netdev, &q_vector->napi,
3416                                (*poll), 64);
3417         }
3418 }
3419
3420 /**
3421  * ixgbe_probe - Device Initialization Routine
3422  * @pdev: PCI device information struct
3423  * @ent: entry in ixgbe_pci_tbl
3424  *
3425  * Returns 0 on success, negative on failure
3426  *
3427  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3428  * The OS initialization, configuring of the adapter private structure,
3429  * and a hardware reset occur.
3430  **/
3431 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3432                                  const struct pci_device_id *ent)
3433 {
3434         struct net_device *netdev;
3435         struct ixgbe_adapter *adapter = NULL;
3436         struct ixgbe_hw *hw;
3437         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3438         unsigned long mmio_start, mmio_len;
3439         static int cards_found;
3440         int i, err, pci_using_dac;
3441         u16 link_status, link_speed, link_width;
3442         u32 part_num;
3443
3444         err = pci_enable_device(pdev);
3445         if (err)
3446                 return err;
3447
3448         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
3449             !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
3450                 pci_using_dac = 1;
3451         } else {
3452                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3453                 if (err) {
3454                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
3455                         if (err) {
3456                                 dev_err(&pdev->dev, "No usable DMA "
3457                                         "configuration, aborting\n");
3458                                 goto err_dma;
3459                         }
3460                 }
3461                 pci_using_dac = 0;
3462         }
3463
3464         err = pci_request_regions(pdev, ixgbe_driver_name);
3465         if (err) {
3466                 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3467                 goto err_pci_reg;
3468         }
3469
3470         pci_set_master(pdev);
3471         pci_save_state(pdev);
3472
3473         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
3474         if (!netdev) {
3475                 err = -ENOMEM;
3476                 goto err_alloc_etherdev;
3477         }
3478
3479         SET_NETDEV_DEV(netdev, &pdev->dev);
3480
3481         pci_set_drvdata(pdev, netdev);
3482         adapter = netdev_priv(netdev);
3483
3484         adapter->netdev = netdev;
3485         adapter->pdev = pdev;
3486         hw = &adapter->hw;
3487         hw->back = adapter;
3488         adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3489
3490         mmio_start = pci_resource_start(pdev, 0);
3491         mmio_len = pci_resource_len(pdev, 0);
3492
3493         hw->hw_addr = ioremap(mmio_start, mmio_len);
3494         if (!hw->hw_addr) {
3495                 err = -EIO;
3496                 goto err_ioremap;
3497         }
3498
3499         for (i = 1; i <= 5; i++) {
3500                 if (pci_resource_len(pdev, i) == 0)
3501                         continue;
3502         }
3503
3504         netdev->open = &ixgbe_open;
3505         netdev->stop = &ixgbe_close;
3506         netdev->hard_start_xmit = &ixgbe_xmit_frame;
3507         netdev->get_stats = &ixgbe_get_stats;
3508         netdev->set_multicast_list = &ixgbe_set_multi;
3509         netdev->set_mac_address = &ixgbe_set_mac;
3510         netdev->change_mtu = &ixgbe_change_mtu;
3511         ixgbe_set_ethtool_ops(netdev);
3512         netdev->tx_timeout = &ixgbe_tx_timeout;
3513         netdev->watchdog_timeo = 5 * HZ;
3514         netdev->vlan_rx_register = ixgbe_vlan_rx_register;
3515         netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
3516         netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
3517 #ifdef CONFIG_NET_POLL_CONTROLLER
3518         netdev->poll_controller = ixgbe_netpoll;
3519 #endif
3520         strcpy(netdev->name, pci_name(pdev));
3521
3522         netdev->mem_start = mmio_start;
3523         netdev->mem_end = mmio_start + mmio_len;
3524
3525         adapter->bd_number = cards_found;
3526
3527         /* PCI config space info */
3528         hw->vendor_id = pdev->vendor;
3529         hw->device_id = pdev->device;
3530         hw->revision_id = pdev->revision;
3531         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3532         hw->subsystem_device_id = pdev->subsystem_device;
3533
3534         /* Setup hw api */
3535         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3536         hw->mac.type  = ii->mac;
3537
3538         err = ii->get_invariants(hw);
3539         if (err)
3540                 goto err_hw_init;
3541
3542         /* setup the private structure */
3543         err = ixgbe_sw_init(adapter);
3544         if (err)
3545                 goto err_sw_init;
3546
3547         netdev->features = NETIF_F_SG |
3548                            NETIF_F_HW_CSUM |
3549                            NETIF_F_HW_VLAN_TX |
3550                            NETIF_F_HW_VLAN_RX |
3551                            NETIF_F_HW_VLAN_FILTER;
3552
3553         netdev->features |= NETIF_F_LRO;
3554         netdev->features |= NETIF_F_TSO;
3555         netdev->features |= NETIF_F_TSO6;
3556
3557         netdev->vlan_features |= NETIF_F_TSO;
3558         netdev->vlan_features |= NETIF_F_TSO6;
3559         netdev->vlan_features |= NETIF_F_HW_CSUM;
3560         netdev->vlan_features |= NETIF_F_SG;
3561
3562         if (pci_using_dac)
3563                 netdev->features |= NETIF_F_HIGHDMA;
3564
3565         netdev->features |= NETIF_F_MULTI_QUEUE;
3566
3567         /* make sure the EEPROM is good */
3568         if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
3569                 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
3570                 err = -EIO;
3571                 goto err_eeprom;
3572         }
3573
3574         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
3575         memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
3576
3577         if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
3578                 err = -EIO;
3579                 goto err_eeprom;
3580         }
3581
3582         init_timer(&adapter->watchdog_timer);
3583         adapter->watchdog_timer.function = &ixgbe_watchdog;
3584         adapter->watchdog_timer.data = (unsigned long)adapter;
3585
3586         INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
3587
3588         /* initialize default flow control settings */
3589         hw->fc.original_type = ixgbe_fc_full;
3590         hw->fc.type = ixgbe_fc_full;
3591         hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
3592         hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
3593         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
3594
3595         err = ixgbe_init_interrupt_scheme(adapter);
3596         if (err)
3597                 goto err_sw_init;
3598
3599         /* print bus type/speed/width info */
3600         pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
3601         link_speed = link_status & IXGBE_PCI_LINK_SPEED;
3602         link_width = link_status & IXGBE_PCI_LINK_WIDTH;
3603         dev_info(&pdev->dev, "(PCI Express:%s:%s) "
3604                  "%02x:%02x:%02x:%02x:%02x:%02x\n",
3605                 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
3606                  (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
3607                  "Unknown"),
3608                 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
3609                  (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
3610                  (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
3611                  (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
3612                  "Unknown"),
3613                 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
3614                 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
3615         ixgbe_read_part_num(hw, &part_num);
3616         dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3617                  hw->mac.type, hw->phy.type,
3618                  (part_num >> 8), (part_num & 0xff));
3619
3620         if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
3621                 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
3622                          "this card is not sufficient for optimal "
3623                          "performance.\n");
3624                 dev_warn(&pdev->dev, "For optimal performance a x8 "
3625                          "PCI-Express slot is required.\n");
3626         }
3627
3628         /* reset the hardware with the new settings */
3629         ixgbe_start_hw(hw);
3630
3631         netif_carrier_off(netdev);
3632         netif_stop_queue(netdev);
3633         for (i = 0; i < adapter->num_tx_queues; i++)
3634                 netif_stop_subqueue(netdev, i);
3635
3636         ixgbe_napi_add_all(adapter);
3637
3638         strcpy(netdev->name, "eth%d");
3639         err = register_netdev(netdev);
3640         if (err)
3641                 goto err_register;
3642
3643 #ifdef CONFIG_DCA
3644         if (dca_add_requester(&pdev->dev) == 0) {
3645                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
3646                 /* always use CB2 mode, difference is masked
3647                  * in the CB driver */
3648                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
3649                 ixgbe_setup_dca(adapter);
3650         }
3651 #endif
3652
3653         dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
3654         cards_found++;
3655         return 0;
3656
3657 err_register:
3658         ixgbe_release_hw_control(adapter);
3659 err_hw_init:
3660 err_sw_init:
3661         ixgbe_reset_interrupt_capability(adapter);
3662 err_eeprom:
3663         iounmap(hw->hw_addr);
3664 err_ioremap:
3665         free_netdev(netdev);
3666 err_alloc_etherdev:
3667         pci_release_regions(pdev);
3668 err_pci_reg:
3669 err_dma:
3670         pci_disable_device(pdev);
3671         return err;
3672 }
3673
3674 /**
3675  * ixgbe_remove - Device Removal Routine
3676  * @pdev: PCI device information struct
3677  *
3678  * ixgbe_remove is called by the PCI subsystem to alert the driver
3679  * that it should release a PCI device.  The could be caused by a
3680  * Hot-Plug event, or because the driver is going to be removed from
3681  * memory.
3682  **/
3683 static void __devexit ixgbe_remove(struct pci_dev *pdev)
3684 {
3685         struct net_device *netdev = pci_get_drvdata(pdev);
3686         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3687
3688         set_bit(__IXGBE_DOWN, &adapter->state);
3689         del_timer_sync(&adapter->watchdog_timer);
3690
3691         flush_scheduled_work();
3692
3693 #ifdef CONFIG_DCA
3694         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
3695                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
3696                 dca_remove_requester(&pdev->dev);
3697                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
3698         }
3699
3700 #endif
3701         unregister_netdev(netdev);
3702
3703         ixgbe_reset_interrupt_capability(adapter);
3704
3705         ixgbe_release_hw_control(adapter);
3706
3707         iounmap(adapter->hw.hw_addr);
3708         pci_release_regions(pdev);
3709
3710         DPRINTK(PROBE, INFO, "complete\n");
3711         kfree(adapter->tx_ring);
3712         kfree(adapter->rx_ring);
3713
3714         free_netdev(netdev);
3715
3716         pci_disable_device(pdev);
3717 }
3718
3719 /**
3720  * ixgbe_io_error_detected - called when PCI error is detected
3721  * @pdev: Pointer to PCI device
3722  * @state: The current pci connection state
3723  *
3724  * This function is called after a PCI bus error affecting
3725  * this device has been detected.
3726  */
3727 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
3728                                                 pci_channel_state_t state)
3729 {
3730         struct net_device *netdev = pci_get_drvdata(pdev);
3731         struct ixgbe_adapter *adapter = netdev->priv;
3732
3733         netif_device_detach(netdev);
3734
3735         if (netif_running(netdev))
3736                 ixgbe_down(adapter);
3737         pci_disable_device(pdev);
3738
3739         /* Request a slot slot reset. */
3740         return PCI_ERS_RESULT_NEED_RESET;
3741 }
3742
3743 /**
3744  * ixgbe_io_slot_reset - called after the pci bus has been reset.
3745  * @pdev: Pointer to PCI device
3746  *
3747  * Restart the card from scratch, as if from a cold-boot.
3748  */
3749 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
3750 {
3751         struct net_device *netdev = pci_get_drvdata(pdev);
3752         struct ixgbe_adapter *adapter = netdev->priv;
3753
3754         if (pci_enable_device(pdev)) {
3755                 DPRINTK(PROBE, ERR,
3756                         "Cannot re-enable PCI device after reset.\n");
3757                 return PCI_ERS_RESULT_DISCONNECT;
3758         }
3759         pci_set_master(pdev);
3760         pci_restore_state(pdev);
3761
3762         pci_enable_wake(pdev, PCI_D3hot, 0);
3763         pci_enable_wake(pdev, PCI_D3cold, 0);
3764
3765         ixgbe_reset(adapter);
3766
3767         return PCI_ERS_RESULT_RECOVERED;
3768 }
3769
3770 /**
3771  * ixgbe_io_resume - called when traffic can start flowing again.
3772  * @pdev: Pointer to PCI device
3773  *
3774  * This callback is called when the error recovery driver tells us that
3775  * its OK to resume normal operation.
3776  */
3777 static void ixgbe_io_resume(struct pci_dev *pdev)
3778 {
3779         struct net_device *netdev = pci_get_drvdata(pdev);
3780         struct ixgbe_adapter *adapter = netdev->priv;
3781
3782         if (netif_running(netdev)) {
3783                 if (ixgbe_up(adapter)) {
3784                         DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
3785                         return;
3786                 }
3787         }
3788
3789         netif_device_attach(netdev);
3790
3791 }
3792
3793 static struct pci_error_handlers ixgbe_err_handler = {
3794         .error_detected = ixgbe_io_error_detected,
3795         .slot_reset = ixgbe_io_slot_reset,
3796         .resume = ixgbe_io_resume,
3797 };
3798
3799 static struct pci_driver ixgbe_driver = {
3800         .name     = ixgbe_driver_name,
3801         .id_table = ixgbe_pci_tbl,
3802         .probe    = ixgbe_probe,
3803         .remove   = __devexit_p(ixgbe_remove),
3804 #ifdef CONFIG_PM
3805         .suspend  = ixgbe_suspend,
3806         .resume   = ixgbe_resume,
3807 #endif
3808         .shutdown = ixgbe_shutdown,
3809         .err_handler = &ixgbe_err_handler
3810 };
3811
3812 /**
3813  * ixgbe_init_module - Driver Registration Routine
3814  *
3815  * ixgbe_init_module is the first routine called when the driver is
3816  * loaded. All it does is register with the PCI subsystem.
3817  **/
3818 static int __init ixgbe_init_module(void)
3819 {
3820         int ret;
3821         printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
3822                ixgbe_driver_string, ixgbe_driver_version);
3823
3824         printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
3825
3826 #ifdef CONFIG_DCA
3827         dca_register_notify(&dca_notifier);
3828
3829 #endif
3830         ret = pci_register_driver(&ixgbe_driver);
3831         return ret;
3832 }
3833 module_init(ixgbe_init_module);
3834
3835 /**
3836  * ixgbe_exit_module - Driver Exit Cleanup Routine
3837  *
3838  * ixgbe_exit_module is called just before the driver is removed
3839  * from memory.
3840  **/
3841 static void __exit ixgbe_exit_module(void)
3842 {
3843 #ifdef CONFIG_DCA
3844         dca_unregister_notify(&dca_notifier);
3845 #endif
3846         pci_unregister_driver(&ixgbe_driver);
3847 }
3848
3849 #ifdef CONFIG_DCA
3850 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
3851                             void *p)
3852 {
3853         int ret_val;
3854
3855         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
3856                                          __ixgbe_notify_dca);
3857
3858         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3859 }
3860 #endif /* CONFIG_DCA */
3861
3862 module_exit(ixgbe_exit_module);
3863
3864 /* ixgbe_main.c */