2 * arch/s390/kernel/head.S
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Rob van der Heij (rvdhei@iae.nl)
10 * There are 5 different IPL methods
11 * 1) load the image directly into ram at address 0 and do an PSW restart
12 * 2) linload will load the image from address 0x10000 to memory 0x10000
13 * and start the code thru LPSW 0x0008000080010000 (VM only, deprecated)
14 * 3) generate the tape ipl header, store the generated image on a tape
16 * In case of SL tape you need to IPL 5 times to get past VOL1 etc
17 * 4) generate the vm reader ipl header, move the generated image to the
18 * VM reader (use option NOH!) and do a ipl from reader (VM only)
19 * 5) direct call of start by the SALIPL loader
20 * We use the cpuid to distinguish between VM and native ipl
21 * params for kernel are pushed to 0x10400 (see setup.h)
24 Okt 25 2000 <rvdheij@iae.nl>
25 added code to skip HDR and EOF to allow SL tape IPL (5 retries)
26 changed first CCW from rewind to backspace block
30 #include <linux/config.h>
31 #include <asm/setup.h>
32 #include <asm/lowcore.h>
33 #include <asm/offsets.h>
34 #include <asm/thread_info.h>
39 .long 0x00080000,0x80000000+startup # Just a restart PSW
41 #ifdef CONFIG_IPL_TAPE
44 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
45 .long 0x27000000,0x60000001 # by ipl to addresses 0-23.
46 .long 0x02000000,0x20000000+IPL_BS # (a PSW and two CCWs).
47 .long 0x00000000,0x00000000 # external old psw
48 .long 0x00000000,0x00000000 # svc old psw
49 .long 0x00000000,0x00000000 # program check old psw
50 .long 0x00000000,0x00000000 # machine check old psw
51 .long 0x00000000,0x00000000 # io old psw
52 .long 0x00000000,0x00000000
53 .long 0x00000000,0x00000000
54 .long 0x00000000,0x00000000
55 .long 0x000a0000,0x00000058 # external new psw
56 .long 0x000a0000,0x00000060 # svc new psw
57 .long 0x000a0000,0x00000068 # program check new psw
58 .long 0x000a0000,0x00000070 # machine check new psw
59 .long 0x00080000,0x80000000+.Lioint # io new psw
63 # subroutine for loading from tape
69 la %r3,.Lorbread # r3 = address of orb
70 la %r5,.Lirb # r5 = address of irb
71 st %r2,.Lccwread+4 # initialize CCW data addresses
77 ssch 0(%r3) # load chunk of IPL_BS bytes
81 tm 8(%r5),0x82 # do we have a problem ?
84 icm %r7,3,10(%r5) # get residual count
86 la %r7,IPL_BS(%r7) # IPL_BS-residual=#bytes read
87 ar %r2,%r7 # add to total size
88 tm 8(%r5),0x01 # found a tape mark ?
90 l %r0,.Lccwread+4 # update CCW data addresses
96 br %r14 # r2 contains the total size
98 bas %r14,.Lsense # do the sensing
99 bct %r6,.Lssch # dec. retry count & branch
107 ssch 0(%r7) # start sense command
111 tm 8(%r5),0x82 # do we have a problem ?
115 # Wait for interrupt subroutine
120 c %r1,0xb8 # compare subchannel number
124 tm 8(%r5),0x82 # do we have a problem ?
126 tm 8(%r5),0x04 # got device end ?
135 .long 0x00000000,0x0080ff00,.Lccwread
138 .long 0x00000000,0x0080ff00,.Lccwsense
141 .long 0x02200000+IPL_BS,0x00000000
143 .long 0x04200001,0x00000000
145 .long 0x020a0000,0x80000000+.Lioint
147 .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
148 .Lcr6: .long 0xff000000
150 .Lcrash:.long 0x000a0000,0x00000000
153 #endif /* CONFIG_IPL_TAPE */
158 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
159 .long 0x02000018,0x60000050 # by ipl to addresses 0-23.
160 .long 0x02000068,0x60000050 # (a PSW and two CCWs).
161 .fill 80-24,1,0x40 # bytes 24-79 are discarded !!
162 .long 0x020000f0,0x60000050 # The next 160 byte are loaded
163 .long 0x02000140,0x60000050 # to addresses 0x18-0xb7
164 .long 0x02000190,0x60000050 # They form the continuation
165 .long 0x020001e0,0x60000050 # of the CCW program started
166 .long 0x02000230,0x60000050 # by ipl and load the range
167 .long 0x02000280,0x60000050 # 0x0f0-0x730 from the image
168 .long 0x020002d0,0x60000050 # to the range 0x0f0-0x730
169 .long 0x02000320,0x60000050 # in memory. At the end of
170 .long 0x02000370,0x60000050 # the channel program the PSW
171 .long 0x020003c0,0x60000050 # at location 0 is loaded.
172 .long 0x02000410,0x60000050 # Initial processing starts
173 .long 0x02000460,0x60000050 # at 0xf0 = iplstart.
174 .long 0x020004b0,0x60000050
175 .long 0x02000500,0x60000050
176 .long 0x02000550,0x60000050
177 .long 0x020005a0,0x60000050
178 .long 0x020005f0,0x60000050
179 .long 0x02000640,0x60000050
180 .long 0x02000690,0x60000050
181 .long 0x020006e0,0x20000050
185 # subroutine for loading cards from the reader
188 la %r3,.Lorb # r2 = address of orb into r2
189 la %r5,.Lirb # r4 = address of irb
193 st %r2,4(%r6) # initialize CCW data addresses
198 lctl %c6,%c6,.Lcr6 # set IO subclass mask
201 ssch 0(%r3) # load chunk of 1600 bytes
204 mvc 0x78(8),.Lnewpsw # set up IO interrupt psw
207 c %r1,0xb8 # compare subchannel number
212 ic %r0,8(%r5) # get device status
213 chi %r0,8 # channel end ?
215 chi %r0,12 # channel end + device end ?
219 s %r0,8(%r3) # r0/8 = number of ccws executed
220 mhi %r0,10 # *10 = number of bytes in ccws
221 lh %r3,10(%r5) # get residual count
222 sr %r0,%r3 # #ccws*80-residual=#bytes read
225 br %r14 # r2 contains the total size
228 ahi %r2,0x640 # add 0x640 to total size
232 l %r0,4(%r6) # update CCW data addresses
243 .Lorb: .long 0x00000000,0x0080ff00,.Lccws
244 .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
245 .Lcr6: .long 0xff000000
248 .Lcrash:.long 0x000a0000,0x00000000
250 .long 0x00080000,0x80000000+.Lioint
252 .long 0x020a0000,0x80000000+.Lioint
256 .long 0x02600050,0x00000000
258 .long 0x02200050,0x00000000
259 #endif /* CONFIG_IPL_VM */
262 lh %r1,0xb8 # test if subchannel number
263 bct %r1,.Lnoload # is valid
264 l %r1,0xb8 # load ipl subchannel number
265 la %r2,IPL_BS # load start address
266 bas %r14,.Lloader # load rest of ipl image
267 larl %r12,_pstart # pointer to parameter area
268 st %r1,IPL_DEVICE+4-PARMAREA(%r12) # store ipl device number
271 # load parameter file from ipl device
274 l %r2,INITRD_START+4-PARMAREA(%r12)# use ramdisk location as temp
275 bas %r14,.Lloader # load parameter file
276 ltr %r2,%r2 # got anything ?
282 l %r4,INITRD_START+4-PARMAREA(%r12)
283 clc 0(3,%r4),.L_hdr # if it is HDRx
284 bz .Lagain1 # skip dataset header
285 clc 0(3,%r4),.L_eof # if it is EOFx
286 bz .Lagain1 # skip dateset trailer
290 tm 0(%r5),0x80 # high order bit set ?
291 bo .Ldocv # yes -> convert from EBCDIC
297 tr 0(256,%r4),0(%r3) # convert parameters to ascii
298 tr 256(256,%r4),0(%r3)
299 tr 512(256,%r4),0(%r3)
300 tr 768(122,%r4),0(%r3)
301 .Lnocv: la %r3,COMMAND_LINE-PARMAREA(%r12) # load adr. of command line
302 mvc 0(256,%r3),0(%r4)
303 mvc 256(256,%r3),256(%r4)
304 mvc 512(256,%r3),512(%r4)
305 mvc 768(122,%r3),768(%r4)
310 chi %r0,0x20 # is it a space ?
318 stc %r0,0(%r2,%r3) # terminate buffer
322 # load ramdisk from ipl device
325 l %r2,INITRD_START+4-PARMAREA(%r12)# load adr. of ramdisk
326 bas %r14,.Lloader # load ramdisk
327 st %r2,INITRD_SIZE+4-PARMAREA(%r12) # store size of ramdisk
330 st %r2,INITRD_START+4-PARMAREA(%r12)# no ramdisk found, null it
332 l %r2,INITRD_START+4-PARMAREA(%r12)
333 clc 0(3,%r2),.L_hdr # skip HDRx and EOFx
340 # reset files in VM reader
342 stidp __LC_CPUID # store cpuid
343 tm __LC_CPUID,0xff # running VM ?
348 mvc 0x78(8),.Lrdrnewpsw # set up IO interrupt psw
352 c %r1,0xb8 # compare subchannel number
361 .long 0x00080000,0x80000000+.Lrdrint
363 .long 0x020a0000,0x80000000+.Lrdrint
367 # everything loaded, go for it
373 .Lstartup: .long startup
374 .Lcvtab:.long _ebcasc # ebcdic to ascii table
375 .Lreset:.byte 0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40
376 .byte 0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6
377 .byte 0xc8,0xd6,0xd3,0xc4 # "change rdr all keep nohold"
378 .L_eof: .long 0xc5d6c600 /* C'EOF' */
379 .L_hdr: .long 0xc8c4d900 /* C'HDR' */
380 #endif /* CONFIG_IPL */
383 # SALIPL loader support. Based on a patch by Rob van der Heij.
384 # This entry point is called directly from the SALIPL loader and
385 # doesn't need a builtin ipl record.
390 stm %r0,%r15,0x07b0 # store registers
394 l %r8,.cmd # pointer to command buffer
396 ltr %r9,%r9 # do we have SALIPL parameters?
399 mvc 0(64,%r8),0x00b0 # copy saved registers
400 xc 64(240-64,%r8),0(%r8) # remainder of buffer
401 tr 0(64,%r8),.lowcase
404 mvc 0(240,%r8),0(%r9) # copy iplparms into buffer
406 l %r10,.tbl # EBCDIC to ASCII table
407 tr 0(240,%r8),0(%r10)
408 stidp __LC_CPUID # Are we running on VM maybe
411 .long 0x83300060 # diag 3,0,x'0060' - storage size
414 mvc 0x68(8),.pgmnw # set up pgm check handler
427 st %r0,INITRD_SIZE+4-PARMAREA(%r11)
428 st %r0,INITRD_START+4-PARMAREA(%r11)
429 j startup # continue with startup
430 .tbl: .long _ebcasc # translate table
431 .cmd: .long COMMAND_LINE # address of command line buffer
432 .parm: .long PARMAREA
433 .fourmeg: .long 0x00400000 # 4M
434 .pgmnw: .long 0x00080000,.pgmx
435 .memsize: .long memory_size
437 .byte 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07
438 .byte 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f
439 .byte 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17
440 .byte 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f
441 .byte 0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27
442 .byte 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f
443 .byte 0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37
444 .byte 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f
445 .byte 0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47
446 .byte 0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f
447 .byte 0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57
448 .byte 0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f
449 .byte 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67
450 .byte 0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f
451 .byte 0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77
452 .byte 0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f
454 .byte 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87
455 .byte 0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f
456 .byte 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97
457 .byte 0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f
458 .byte 0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7
459 .byte 0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf
460 .byte 0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7
461 .byte 0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf
462 .byte 0xc0,0x81,0x82,0x83,0x84,0x85,0x86,0x87 # .abcdefg
463 .byte 0x88,0x89,0xca,0xcb,0xcc,0xcd,0xce,0xcf # hi
464 .byte 0xd0,0x91,0x92,0x93,0x94,0x95,0x96,0x97 # .jklmnop
465 .byte 0x98,0x99,0xda,0xdb,0xdc,0xdd,0xde,0xdf # qr
466 .byte 0xe0,0xe1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7 # ..stuvwx
467 .byte 0xa8,0xa9,0xea,0xeb,0xec,0xed,0xee,0xef # yz
468 .byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7
469 .byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff
472 # startup-code at 0x10000, running in real mode
473 # this is called either by the ipl loader or directly by PSW restart
474 # or linload or SALIPL
477 startup:basr %r13,0 # get base
478 .LPG1: sll %r13,1 # remove high order bit
480 lhi %r1,1 # mode 1 = esame
481 slr %r0,%r0 # set cpuid to zero
482 sigp %r1,%r0,0x12 # switch to esame mode
483 sam64 # switch to 64 bit mode
484 lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
485 larl %r12,_pstart # pointer to parameter area
486 # move IPL device to lowcore
487 mvc __LC_IPLDEV(4),IPL_DEVICE+4-PARMAREA(%r12)
492 larl %r2,__bss_start # start of bss segment
493 larl %r3,_end # end of bss segment
494 sgr %r3,%r2 # length of bss
496 sgr %r5,%r5 # set src,length and pad to zero
497 mvcle %r2,%r4,0 # clear mem
498 jo .-4 # branch back, if not finish
500 l %r2,.Lrcp-.LPG1(%r13) # Read SCP forced command word
502 stosm .Lpmask-.LPG1(%r13),0x01 # authorize ext interrupts
504 stctg %r0,%r0,.Lcr-.LPG1(%r13) # get cr0
505 la %r1,0x200 # set bit 22
506 og %r1,.Lcr-.LPG1(%r13) # or old cr0 with r1
507 stg %r1,.Lcr-.LPG1(%r13)
508 lctlg %r0,%r0,.Lcr-.LPG1(%r13) # load modified cr0
510 mvc __LC_EXT_NEW_PSW(8),.Lpcmsk-.LPG1(%r13) # set postcall psw
512 stg %r1,__LC_EXT_NEW_PSW+8 # set handler
514 larl %r4,_pstart # %r4 is our index for sccb stuff
515 la %r1,.Lsccb-PARMAREA(%r4) # our sccb
516 .insn rre,0xb2200000,%r2,%r1 # service call
518 srl %r1,28 # get cc code
521 be .Lfchunk-.LPG1(%r13) # leave
523 be .Lservicecall-.LPG1(%r13)
524 lpsw .Lwaitsclp-.LPG1(%r13)
526 lh %r1,.Lsccbr-PARMAREA(%r4)
527 chi %r1,0x10 # 0x0010 is the sucess code
528 je .Lprocsccb # let's process the sccb
530 bne .Lfchunk-.LPG1(%r13) # unhandled error code
531 c %r2,.Lrcp-.LPG1(%r13) # Did we try Read SCP forced
532 bne .Lfchunk-.LPG1(%r13) # if no, give up
533 l %r2,.Lrcp2-.LPG1(%r13) # try with Read SCP
534 b .Lservicecall-.LPG1(%r13)
537 icm %r1,3,.Lscpincr1-PARMAREA(%r4) # use this one if != 0
539 lg %r1,.Lscpincr2-PARMAREA(%r4) # otherwise use this one
541 xr %r3,%r3 # same logic
542 ic %r3,.Lscpa1-PARMAREA(%r4)
545 l %r3,.Lscpa2-PARMAREA(%r13)
547 mlgr %r2,%r1 # mem in MB on 128-bit
548 l %r1,.Lonemb-.LPG1(%r13)
549 mlgr %r2,%r1 # mem size in bytes in %r3
550 b .Lfchunk-.LPG1(%r13)
556 .quad 0x00 # place holder for cr0
561 .int 0x00120001 # Read SCP forced code
563 .int 0x00020001 # Read SCP code
568 # set program check new psw mask
569 mvc __LC_PGM_NEW_PSW(8),.Lpcmsk-.LPG1(%r13)
572 # find memory chunks.
574 lgr %r9,%r3 # end of mem
575 larl %r1,.Lchkmem # set program check address
576 stg %r1,__LC_PGM_NEW_PSW+8
577 la %r1,1 # test in increments of 128KB
579 larl %r3,memory_chunk
580 slgr %r4,%r4 # set start of chunk to zero
581 slgr %r5,%r5 # set end of chunk to zero
582 slr %r6,%r6 # set access code to zero
583 la %r10,MEMORY_CHUNKS # number of chunks
585 tprot 0(%r5),0 # test protection of first byte
588 clr %r6,%r7 # compare cc with last access code
592 algr %r5,%r1 # add 128KB to end of chunk
593 # no need to check here,
594 brc 12,.Lloop # this is the same chunk
595 .Lchkmem: # > 16EB or tprot got a program check
596 clgr %r4,%r5 # chunk size > 0?
598 stg %r4,0(%r3) # store start address of chunk
601 stg %r0,8(%r3) # store size of chunk
602 st %r6,20(%r3) # store type of chunk
605 stg %r5,0(%r8) # store memory size
606 ahi %r10,-1 # update chunk number
608 lr %r6,%r7 # set access code to last cc
609 # we got an exception or we're starting a new
610 # chunk , we must check if we should
611 # still try to find valid memory (if we detected
612 # the amount of available storage), and if we
619 clgr %r0, %r9 # did we detect memory?
620 je .Ldonemem # if not, leave
621 chi %r10, 0 # do we have chunks left?
624 algr %r5,%r1 # add 128KB to end of chunk
625 lgr %r4,%r5 # potential new chunk
626 clgr %r5,%r9 # should we go on?
630 larl %r12,machine_flags
632 # find out if we are running under VM
634 stidp __LC_CPUID # store cpuid
635 tm __LC_CPUID,0xff # running under VM ?
637 oi 7(%r12),1 # set VM flag
638 0: lh %r0,__LC_CPUID+4 # get cpu version
639 chi %r0,0x7490 # running on a P/390 ?
641 oi 7(%r12),4 # set P/390 flag
645 # find out if we have the MVPG instruction
647 la %r1,0f-.LPG1(%r13) # set program check address
648 stg %r1,__LC_PGM_NEW_PSW+8
652 mvpg %r1,%r2 # test MVPG instruction
653 oi 7(%r12),16 # set MVPG flag
657 # find out if the diag 0x44 works in 64 bit mode
659 la %r1,0f-.LPG1(%r13) # set program check address
660 stg %r1,__LC_PGM_NEW_PSW+8
661 mvc __LC_DIAG44_OPCODE(8),.Lnop-.LPG1(%r13)
662 diag 0,0,0x44 # test diag 0x44
663 oi 7(%r12),32 # set diag44 flag
664 mvc __LC_DIAG44_OPCODE(8),.Ldiag44-.LPG1(%r13)
668 # find out if we have the IDTE instruction
670 la %r1,0f-.LPG1(%r13) # set program check address
671 stg %r1,__LC_PGM_NEW_PSW+8
672 .long 0xb2b10000 # store facility list
673 tm 0xc8,0x08 # check bit for clearing-by-ASCE
678 oi 7(%r12),0x80 # set IDTE flag
681 lpswe .Lentry-.LPG1(13) # jump to _stext in primary-space,
682 # virtual and never return ...
684 .Lentry:.quad 0x0000000180000000,_stext
685 .Lctl: .quad 0x04b50002 # cr0: various things
686 .quad 0 # cr1: primary space segment table
687 .quad .Lduct # cr2: dispatchable unit control table
688 .quad 0 # cr3: instruction authorization
689 .quad 0 # cr4: instruction authorization
690 .quad 0xffffffffffffffff # cr5: primary-aste origin
691 .quad 0 # cr6: I/O interrupts
692 .quad 0 # cr7: secondary space segment table
693 .quad 0 # cr8: access registers translation
694 .quad 0 # cr9: tracing off
695 .quad 0 # cr10: tracing off
696 .quad 0 # cr11: tracing off
697 .quad 0 # cr12: tracing off
698 .quad 0 # cr13: home space segment table
699 .quad 0xc0000000 # cr14: machine check handling off
700 .quad 0 # cr15: linkage stack operations
701 .Lpcmsk:.quad 0x0000000180000000
702 .L4malign:.quad 0xffffffffffc00000
703 .Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
704 .Lnop: .long 0x07000700
705 .Ldiag44:.long 0x83000044
708 .Lduct: .long 0,0,0,0,0,0,0,0
709 .long 0,0,0,0,0,0,0,0
712 # params at 10400 (setup.h)
718 .quad RAMDISK_ORIGIN # INITRD_START
719 .quad RAMDISK_SIZE # INITRD_SIZE
722 .byte "root=/dev/ram0 ro"
726 .hword 0x1000 # length, one page
728 .byte 0x80 # variable response bit set
730 .hword 0x00 # response code
745 #ifdef CONFIG_SHARED_KERNEL
750 # startup-code, running in virtual mode
753 _stext: basr %r13,0 # get base
758 larl %r15,init_thread_union
759 lg %r14,__TI_task(%r15) # cache current in lowcore
760 stg %r14,__LC_CURRENT
761 aghi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union + THREAD_SIZE
762 stg %r15,__LC_KERNEL_STACK # set end of kernel stack
764 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
766 # check control registers
767 stctg %c0,%c15,0(%r15)
768 oi 6(%r15),0x20 # enable sigp external interrupts
769 oi 4(%r15),0x10 # switch on low address proctection
770 lctlg %c0,%c15,0(%r15)
773 lam 0,15,.Laregs-.LPG2(%r13) # load access regs needed by uaccess
774 brasl %r14,start_kernel # go to C code
776 # We returned from start_kernel ?!? PANIK
779 lpswe .Ldw-.(%r13) # load disabled wait psw
782 .Ldw: .quad 0x0002000180000000,0x0000000000000000
783 .Laregs: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0