1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/pci.h>
12 #include <linux/tcp.h>
15 #include <linux/if_ether.h>
16 #include <linux/highmem.h>
17 #include "net_driver.h"
21 #include "workarounds.h"
24 * TX descriptor ring full threshold
26 * The tx_queue descriptor ring fill-level must fall below this value
27 * before we restart the netif queue
29 #define EFX_NETDEV_TX_THRESHOLD(_tx_queue) \
30 (_tx_queue->efx->type->txd_ring_mask / 2u)
32 /* We want to be able to nest calls to netif_stop_queue(), since each
33 * channel can have an individual stop on the queue.
35 void efx_stop_queue(struct efx_nic *efx)
37 spin_lock_bh(&efx->netif_stop_lock);
38 EFX_TRACE(efx, "stop TX queue\n");
40 atomic_inc(&efx->netif_stop_count);
41 netif_stop_queue(efx->net_dev);
43 spin_unlock_bh(&efx->netif_stop_lock);
46 /* Wake netif's TX queue
47 * We want to be able to nest calls to netif_stop_queue(), since each
48 * channel can have an individual stop on the queue.
50 void efx_wake_queue(struct efx_nic *efx)
53 if (atomic_dec_and_lock(&efx->netif_stop_count,
54 &efx->netif_stop_lock)) {
55 EFX_TRACE(efx, "waking TX queue\n");
56 netif_wake_queue(efx->net_dev);
57 spin_unlock(&efx->netif_stop_lock);
62 static void efx_dequeue_buffer(struct efx_tx_queue *tx_queue,
63 struct efx_tx_buffer *buffer)
65 if (buffer->unmap_len) {
66 struct pci_dev *pci_dev = tx_queue->efx->pci_dev;
67 dma_addr_t unmap_addr = (buffer->dma_addr + buffer->len -
69 if (buffer->unmap_single)
70 pci_unmap_single(pci_dev, unmap_addr, buffer->unmap_len,
73 pci_unmap_page(pci_dev, unmap_addr, buffer->unmap_len,
75 buffer->unmap_len = 0;
76 buffer->unmap_single = false;
80 dev_kfree_skb_any((struct sk_buff *) buffer->skb);
82 EFX_TRACE(tx_queue->efx, "TX queue %d transmission id %x "
83 "complete\n", tx_queue->queue, read_ptr);
88 * struct efx_tso_header - a DMA mapped buffer for packet headers
89 * @next: Linked list of free ones.
90 * The list is protected by the TX queue lock.
91 * @dma_unmap_len: Length to unmap for an oversize buffer, or 0.
92 * @dma_addr: The DMA address of the header below.
94 * This controls the memory used for a TSO header. Use TSOH_DATA()
95 * to find the packet header data. Use TSOH_SIZE() to calculate the
96 * total size required for a given packet header length. TSO headers
97 * in the free list are exactly %TSOH_STD_SIZE bytes in size.
99 struct efx_tso_header {
101 struct efx_tso_header *next;
107 static int efx_enqueue_skb_tso(struct efx_tx_queue *tx_queue,
108 struct sk_buff *skb);
109 static void efx_fini_tso(struct efx_tx_queue *tx_queue);
110 static void efx_tsoh_heap_free(struct efx_tx_queue *tx_queue,
111 struct efx_tso_header *tsoh);
113 static void efx_tsoh_free(struct efx_tx_queue *tx_queue,
114 struct efx_tx_buffer *buffer)
117 if (likely(!buffer->tsoh->unmap_len)) {
118 buffer->tsoh->next = tx_queue->tso_headers_free;
119 tx_queue->tso_headers_free = buffer->tsoh;
121 efx_tsoh_heap_free(tx_queue, buffer->tsoh);
129 * Add a socket buffer to a TX queue
131 * This maps all fragments of a socket buffer for DMA and adds them to
132 * the TX queue. The queue's insert pointer will be incremented by
133 * the number of fragments in the socket buffer.
135 * If any DMA mapping fails, any mapped fragments will be unmapped,
136 * the queue's insert pointer will be restored to its original value.
138 * Returns NETDEV_TX_OK or NETDEV_TX_BUSY
139 * You must hold netif_tx_lock() to call this function.
141 static int efx_enqueue_skb(struct efx_tx_queue *tx_queue,
144 struct efx_nic *efx = tx_queue->efx;
145 struct pci_dev *pci_dev = efx->pci_dev;
146 struct efx_tx_buffer *buffer;
147 skb_frag_t *fragment;
150 unsigned int len, unmap_len = 0, fill_level, insert_ptr, misalign;
151 dma_addr_t dma_addr, unmap_addr = 0;
152 unsigned int dma_len;
155 int rc = NETDEV_TX_OK;
157 EFX_BUG_ON_PARANOID(tx_queue->write_count != tx_queue->insert_count);
159 if (skb_shinfo((struct sk_buff *)skb)->gso_size)
160 return efx_enqueue_skb_tso(tx_queue, skb);
162 /* Get size of the initial fragment */
163 len = skb_headlen(skb);
165 fill_level = tx_queue->insert_count - tx_queue->old_read_count;
166 q_space = efx->type->txd_ring_mask - 1 - fill_level;
168 /* Map for DMA. Use pci_map_single rather than pci_map_page
169 * since this is more efficient on machines with sparse
173 dma_addr = pci_map_single(pci_dev, skb->data, len, PCI_DMA_TODEVICE);
175 /* Process all fragments */
177 if (unlikely(pci_dma_mapping_error(pci_dev, dma_addr)))
180 /* Store fields for marking in the per-fragment final
183 unmap_addr = dma_addr;
185 /* Add to TX queue, splitting across DMA boundaries */
187 if (unlikely(q_space-- <= 0)) {
188 /* It might be that completions have
189 * happened since the xmit path last
190 * checked. Update the xmit path's
191 * copy of read_count.
194 /* This memory barrier protects the
195 * change of stopped from the access
198 tx_queue->old_read_count =
199 *(volatile unsigned *)
200 &tx_queue->read_count;
201 fill_level = (tx_queue->insert_count
202 - tx_queue->old_read_count);
203 q_space = (efx->type->txd_ring_mask - 1 -
205 if (unlikely(q_space-- <= 0))
211 insert_ptr = (tx_queue->insert_count &
212 efx->type->txd_ring_mask);
213 buffer = &tx_queue->buffer[insert_ptr];
214 efx_tsoh_free(tx_queue, buffer);
215 EFX_BUG_ON_PARANOID(buffer->tsoh);
216 EFX_BUG_ON_PARANOID(buffer->skb);
217 EFX_BUG_ON_PARANOID(buffer->len);
218 EFX_BUG_ON_PARANOID(!buffer->continuation);
219 EFX_BUG_ON_PARANOID(buffer->unmap_len);
221 dma_len = (((~dma_addr) & efx->type->tx_dma_mask) + 1);
222 if (likely(dma_len > len))
225 misalign = (unsigned)dma_addr & efx->type->bug5391_mask;
226 if (misalign && dma_len + misalign > 512)
227 dma_len = 512 - misalign;
229 /* Fill out per descriptor fields */
230 buffer->len = dma_len;
231 buffer->dma_addr = dma_addr;
234 ++tx_queue->insert_count;
237 /* Transfer ownership of the unmapping to the final buffer */
238 buffer->unmap_single = unmap_single;
239 buffer->unmap_len = unmap_len;
242 /* Get address and size of next fragment */
243 if (i >= skb_shinfo(skb)->nr_frags)
245 fragment = &skb_shinfo(skb)->frags[i];
246 len = fragment->size;
247 page = fragment->page;
248 page_offset = fragment->page_offset;
251 unmap_single = false;
252 dma_addr = pci_map_page(pci_dev, page, page_offset, len,
256 /* Transfer ownership of the skb to the final buffer */
258 buffer->continuation = false;
260 /* Pass off to hardware */
261 falcon_push_buffers(tx_queue);
266 EFX_ERR_RL(efx, " TX queue %d could not map skb with %d bytes %d "
267 "fragments for DMA\n", tx_queue->queue, skb->len,
268 skb_shinfo(skb)->nr_frags + 1);
270 /* Mark the packet as transmitted, and free the SKB ourselves */
271 dev_kfree_skb_any((struct sk_buff *)skb);
277 if (tx_queue->stopped == 1)
281 /* Work backwards until we hit the original insert pointer value */
282 while (tx_queue->insert_count != tx_queue->write_count) {
283 --tx_queue->insert_count;
284 insert_ptr = tx_queue->insert_count & efx->type->txd_ring_mask;
285 buffer = &tx_queue->buffer[insert_ptr];
286 efx_dequeue_buffer(tx_queue, buffer);
290 /* Free the fragment we were mid-way through pushing */
293 pci_unmap_single(pci_dev, unmap_addr, unmap_len,
296 pci_unmap_page(pci_dev, unmap_addr, unmap_len,
303 /* Remove packets from the TX queue
305 * This removes packets from the TX queue, up to and including the
308 static void efx_dequeue_buffers(struct efx_tx_queue *tx_queue,
311 struct efx_nic *efx = tx_queue->efx;
312 unsigned int stop_index, read_ptr;
313 unsigned int mask = tx_queue->efx->type->txd_ring_mask;
315 stop_index = (index + 1) & mask;
316 read_ptr = tx_queue->read_count & mask;
318 while (read_ptr != stop_index) {
319 struct efx_tx_buffer *buffer = &tx_queue->buffer[read_ptr];
320 if (unlikely(buffer->len == 0)) {
321 EFX_ERR(tx_queue->efx, "TX queue %d spurious TX "
322 "completion id %x\n", tx_queue->queue,
324 efx_schedule_reset(efx, RESET_TYPE_TX_SKIP);
328 efx_dequeue_buffer(tx_queue, buffer);
329 buffer->continuation = true;
332 ++tx_queue->read_count;
333 read_ptr = tx_queue->read_count & mask;
337 /* Initiate a packet transmission on the specified TX queue.
338 * Note that returning anything other than NETDEV_TX_OK will cause the
339 * OS to free the skb.
341 * This function is split out from efx_hard_start_xmit to allow the
342 * loopback test to direct packets via specific TX queues. It is
343 * therefore a non-static inline, so as not to penalise performance
344 * for non-loopback transmissions.
346 * Context: netif_tx_lock held
348 inline int efx_xmit(struct efx_nic *efx,
349 struct efx_tx_queue *tx_queue, struct sk_buff *skb)
353 /* Map fragments for DMA and add to TX queue */
354 rc = efx_enqueue_skb(tx_queue, skb);
355 if (unlikely(rc != NETDEV_TX_OK))
358 /* Update last TX timer */
359 efx->net_dev->trans_start = jiffies;
365 /* Initiate a packet transmission. We use one channel per CPU
366 * (sharing when we have more CPUs than channels). On Falcon, the TX
367 * completion events will be directed back to the CPU that transmitted
368 * the packet, which should be cache-efficient.
370 * Context: non-blocking.
371 * Note that returning anything other than NETDEV_TX_OK will cause the
372 * OS to free the skb.
374 int efx_hard_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
376 struct efx_nic *efx = netdev_priv(net_dev);
377 struct efx_tx_queue *tx_queue;
379 if (unlikely(efx->port_inhibited))
380 return NETDEV_TX_BUSY;
382 if (likely(skb->ip_summed == CHECKSUM_PARTIAL))
383 tx_queue = &efx->tx_queue[EFX_TX_QUEUE_OFFLOAD_CSUM];
385 tx_queue = &efx->tx_queue[EFX_TX_QUEUE_NO_CSUM];
387 return efx_xmit(efx, tx_queue, skb);
390 void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index)
393 struct efx_nic *efx = tx_queue->efx;
395 EFX_BUG_ON_PARANOID(index > efx->type->txd_ring_mask);
397 efx_dequeue_buffers(tx_queue, index);
399 /* See if we need to restart the netif queue. This barrier
400 * separates the update of read_count from the test of
403 if (unlikely(tx_queue->stopped) && likely(efx->port_enabled)) {
404 fill_level = tx_queue->insert_count - tx_queue->read_count;
405 if (fill_level < EFX_NETDEV_TX_THRESHOLD(tx_queue)) {
406 EFX_BUG_ON_PARANOID(!efx_dev_registered(efx));
408 /* Do this under netif_tx_lock(), to avoid racing
409 * with efx_xmit(). */
410 netif_tx_lock(efx->net_dev);
411 if (tx_queue->stopped) {
412 tx_queue->stopped = 0;
415 netif_tx_unlock(efx->net_dev);
420 int efx_probe_tx_queue(struct efx_tx_queue *tx_queue)
422 struct efx_nic *efx = tx_queue->efx;
423 unsigned int txq_size;
426 EFX_LOG(efx, "creating TX queue %d\n", tx_queue->queue);
428 /* Allocate software ring */
429 txq_size = (efx->type->txd_ring_mask + 1) * sizeof(*tx_queue->buffer);
430 tx_queue->buffer = kzalloc(txq_size, GFP_KERNEL);
431 if (!tx_queue->buffer)
433 for (i = 0; i <= efx->type->txd_ring_mask; ++i)
434 tx_queue->buffer[i].continuation = true;
436 /* Allocate hardware ring */
437 rc = falcon_probe_tx(tx_queue);
444 kfree(tx_queue->buffer);
445 tx_queue->buffer = NULL;
449 void efx_init_tx_queue(struct efx_tx_queue *tx_queue)
451 EFX_LOG(tx_queue->efx, "initialising TX queue %d\n", tx_queue->queue);
453 tx_queue->insert_count = 0;
454 tx_queue->write_count = 0;
455 tx_queue->read_count = 0;
456 tx_queue->old_read_count = 0;
457 BUG_ON(tx_queue->stopped);
459 /* Set up TX descriptor ring */
460 falcon_init_tx(tx_queue);
463 void efx_release_tx_buffers(struct efx_tx_queue *tx_queue)
465 struct efx_tx_buffer *buffer;
467 if (!tx_queue->buffer)
470 /* Free any buffers left in the ring */
471 while (tx_queue->read_count != tx_queue->write_count) {
472 buffer = &tx_queue->buffer[tx_queue->read_count &
473 tx_queue->efx->type->txd_ring_mask];
474 efx_dequeue_buffer(tx_queue, buffer);
475 buffer->continuation = true;
478 ++tx_queue->read_count;
482 void efx_fini_tx_queue(struct efx_tx_queue *tx_queue)
484 EFX_LOG(tx_queue->efx, "shutting down TX queue %d\n", tx_queue->queue);
486 /* Flush TX queue, remove descriptor ring */
487 falcon_fini_tx(tx_queue);
489 efx_release_tx_buffers(tx_queue);
491 /* Free up TSO header cache */
492 efx_fini_tso(tx_queue);
494 /* Release queue's stop on port, if any */
495 if (tx_queue->stopped) {
496 tx_queue->stopped = 0;
497 efx_wake_queue(tx_queue->efx);
501 void efx_remove_tx_queue(struct efx_tx_queue *tx_queue)
503 EFX_LOG(tx_queue->efx, "destroying TX queue %d\n", tx_queue->queue);
504 falcon_remove_tx(tx_queue);
506 kfree(tx_queue->buffer);
507 tx_queue->buffer = NULL;
511 /* Efx TCP segmentation acceleration.
513 * Why? Because by doing it here in the driver we can go significantly
514 * faster than the GSO.
516 * Requires TX checksum offload support.
519 /* Number of bytes inserted at the start of a TSO header buffer,
520 * similar to NET_IP_ALIGN.
522 #ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
523 #define TSOH_OFFSET 0
525 #define TSOH_OFFSET NET_IP_ALIGN
528 #define TSOH_BUFFER(tsoh) ((u8 *)(tsoh + 1) + TSOH_OFFSET)
530 /* Total size of struct efx_tso_header, buffer and padding */
531 #define TSOH_SIZE(hdr_len) \
532 (sizeof(struct efx_tso_header) + TSOH_OFFSET + hdr_len)
534 /* Size of blocks on free list. Larger blocks must be allocated from
537 #define TSOH_STD_SIZE 128
539 #define PTR_DIFF(p1, p2) ((u8 *)(p1) - (u8 *)(p2))
540 #define ETH_HDR_LEN(skb) (skb_network_header(skb) - (skb)->data)
541 #define SKB_TCP_OFF(skb) PTR_DIFF(tcp_hdr(skb), (skb)->data)
542 #define SKB_IPV4_OFF(skb) PTR_DIFF(ip_hdr(skb), (skb)->data)
545 * struct tso_state - TSO state for an SKB
546 * @out_len: Remaining length in current segment
547 * @seqnum: Current sequence number
548 * @ipv4_id: Current IPv4 ID, host endian
549 * @packet_space: Remaining space in current packet
550 * @dma_addr: DMA address of current position
551 * @in_len: Remaining length in current SKB fragment
552 * @unmap_len: Length of SKB fragment
553 * @unmap_addr: DMA address of SKB fragment
554 * @unmap_single: DMA single vs page mapping flag
555 * @header_len: Number of bytes of header
556 * @full_packet_size: Number of bytes to put in each outgoing segment
558 * The state used during segmentation. It is put into this data structure
559 * just to make it easy to pass into inline functions.
562 /* Output position */
566 unsigned packet_space;
572 dma_addr_t unmap_addr;
576 int full_packet_size;
581 * Verify that our various assumptions about sk_buffs and the conditions
582 * under which TSO will be attempted hold true.
584 static void efx_tso_check_safe(struct sk_buff *skb)
586 __be16 protocol = skb->protocol;
588 EFX_BUG_ON_PARANOID(((struct ethhdr *)skb->data)->h_proto !=
590 if (protocol == htons(ETH_P_8021Q)) {
591 /* Find the encapsulated protocol; reset network header
592 * and transport header based on that. */
593 struct vlan_ethhdr *veh = (struct vlan_ethhdr *)skb->data;
594 protocol = veh->h_vlan_encapsulated_proto;
595 skb_set_network_header(skb, sizeof(*veh));
596 if (protocol == htons(ETH_P_IP))
597 skb_set_transport_header(skb, sizeof(*veh) +
598 4 * ip_hdr(skb)->ihl);
601 EFX_BUG_ON_PARANOID(protocol != htons(ETH_P_IP));
602 EFX_BUG_ON_PARANOID(ip_hdr(skb)->protocol != IPPROTO_TCP);
603 EFX_BUG_ON_PARANOID((PTR_DIFF(tcp_hdr(skb), skb->data)
604 + (tcp_hdr(skb)->doff << 2u)) >
610 * Allocate a page worth of efx_tso_header structures, and string them
611 * into the tx_queue->tso_headers_free linked list. Return 0 or -ENOMEM.
613 static int efx_tsoh_block_alloc(struct efx_tx_queue *tx_queue)
616 struct pci_dev *pci_dev = tx_queue->efx->pci_dev;
617 struct efx_tso_header *tsoh;
621 base_kva = pci_alloc_consistent(pci_dev, PAGE_SIZE, &dma_addr);
622 if (base_kva == NULL) {
623 EFX_ERR(tx_queue->efx, "Unable to allocate page for TSO"
628 /* pci_alloc_consistent() allocates pages. */
629 EFX_BUG_ON_PARANOID(dma_addr & (PAGE_SIZE - 1u));
631 for (kva = base_kva; kva < base_kva + PAGE_SIZE; kva += TSOH_STD_SIZE) {
632 tsoh = (struct efx_tso_header *)kva;
633 tsoh->dma_addr = dma_addr + (TSOH_BUFFER(tsoh) - base_kva);
634 tsoh->next = tx_queue->tso_headers_free;
635 tx_queue->tso_headers_free = tsoh;
642 /* Free up a TSO header, and all others in the same page. */
643 static void efx_tsoh_block_free(struct efx_tx_queue *tx_queue,
644 struct efx_tso_header *tsoh,
645 struct pci_dev *pci_dev)
647 struct efx_tso_header **p;
648 unsigned long base_kva;
651 base_kva = (unsigned long)tsoh & PAGE_MASK;
652 base_dma = tsoh->dma_addr & PAGE_MASK;
654 p = &tx_queue->tso_headers_free;
656 if (((unsigned long)*p & PAGE_MASK) == base_kva)
662 pci_free_consistent(pci_dev, PAGE_SIZE, (void *)base_kva, base_dma);
665 static struct efx_tso_header *
666 efx_tsoh_heap_alloc(struct efx_tx_queue *tx_queue, size_t header_len)
668 struct efx_tso_header *tsoh;
670 tsoh = kmalloc(TSOH_SIZE(header_len), GFP_ATOMIC | GFP_DMA);
674 tsoh->dma_addr = pci_map_single(tx_queue->efx->pci_dev,
675 TSOH_BUFFER(tsoh), header_len,
677 if (unlikely(pci_dma_mapping_error(tx_queue->efx->pci_dev,
683 tsoh->unmap_len = header_len;
688 efx_tsoh_heap_free(struct efx_tx_queue *tx_queue, struct efx_tso_header *tsoh)
690 pci_unmap_single(tx_queue->efx->pci_dev,
691 tsoh->dma_addr, tsoh->unmap_len,
697 * efx_tx_queue_insert - push descriptors onto the TX queue
698 * @tx_queue: Efx TX queue
699 * @dma_addr: DMA address of fragment
700 * @len: Length of fragment
701 * @final_buffer: The final buffer inserted into the queue
703 * Push descriptors onto the TX queue. Return 0 on success or 1 if
706 static int efx_tx_queue_insert(struct efx_tx_queue *tx_queue,
707 dma_addr_t dma_addr, unsigned len,
708 struct efx_tx_buffer **final_buffer)
710 struct efx_tx_buffer *buffer;
711 struct efx_nic *efx = tx_queue->efx;
712 unsigned dma_len, fill_level, insert_ptr, misalign;
715 EFX_BUG_ON_PARANOID(len <= 0);
717 fill_level = tx_queue->insert_count - tx_queue->old_read_count;
718 /* -1 as there is no way to represent all descriptors used */
719 q_space = efx->type->txd_ring_mask - 1 - fill_level;
722 if (unlikely(q_space-- <= 0)) {
723 /* It might be that completions have happened
724 * since the xmit path last checked. Update
725 * the xmit path's copy of read_count.
728 /* This memory barrier protects the change of
729 * stopped from the access of read_count. */
731 tx_queue->old_read_count =
732 *(volatile unsigned *)&tx_queue->read_count;
733 fill_level = (tx_queue->insert_count
734 - tx_queue->old_read_count);
735 q_space = efx->type->txd_ring_mask - 1 - fill_level;
736 if (unlikely(q_space-- <= 0)) {
737 *final_buffer = NULL;
744 insert_ptr = tx_queue->insert_count & efx->type->txd_ring_mask;
745 buffer = &tx_queue->buffer[insert_ptr];
746 ++tx_queue->insert_count;
748 EFX_BUG_ON_PARANOID(tx_queue->insert_count -
749 tx_queue->read_count >
750 efx->type->txd_ring_mask);
752 efx_tsoh_free(tx_queue, buffer);
753 EFX_BUG_ON_PARANOID(buffer->len);
754 EFX_BUG_ON_PARANOID(buffer->unmap_len);
755 EFX_BUG_ON_PARANOID(buffer->skb);
756 EFX_BUG_ON_PARANOID(!buffer->continuation);
757 EFX_BUG_ON_PARANOID(buffer->tsoh);
759 buffer->dma_addr = dma_addr;
761 /* Ensure we do not cross a boundary unsupported by H/W */
762 dma_len = (~dma_addr & efx->type->tx_dma_mask) + 1;
764 misalign = (unsigned)dma_addr & efx->type->bug5391_mask;
765 if (misalign && dma_len + misalign > 512)
766 dma_len = 512 - misalign;
768 /* If there is enough space to send then do so */
772 buffer->len = dma_len; /* Don't set the other members */
777 EFX_BUG_ON_PARANOID(!len);
779 *final_buffer = buffer;
785 * Put a TSO header into the TX queue.
787 * This is special-cased because we know that it is small enough to fit in
788 * a single fragment, and we know it doesn't cross a page boundary. It
789 * also allows us to not worry about end-of-packet etc.
791 static void efx_tso_put_header(struct efx_tx_queue *tx_queue,
792 struct efx_tso_header *tsoh, unsigned len)
794 struct efx_tx_buffer *buffer;
796 buffer = &tx_queue->buffer[tx_queue->insert_count &
797 tx_queue->efx->type->txd_ring_mask];
798 efx_tsoh_free(tx_queue, buffer);
799 EFX_BUG_ON_PARANOID(buffer->len);
800 EFX_BUG_ON_PARANOID(buffer->unmap_len);
801 EFX_BUG_ON_PARANOID(buffer->skb);
802 EFX_BUG_ON_PARANOID(!buffer->continuation);
803 EFX_BUG_ON_PARANOID(buffer->tsoh);
805 buffer->dma_addr = tsoh->dma_addr;
808 ++tx_queue->insert_count;
812 /* Remove descriptors put into a tx_queue. */
813 static void efx_enqueue_unwind(struct efx_tx_queue *tx_queue)
815 struct efx_tx_buffer *buffer;
816 dma_addr_t unmap_addr;
818 /* Work backwards until we hit the original insert pointer value */
819 while (tx_queue->insert_count != tx_queue->write_count) {
820 --tx_queue->insert_count;
821 buffer = &tx_queue->buffer[tx_queue->insert_count &
822 tx_queue->efx->type->txd_ring_mask];
823 efx_tsoh_free(tx_queue, buffer);
824 EFX_BUG_ON_PARANOID(buffer->skb);
826 buffer->continuation = true;
827 if (buffer->unmap_len) {
828 unmap_addr = (buffer->dma_addr + buffer->len -
830 if (buffer->unmap_single)
831 pci_unmap_single(tx_queue->efx->pci_dev,
832 unmap_addr, buffer->unmap_len,
835 pci_unmap_page(tx_queue->efx->pci_dev,
836 unmap_addr, buffer->unmap_len,
838 buffer->unmap_len = 0;
844 /* Parse the SKB header and initialise state. */
845 static void tso_start(struct tso_state *st, const struct sk_buff *skb)
847 /* All ethernet/IP/TCP headers combined size is TCP header size
848 * plus offset of TCP header relative to start of packet.
850 st->header_len = ((tcp_hdr(skb)->doff << 2u)
851 + PTR_DIFF(tcp_hdr(skb), skb->data));
852 st->full_packet_size = st->header_len + skb_shinfo(skb)->gso_size;
854 st->ipv4_id = ntohs(ip_hdr(skb)->id);
855 st->seqnum = ntohl(tcp_hdr(skb)->seq);
857 EFX_BUG_ON_PARANOID(tcp_hdr(skb)->urg);
858 EFX_BUG_ON_PARANOID(tcp_hdr(skb)->syn);
859 EFX_BUG_ON_PARANOID(tcp_hdr(skb)->rst);
861 st->packet_space = st->full_packet_size;
862 st->out_len = skb->len - st->header_len;
864 st->unmap_single = false;
867 static int tso_get_fragment(struct tso_state *st, struct efx_nic *efx,
870 st->unmap_addr = pci_map_page(efx->pci_dev, frag->page,
871 frag->page_offset, frag->size,
873 if (likely(!pci_dma_mapping_error(efx->pci_dev, st->unmap_addr))) {
874 st->unmap_single = false;
875 st->unmap_len = frag->size;
876 st->in_len = frag->size;
877 st->dma_addr = st->unmap_addr;
883 static int tso_get_head_fragment(struct tso_state *st, struct efx_nic *efx,
884 const struct sk_buff *skb)
886 int hl = st->header_len;
887 int len = skb_headlen(skb) - hl;
889 st->unmap_addr = pci_map_single(efx->pci_dev, skb->data + hl,
890 len, PCI_DMA_TODEVICE);
891 if (likely(!pci_dma_mapping_error(efx->pci_dev, st->unmap_addr))) {
892 st->unmap_single = true;
895 st->dma_addr = st->unmap_addr;
903 * tso_fill_packet_with_fragment - form descriptors for the current fragment
904 * @tx_queue: Efx TX queue
905 * @skb: Socket buffer
908 * Form descriptors for the current fragment, until we reach the end
909 * of fragment or end-of-packet. Return 0 on success, 1 if not enough
910 * space in @tx_queue.
912 static int tso_fill_packet_with_fragment(struct efx_tx_queue *tx_queue,
913 const struct sk_buff *skb,
914 struct tso_state *st)
916 struct efx_tx_buffer *buffer;
917 int n, end_of_packet, rc;
921 if (st->packet_space == 0)
924 EFX_BUG_ON_PARANOID(st->in_len <= 0);
925 EFX_BUG_ON_PARANOID(st->packet_space <= 0);
927 n = min(st->in_len, st->packet_space);
929 st->packet_space -= n;
933 rc = efx_tx_queue_insert(tx_queue, st->dma_addr, n, &buffer);
934 if (likely(rc == 0)) {
935 if (st->out_len == 0)
936 /* Transfer ownership of the skb */
939 end_of_packet = st->out_len == 0 || st->packet_space == 0;
940 buffer->continuation = !end_of_packet;
942 if (st->in_len == 0) {
943 /* Transfer ownership of the pci mapping */
944 buffer->unmap_len = st->unmap_len;
945 buffer->unmap_single = st->unmap_single;
956 * tso_start_new_packet - generate a new header and prepare for the new packet
957 * @tx_queue: Efx TX queue
958 * @skb: Socket buffer
961 * Generate a new header and prepare for the new packet. Return 0 on
962 * success, or -1 if failed to alloc header.
964 static int tso_start_new_packet(struct efx_tx_queue *tx_queue,
965 const struct sk_buff *skb,
966 struct tso_state *st)
968 struct efx_tso_header *tsoh;
969 struct iphdr *tsoh_iph;
970 struct tcphdr *tsoh_th;
974 /* Allocate a DMA-mapped header buffer. */
975 if (likely(TSOH_SIZE(st->header_len) <= TSOH_STD_SIZE)) {
976 if (tx_queue->tso_headers_free == NULL) {
977 if (efx_tsoh_block_alloc(tx_queue))
980 EFX_BUG_ON_PARANOID(!tx_queue->tso_headers_free);
981 tsoh = tx_queue->tso_headers_free;
982 tx_queue->tso_headers_free = tsoh->next;
985 tx_queue->tso_long_headers++;
986 tsoh = efx_tsoh_heap_alloc(tx_queue, st->header_len);
991 header = TSOH_BUFFER(tsoh);
992 tsoh_th = (struct tcphdr *)(header + SKB_TCP_OFF(skb));
993 tsoh_iph = (struct iphdr *)(header + SKB_IPV4_OFF(skb));
995 /* Copy and update the headers. */
996 memcpy(header, skb->data, st->header_len);
998 tsoh_th->seq = htonl(st->seqnum);
999 st->seqnum += skb_shinfo(skb)->gso_size;
1000 if (st->out_len > skb_shinfo(skb)->gso_size) {
1001 /* This packet will not finish the TSO burst. */
1002 ip_length = st->full_packet_size - ETH_HDR_LEN(skb);
1006 /* This packet will be the last in the TSO burst. */
1007 ip_length = st->header_len - ETH_HDR_LEN(skb) + st->out_len;
1008 tsoh_th->fin = tcp_hdr(skb)->fin;
1009 tsoh_th->psh = tcp_hdr(skb)->psh;
1011 tsoh_iph->tot_len = htons(ip_length);
1013 /* Linux leaves suitable gaps in the IP ID space for us to fill. */
1014 tsoh_iph->id = htons(st->ipv4_id);
1017 st->packet_space = skb_shinfo(skb)->gso_size;
1018 ++tx_queue->tso_packets;
1020 /* Form a descriptor for this header. */
1021 efx_tso_put_header(tx_queue, tsoh, st->header_len);
1028 * efx_enqueue_skb_tso - segment and transmit a TSO socket buffer
1029 * @tx_queue: Efx TX queue
1030 * @skb: Socket buffer
1032 * Context: You must hold netif_tx_lock() to call this function.
1034 * Add socket buffer @skb to @tx_queue, doing TSO or return != 0 if
1035 * @skb was not enqueued. In all cases @skb is consumed. Return
1036 * %NETDEV_TX_OK or %NETDEV_TX_BUSY.
1038 static int efx_enqueue_skb_tso(struct efx_tx_queue *tx_queue,
1039 struct sk_buff *skb)
1041 struct efx_nic *efx = tx_queue->efx;
1042 int frag_i, rc, rc2 = NETDEV_TX_OK;
1043 struct tso_state state;
1045 /* Verify TSO is safe - these checks should never fail. */
1046 efx_tso_check_safe(skb);
1048 EFX_BUG_ON_PARANOID(tx_queue->write_count != tx_queue->insert_count);
1050 tso_start(&state, skb);
1052 /* Assume that skb header area contains exactly the headers, and
1053 * all payload is in the frag list.
1055 if (skb_headlen(skb) == state.header_len) {
1056 /* Grab the first payload fragment. */
1057 EFX_BUG_ON_PARANOID(skb_shinfo(skb)->nr_frags < 1);
1059 rc = tso_get_fragment(&state, efx,
1060 skb_shinfo(skb)->frags + frag_i);
1064 rc = tso_get_head_fragment(&state, efx, skb);
1070 if (tso_start_new_packet(tx_queue, skb, &state) < 0)
1074 rc = tso_fill_packet_with_fragment(tx_queue, skb, &state);
1078 /* Move onto the next fragment? */
1079 if (state.in_len == 0) {
1080 if (++frag_i >= skb_shinfo(skb)->nr_frags)
1081 /* End of payload reached. */
1083 rc = tso_get_fragment(&state, efx,
1084 skb_shinfo(skb)->frags + frag_i);
1089 /* Start at new packet? */
1090 if (state.packet_space == 0 &&
1091 tso_start_new_packet(tx_queue, skb, &state) < 0)
1095 /* Pass off to hardware */
1096 falcon_push_buffers(tx_queue);
1098 tx_queue->tso_bursts++;
1099 return NETDEV_TX_OK;
1102 EFX_ERR(efx, "Out of memory for TSO headers, or PCI mapping error\n");
1103 dev_kfree_skb_any((struct sk_buff *)skb);
1107 rc2 = NETDEV_TX_BUSY;
1109 /* Stop the queue if it wasn't stopped before. */
1110 if (tx_queue->stopped == 1)
1111 efx_stop_queue(efx);
1114 /* Free the DMA mapping we were in the process of writing out */
1115 if (state.unmap_len) {
1116 if (state.unmap_single)
1117 pci_unmap_single(efx->pci_dev, state.unmap_addr,
1118 state.unmap_len, PCI_DMA_TODEVICE);
1120 pci_unmap_page(efx->pci_dev, state.unmap_addr,
1121 state.unmap_len, PCI_DMA_TODEVICE);
1124 efx_enqueue_unwind(tx_queue);
1130 * Free up all TSO datastructures associated with tx_queue. This
1131 * routine should be called only once the tx_queue is both empty and
1132 * will no longer be used.
1134 static void efx_fini_tso(struct efx_tx_queue *tx_queue)
1138 if (tx_queue->buffer) {
1139 for (i = 0; i <= tx_queue->efx->type->txd_ring_mask; ++i)
1140 efx_tsoh_free(tx_queue, &tx_queue->buffer[i]);
1143 while (tx_queue->tso_headers_free != NULL)
1144 efx_tsoh_block_free(tx_queue, tx_queue->tso_headers_free,
1145 tx_queue->efx->pci_dev);