2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
9 #include <linux/config.h>
15 * This file essentially defines the interface between board
16 * specific PCI code and MIPS common PCI code. Should potentially put
17 * into include/asm/pci.h file.
20 #include <linux/ioport.h>
23 * Each pci channel is a top-level PCI bus seem by CPU. A machine with
24 * multiple PCI channels may have multiple PCI host controllers or a
25 * single controller supporting multiple channels.
27 struct pci_controller {
28 struct pci_controller *next;
31 struct pci_ops *pci_ops;
32 struct resource *mem_resource;
33 unsigned long mem_offset;
34 struct resource *io_resource;
35 unsigned long io_offset;
38 /* For compatibility with current (as of July 2003) pciutils
39 and XFree86. Eventually will be removed. */
40 unsigned int need_domain_info;
46 * Used by boards to register their PCI busses before the actual scanning.
48 extern struct pci_controller * alloc_pci_controller(void);
49 extern void register_pci_controller(struct pci_controller *hose);
52 * board supplied pci irq fixup routine
54 extern int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin);
57 /* Can be used to override the logic in pci_scan_bus for skipping
58 already-configured bus numbers - to be used for buggy BIOSes
59 or architectures with incomplete PCI setup by the loader */
61 extern unsigned int pcibios_assign_all_busses(void);
63 #define pcibios_scan_all_fns(a, b) 0
65 extern unsigned long PCIBIOS_MIN_IO;
66 extern unsigned long PCIBIOS_MIN_MEM;
68 #define PCIBIOS_MIN_CARDBUS_IO 0x4000
70 extern void pcibios_set_master(struct pci_dev *dev);
72 static inline void pcibios_penalize_isa_irq(int irq, int active)
74 /* We don't do dynamic PCI IRQ allocation */
78 * Dynamic DMA mapping stuff.
79 * MIPS has everything mapped statically.
82 #include <linux/types.h>
83 #include <linux/slab.h>
84 #include <asm/scatterlist.h>
85 #include <linux/string.h>
91 * The PCI address space does equal the physical memory address space. The
92 * networking and block device layers use this boolean for bounce buffer
93 * decisions. This is set if any hose does not have an IOMMU.
95 extern unsigned int PCI_DMA_BUS_IS_PHYS;
97 #ifdef CONFIG_DMA_NEED_PCI_MAP_STATE
99 /* pci_unmap_{single,page} is not a nop, thus... */
100 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
101 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME;
102 #define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
103 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
104 #define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
105 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
107 #else /* CONFIG_DMA_NEED_PCI_MAP_STATE */
109 /* pci_unmap_{page,single} is a nop so... */
110 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
111 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
112 #define pci_unmap_addr(PTR, ADDR_NAME) (0)
113 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
114 #define pci_unmap_len(PTR, LEN_NAME) (0)
115 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
117 #endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */
119 /* This is always fine. */
120 #define pci_dac_dma_supported(pci_dev, mask) (1)
122 extern dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
123 struct page *page, unsigned long offset, int direction);
124 extern struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
125 dma64_addr_t dma_addr);
126 extern unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
127 dma64_addr_t dma_addr);
128 extern void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev,
129 dma64_addr_t dma_addr, size_t len, int direction);
130 extern void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev,
131 dma64_addr_t dma_addr, size_t len, int direction);
134 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
135 enum pci_dma_burst_strategy *strat,
136 unsigned long *strategy_parameter)
138 *strat = PCI_DMA_BURST_INFINITY;
139 *strategy_parameter = ~0UL;
143 extern void pcibios_resource_to_bus(struct pci_dev *dev,
144 struct pci_bus_region *region, struct resource *res);
145 extern void pcibios_bus_to_resource(struct pci_dev *dev,
146 struct resource *res, struct pci_bus_region *region);
148 #ifdef CONFIG_PCI_DOMAINS
150 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
152 static inline int pci_proc_domain(struct pci_bus *bus)
154 struct pci_controller *hose = bus->sysdata;
155 return hose->need_domain_info;
158 #endif /* CONFIG_PCI_DOMAINS */
160 #endif /* __KERNEL__ */
162 /* implement the pci_ DMA API in terms of the generic device dma_ one */
163 #include <asm-generic/pci-dma-compat.h>
165 static inline void pcibios_add_platform_entries(struct pci_dev *dev)
169 /* Do platform specific device initialization at pci_enable_device() time */
170 extern int pcibios_plat_dev_init(struct pci_dev *dev);
172 static inline struct resource *
173 pcibios_select_root(struct pci_dev *pdev, struct resource *res)
175 struct resource *root = NULL;
177 if (res->flags & IORESOURCE_IO)
178 root = &ioport_resource;
179 if (res->flags & IORESOURCE_MEM)
180 root = &iomem_resource;
185 #endif /* _ASM_PCI_H */