2 * arch/s390/kernel/entry64.S
3 * S390 low-level entry points.
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/init.h>
15 #include <asm/cache.h>
16 #include <asm/lowcore.h>
17 #include <asm/errno.h>
18 #include <asm/ptrace.h>
19 #include <asm/thread_info.h>
20 #include <asm/asm-offsets.h>
21 #include <asm/unistd.h>
25 * Stack layout for the system_call stack entry.
26 * The first few entries are identical to the user_regs_struct.
28 SP_PTREGS = STACK_FRAME_OVERHEAD
29 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
30 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
31 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
32 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
34 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
35 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
36 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
37 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
38 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
39 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
40 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
41 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
42 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
43 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
44 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
45 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
46 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
47 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
48 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
49 SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
50 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
52 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
53 STACK_SIZE = 1 << STACK_SHIFT
55 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
56 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
57 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
60 #define BASED(name) name-system_call(%r13)
62 #ifdef CONFIG_TRACE_IRQFLAGS
65 brasl %r14,trace_hardirqs_on_caller
70 brasl %r14,trace_hardirqs_off_caller
73 .macro TRACE_IRQS_CHECK
75 tm SP_PSW(%r15),0x03 # irqs enabled?
77 brasl %r14,trace_hardirqs_on_caller
79 0: brasl %r14,trace_hardirqs_off_caller
84 #define TRACE_IRQS_OFF
85 #define TRACE_IRQS_CHECK
89 .macro LOCKDEP_SYS_EXIT
90 tm SP_PSW+1(%r15),0x01 # returning to user ?
92 brasl %r14,lockdep_sys_exit
96 #define LOCKDEP_SYS_EXIT
99 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
107 * Register usage in interrupt handlers:
108 * R9 - pointer to current task structure
109 * R13 - pointer to literal pool
110 * R14 - return register for function calls
111 * R15 - kernel stack pointer
114 .macro SAVE_ALL_BASE savearea
115 stmg %r12,%r15,\savearea
116 larl %r13,system_call
119 .macro SAVE_ALL_SVC psworg,savearea
121 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
124 .macro SAVE_ALL_SYNC psworg,savearea
126 tm \psworg+1,0x01 # test problem state bit
127 jz 2f # skip stack setup save
128 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
129 #ifdef CONFIG_CHECK_STACK
131 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
138 .macro SAVE_ALL_ASYNC psworg,savearea
140 tm \psworg+1,0x01 # test problem state bit
141 jnz 1f # from user -> load kernel stack
142 clc \psworg+8(8),BASED(.Lcritical_end)
144 clc \psworg+8(8),BASED(.Lcritical_start)
146 brasl %r14,cleanup_critical
147 tm 1(%r12),0x01 # retest problem state after cleanup
149 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
151 srag %r14,%r14,STACK_SHIFT
153 1: lg %r15,__LC_ASYNC_STACK # load async stack
154 #ifdef CONFIG_CHECK_STACK
156 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
163 .macro CREATE_STACK_FRAME psworg,savearea
164 aghi %r15,-SP_SIZE # make room for registers & psw
165 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
166 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
167 icm %r12,3,__LC_SVC_ILC
168 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
169 st %r12,SP_SVCNR(%r15)
170 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
172 stg %r12,__SF_BACKCHAIN(%r15)
175 .macro RESTORE_ALL psworg,sync
176 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
178 ni \psworg+1,0xfd # clear wait state bit
180 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
182 lpswe \psworg # back to caller
186 * Scheduler resume function, called by switch_to
187 * gpr2 = (task_struct *) prev
188 * gpr3 = (task_struct *) next
194 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
195 jz __switch_to_noper # if not we're fine
196 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
197 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
198 je __switch_to_noper # we got away without bashing TLB's
199 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
201 lg %r4,__THREAD_info(%r2) # get thread_info of prev
202 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
203 jz __switch_to_no_mcck
204 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
205 lg %r4,__THREAD_info(%r3) # get thread_info of next
206 oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
208 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
209 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
210 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
211 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
212 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
213 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
214 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
215 stg %r3,__LC_THREAD_INFO
217 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
222 * SVC interrupt handler routine. System calls are synchronous events and
223 * are executed with interrupts enabled.
228 stpt __LC_SYNC_ENTER_TIMER
230 SAVE_ALL_BASE __LC_SAVE_AREA
231 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
232 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
233 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
235 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
237 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
239 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
241 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
242 ltgr %r7,%r7 # test for svc 0
244 # svc 0: system call number in %r1
245 cl %r1,BASED(.Lnr_syscalls)
247 lgfr %r7,%r1 # clear high word in r1
249 mvc SP_ARGS(8,%r15),SP_R7(%r15)
251 sth %r7,SP_SVCNR(%r15)
252 sllg %r7,%r7,2 # svc number * 4
253 larl %r10,sys_call_table
255 tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
257 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
260 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
261 lgf %r8,0(%r7,%r10) # load address of system call routine
263 basr %r14,%r8 # call sys_xxxx
264 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
267 tm __TI_flags+7(%r9),_TIF_WORK_SVC
268 jnz sysc_work # there is work to do (signals etc.)
270 #ifdef CONFIG_TRACE_IRQFLAGS
271 larl %r1,sysc_restore_trace_psw
278 RESTORE_ALL __LC_RETURN_PSW,1
281 #ifdef CONFIG_TRACE_IRQFLAGS
283 .globl sysc_restore_trace_psw
284 sysc_restore_trace_psw:
285 .quad 0, sysc_restore_trace
289 # recheck if there is more work to do
292 tm __TI_flags+7(%r9),_TIF_WORK_SVC
293 jz sysc_restore # there is no work to do
295 # One of the work bits is on. Find out which one.
298 tm SP_PSW+1(%r15),0x01 # returning to user ?
300 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
302 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
304 tm __TI_flags+7(%r9),_TIF_SIGPENDING
306 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
307 jnz sysc_notify_resume
308 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
310 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
316 # _TIF_NEED_RESCHED is set, call schedule
319 larl %r14,sysc_work_loop
320 jg schedule # return point is sysc_return
323 # _TIF_MCCK_PENDING is set, call handler
326 larl %r14,sysc_work_loop
327 jg s390_handle_mcck # TIF bit will be cleared by handler
330 # _TIF_SIGPENDING is set, call do_signal
333 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
334 la %r2,SP_PTREGS(%r15) # load pt_regs
335 brasl %r14,do_signal # call do_signal
336 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
338 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
343 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
346 la %r2,SP_PTREGS(%r15) # load pt_regs
347 larl %r14,sysc_work_loop
348 jg do_notify_resume # call do_notify_resume
351 # _TIF_RESTART_SVC is set, set up registers and restart svc
354 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
355 lg %r7,SP_R2(%r15) # load new svc number
356 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
357 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
358 j sysc_do_restart # restart svc
361 # _TIF_SINGLE_STEP is set, call do_single_step
364 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
365 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
366 la %r2,SP_PTREGS(%r15) # address of register-save area
367 larl %r14,sysc_return # load adr. of system return
368 jg do_single_step # branch to do_sigtrap
371 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
372 # and after the system call
375 la %r2,SP_PTREGS(%r15) # load pt_regs
379 brasl %r14,do_syscall_trace_enter
383 sllg %r7,%r2,2 # svc number *4
386 lmg %r3,%r6,SP_R3(%r15)
387 lg %r2,SP_ORIG_R2(%r15)
388 basr %r14,%r8 # call sys_xxx
389 stg %r2,SP_R2(%r15) # store return value
391 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
393 la %r2,SP_PTREGS(%r15) # load pt_regs
394 larl %r14,sysc_return # return point is sysc_return
395 jg do_syscall_trace_exit
398 # a new process exits the kernel with ret_from_fork
402 lg %r13,__LC_SVC_NEW_PSW+8
403 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
404 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
406 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
407 0: brasl %r14,schedule_tail
409 stosm 24(%r15),0x03 # reenable interrupts
413 # kernel_execve function needs to deal with pt_regs that is not
418 stmg %r12,%r15,96(%r15)
421 stg %r14,__SF_BACKCHAIN(%r15)
422 la %r12,SP_PTREGS(%r15)
423 xc 0(__PT_SIZE,%r12),0(%r12)
429 lmg %r12,%r15,96(%r15)
432 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
433 lg %r15,__LC_KERNEL_STACK # load ksp
434 aghi %r15,-SP_SIZE # make room for registers & psw
435 lg %r13,__LC_SVC_NEW_PSW+8
436 lg %r9,__LC_THREAD_INFO
437 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
438 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
439 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
440 brasl %r14,execve_tail
444 * Program check handler routine
447 .globl pgm_check_handler
450 * First we need to check for a special case:
451 * Single stepping an instruction that disables the PER event mask will
452 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
453 * For a single stepped SVC the program check handler gets control after
454 * the SVC new PSW has been loaded. But we want to execute the SVC first and
455 * then handle the PER event. Therefore we update the SVC old PSW to point
456 * to the pgm_check_handler and branch to the SVC handler after we checked
457 * if we have to load the kernel stack register.
458 * For every other possible cause for PER event without the PER mask set
459 * we just ignore the PER event (FIXME: is there anything we have to do
462 stpt __LC_SYNC_ENTER_TIMER
463 SAVE_ALL_BASE __LC_SAVE_AREA
464 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
465 jnz pgm_per # got per exception -> special case
466 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
467 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
468 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
470 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
471 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
472 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
474 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
475 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
477 lgf %r3,__LC_PGM_ILC # load program interruption code
482 larl %r1,pgm_check_table
483 lg %r1,0(%r8,%r1) # load address of handler routine
484 la %r2,SP_PTREGS(%r15) # address of register-save area
485 larl %r14,sysc_return
486 br %r1 # branch to interrupt-handler
489 # handle per exception
492 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
493 jnz pgm_per_std # ok, normal per event from user space
494 # ok its one of the special cases, now we need to find out which one
495 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
497 # no interesting special case, ignore PER event
498 lmg %r12,%r15,__LC_SAVE_AREA
499 lpswe __LC_PGM_OLD_PSW
502 # Normal per exception
505 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
506 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
507 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
509 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
510 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
511 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
513 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
515 lg %r1,__TI_task(%r9)
516 tm SP_PSW+1(%r15),0x01 # kernel per event ?
518 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
519 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
520 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
521 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
522 lgf %r3,__LC_PGM_ILC # load program interruption code
524 ngr %r8,%r3 # clear per-event-bit and ilc
529 # it was a single stepped SVC that is causing all the trouble
532 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
533 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
534 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
535 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
536 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
537 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
538 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
539 lg %r1,__TI_task(%r9)
540 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
541 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
542 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
543 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
545 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
549 # per was called from kernel, must be kprobes
552 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
553 la %r2,SP_PTREGS(%r15) # address of register-save area
554 larl %r14,sysc_restore # load adr. of system ret, no work
555 jg do_single_step # branch to do_single_step
558 * IO interrupt handler routine
560 .globl io_int_handler
562 stpt __LC_ASYNC_ENTER_TIMER
564 SAVE_ALL_BASE __LC_SAVE_AREA+32
565 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
566 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
567 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
569 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
570 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
571 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
573 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
575 la %r2,SP_PTREGS(%r15) # address of register-save area
576 brasl %r14,do_IRQ # call standard irq handler
578 tm __TI_flags+7(%r9),_TIF_WORK_INT
579 jnz io_work # there is work to do (signals etc.)
581 #ifdef CONFIG_TRACE_IRQFLAGS
582 larl %r1,io_restore_trace_psw
589 RESTORE_ALL __LC_RETURN_PSW,0
592 #ifdef CONFIG_TRACE_IRQFLAGS
594 .globl io_restore_trace_psw
595 io_restore_trace_psw:
596 .quad 0, io_restore_trace
600 # There is work todo, we need to check if we return to userspace, then
601 # check, if we are in SIE, if yes leave it
604 tm SP_PSW+1(%r15),0x01 # returning to user ?
605 #ifndef CONFIG_PREEMPT
606 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
607 jnz io_work_user # yes -> no need to check for SIE
608 la %r1, BASED(sie_opcode) # we return to kernel here
609 lg %r2, SP_PSW+8(%r15)
610 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
611 jne io_restore # no-> return to kernel
612 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
614 stg %r1, SP_PSW+8(%r15)
615 j io_restore # return to kernel
617 jno io_restore # no-> skip resched & signal
620 jnz io_work_user # yes -> do resched & signal
621 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
622 la %r1, BASED(sie_opcode)
623 lg %r2, SP_PSW+8(%r15)
624 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
625 jne 0f # no -> leave PSW alone
626 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
628 stg %r1, SP_PSW+8(%r15)
631 # check for preemptive scheduling
632 icm %r0,15,__TI_precount(%r9)
633 jnz io_restore # preemption is disabled
634 # switch to kernel stack
637 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
638 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
641 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
643 larl %r14,io_resume_loop
644 jg preempt_schedule_irq
648 lg %r1,__LC_KERNEL_STACK
650 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
651 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
654 # One of the work bits is on. Find out which one.
655 # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED
656 # and _TIF_MCCK_PENDING
659 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
661 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
663 tm __TI_flags+7(%r9),_TIF_SIGPENDING
665 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
670 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
676 # _TIF_MCCK_PENDING is set, call handler
679 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
683 # _TIF_NEED_RESCHED is set, call schedule
687 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
688 brasl %r14,schedule # call scheduler
689 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
691 tm __TI_flags+7(%r9),_TIF_WORK_INT
692 jz io_restore # there is no work to do
696 # _TIF_SIGPENDING or is set, call do_signal
700 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
701 la %r2,SP_PTREGS(%r15) # load pt_regs
702 brasl %r14,do_signal # call do_signal
703 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
708 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
712 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
713 la %r2,SP_PTREGS(%r15) # load pt_regs
714 brasl %r14,do_notify_resume # call do_notify_resume
715 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
720 * External interrupt handler routine
722 .globl ext_int_handler
724 stpt __LC_ASYNC_ENTER_TIMER
726 SAVE_ALL_BASE __LC_SAVE_AREA+32
727 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
728 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
729 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
731 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
732 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
733 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
735 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
737 la %r2,SP_PTREGS(%r15) # address of register-save area
738 llgh %r3,__LC_EXT_INT_CODE # get interruption code
745 * Machine check handler routines
747 .globl mcck_int_handler
749 la %r1,4095 # revalidate r1
750 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
751 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
752 SAVE_ALL_BASE __LC_SAVE_AREA+64
753 la %r12,__LC_MCK_OLD_PSW
754 tm __LC_MCCK_CODE,0x80 # system damage?
755 jo mcck_int_main # yes -> rest of mcck code invalid
757 mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
758 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
759 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
761 la %r14,__LC_SYNC_ENTER_TIMER
762 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
764 la %r14,__LC_ASYNC_ENTER_TIMER
765 0: clc 0(8,%r14),__LC_EXIT_TIMER
767 la %r14,__LC_EXIT_TIMER
768 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
770 la %r14,__LC_LAST_UPDATE_TIMER
772 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
773 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
774 jno mcck_int_main # no -> skip cleanup critical
775 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
776 jnz mcck_int_main # from user -> load kernel stack
777 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
779 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
781 brasl %r14,cleanup_critical
783 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
785 srag %r14,%r14,PAGE_SHIFT
787 lg %r15,__LC_PANIC_STACK # load panic stack
788 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
789 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
790 jno mcck_no_vtime # no -> no timer update
791 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
793 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
794 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
795 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
797 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
798 la %r2,SP_PTREGS(%r15) # load pt_regs
799 brasl %r14,s390_do_machine_check
800 tm SP_PSW+1(%r15),0x01 # returning to user ?
802 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
804 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
805 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
807 stosm __SF_EMPTY(%r15),0x04 # turn dat on
808 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
811 brasl %r14,s390_handle_mcck
814 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
815 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
816 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
817 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
818 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
821 0: lpswe __LC_RETURN_MCCK_PSW # back to caller
824 * Restart interruption handler, kick starter for additional CPUs
828 .globl restart_int_handler
830 lg %r15,__LC_SAVE_AREA+120 # load ksp
831 lghi %r10,__LC_CREGS_SAVE_AREA
832 lctlg %c0,%c15,0(%r10) # get new ctl regs
833 lghi %r10,__LC_AREGS_SAVE_AREA
835 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
836 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
841 * If we do not run with SMP enabled, let the new CPU crash ...
843 .globl restart_int_handler
847 lpswe restart_crash-restart_base(%r1)
850 .long 0x000a0000,0x00000000,0x00000000,0x00000000
854 #ifdef CONFIG_CHECK_STACK
856 * The synchronous or the asynchronous stack overflowed. We are dead.
857 * No need to properly save the registers, we are going to panic anyway.
858 * Setup a pt_regs so that show_trace can provide a good call trace.
861 lg %r15,__LC_PANIC_STACK # change to panic stack
863 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
864 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
865 la %r1,__LC_SAVE_AREA
866 chi %r12,__LC_SVC_OLD_PSW
868 chi %r12,__LC_PGM_OLD_PSW
870 la %r1,__LC_SAVE_AREA+32
871 0: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
872 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
873 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
874 la %r2,SP_PTREGS(%r15) # load pt_regs
875 jg kernel_stack_overflow
878 cleanup_table_system_call:
879 .quad system_call, sysc_do_svc
880 cleanup_table_sysc_return:
881 .quad sysc_return, sysc_leave
882 cleanup_table_sysc_leave:
883 .quad sysc_leave, sysc_done
884 cleanup_table_sysc_work_loop:
885 .quad sysc_work_loop, sysc_work_done
886 cleanup_table_io_return:
887 .quad io_return, io_leave
888 cleanup_table_io_leave:
889 .quad io_leave, io_done
890 cleanup_table_io_work_loop:
891 .quad io_work_loop, io_work_done
894 clc 8(8,%r12),BASED(cleanup_table_system_call)
896 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
897 jl cleanup_system_call
899 clc 8(8,%r12),BASED(cleanup_table_sysc_return)
901 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
902 jl cleanup_sysc_return
904 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
906 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
907 jl cleanup_sysc_leave
909 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
911 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
912 jl cleanup_sysc_return
914 clc 8(8,%r12),BASED(cleanup_table_io_return)
916 clc 8(8,%r12),BASED(cleanup_table_io_return+8)
919 clc 8(8,%r12),BASED(cleanup_table_io_leave)
921 clc 8(8,%r12),BASED(cleanup_table_io_leave+8)
924 clc 8(8,%r12),BASED(cleanup_table_io_work_loop)
926 clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8)
932 mvc __LC_RETURN_PSW(16),0(%r12)
933 cghi %r12,__LC_MCK_OLD_PSW
935 la %r12,__LC_SAVE_AREA+32
937 0: la %r12,__LC_SAVE_AREA+64
939 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
941 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
942 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
944 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
946 mvc __LC_SAVE_AREA(32),0(%r12)
948 stg %r12,__LC_SAVE_AREA+96 # argh
949 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
950 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
951 lg %r12,__LC_SAVE_AREA+96 # argh
953 llgh %r7,__LC_SVC_INT_CODE
955 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
957 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
959 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
961 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
963 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
964 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
965 la %r12,__LC_RETURN_PSW
967 cleanup_system_call_insn:
975 mvc __LC_RETURN_PSW(8),0(%r12)
976 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
977 la %r12,__LC_RETURN_PSW
981 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
983 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
984 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
986 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
987 cghi %r12,__LC_MCK_OLD_PSW
989 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
991 0: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
992 1: lmg %r0,%r11,SP_R0(%r15)
994 2: la %r12,__LC_RETURN_PSW
996 cleanup_sysc_leave_insn:
1001 mvc __LC_RETURN_PSW(8),0(%r12)
1002 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
1003 la %r12,__LC_RETURN_PSW
1007 clc 8(8,%r12),BASED(cleanup_io_leave_insn)
1009 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1010 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
1012 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1013 cghi %r12,__LC_MCK_OLD_PSW
1015 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
1017 0: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
1018 1: lmg %r0,%r11,SP_R0(%r15)
1019 lg %r15,SP_R15(%r15)
1020 2: la %r12,__LC_RETURN_PSW
1022 cleanup_io_leave_insn:
1031 .Lnr_syscalls: .long NR_syscalls
1032 .L0x0130: .short 0x130
1033 .L0x0140: .short 0x140
1034 .L0x0150: .short 0x150
1035 .L0x0160: .short 0x160
1036 .L0x0170: .short 0x170
1038 .quad __critical_start
1040 .quad __critical_end
1042 .section .rodata, "a"
1043 #define SYSCALL(esa,esame,emu) .long esame
1045 #include "syscalls.S"
1048 #ifdef CONFIG_COMPAT
1050 #define SYSCALL(esa,esame,emu) .long emu
1052 #include "syscalls.S"