4 * Derived from ivtv-gpio.c
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
24 #include "cx18-driver.h"
26 #include "cx18-cards.h"
27 #include "cx18-gpio.h"
28 #include "tuner-xc2028.h"
30 /********************* GPIO stuffs *********************/
33 #define CX18_REG_GPIO_IN 0xc72010
34 #define CX18_REG_GPIO_OUT1 0xc78100
35 #define CX18_REG_GPIO_DIR1 0xc78108
36 #define CX18_REG_GPIO_OUT2 0xc78104
37 #define CX18_REG_GPIO_DIR2 0xc7810c
40 * HVR-1600 GPIO pins, courtesy of Hauppauge:
42 * gpio0: zilog ir process reset pin
43 * gpio1: zilog programming pin (you should never use this)
44 * gpio12: cx24227 reset pin
45 * gpio13: cs5345 reset pin
48 static void gpio_write(struct cx18 *cx)
50 u32 dir = cx->gpio_dir;
51 u32 val = cx->gpio_val;
53 cx18_write_reg(cx, (dir & 0xffff) << 16, CX18_REG_GPIO_DIR1);
54 cx18_write_reg(cx, ((dir & 0xffff) << 16) | (val & 0xffff),
56 cx18_write_reg(cx, dir & 0xffff0000, CX18_REG_GPIO_DIR2);
57 cx18_write_reg_sync(cx, (dir & 0xffff0000) | ((val & 0xffff0000) >> 16),
61 void cx18_reset_i2c_slaves_gpio(struct cx18 *cx)
63 const struct cx18_gpio_i2c_slave_reset *p;
65 p = &cx->card->gpio_i2c_slave_reset;
67 if ((p->active_lo_mask | p->active_hi_mask) == 0)
70 /* Assuming that the masks are a subset of the bits in gpio_dir */
73 mutex_lock(&cx->gpio_lock);
75 (cx->gpio_val | p->active_hi_mask) & ~(p->active_lo_mask);
77 schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_asserted));
81 (cx->gpio_val | p->active_lo_mask) & ~(p->active_hi_mask);
83 schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_recovery));
84 mutex_unlock(&cx->gpio_lock);
87 void cx18_reset_ir_gpio(void *data)
89 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
90 const struct cx18_gpio_i2c_slave_reset *p;
92 p = &cx->card->gpio_i2c_slave_reset;
94 if (p->ir_reset_mask == 0)
97 CX18_DEBUG_INFO("Resetting IR microcontroller\n");
100 Assert timing for the Z8F0811 on HVR-1600 boards:
101 1. Assert RESET for min of 4 clock cycles at 18.432 MHz to initiate
102 2. Reset then takes 66 WDT cycles at 10 kHz + 16 xtal clock cycles
103 (6,601,085 nanoseconds ~= 7 milliseconds)
104 3. DBG pin must be high before chip exits reset for normal operation.
105 DBG is open drain and hopefully pulled high since we don't
106 normally drive it (GPIO 1?) for the HVR-1600
107 4. Z8F0811 won't exit reset until RESET is deasserted
109 mutex_lock(&cx->gpio_lock);
110 cx->gpio_val = cx->gpio_val & ~p->ir_reset_mask;
112 mutex_unlock(&cx->gpio_lock);
113 schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_asserted));
116 Zilog comes out of reset, loads reset vector address and executes
117 from there. Required recovery delay unknown.
119 mutex_lock(&cx->gpio_lock);
120 cx->gpio_val = cx->gpio_val | p->ir_reset_mask;
122 mutex_unlock(&cx->gpio_lock);
123 schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_recovery));
125 EXPORT_SYMBOL(cx18_reset_ir_gpio);
126 /* This symbol is exported for use by an infrared module for the IR-blaster */
128 void cx18_gpio_init(struct cx18 *cx)
130 mutex_lock(&cx->gpio_lock);
131 cx->gpio_dir = cx->card->gpio_init.direction;
132 cx->gpio_val = cx->card->gpio_init.initial_value;
134 if (cx->card->tuners[0].tuner == TUNER_XC2028) {
135 cx->gpio_dir |= 1 << cx->card->xceive_pin;
136 cx->gpio_val |= 1 << cx->card->xceive_pin;
139 if (cx->gpio_dir == 0) {
140 mutex_unlock(&cx->gpio_lock);
144 CX18_DEBUG_INFO("GPIO initial dir: %08x/%08x out: %08x/%08x\n",
145 cx18_read_reg(cx, CX18_REG_GPIO_DIR1),
146 cx18_read_reg(cx, CX18_REG_GPIO_DIR2),
147 cx18_read_reg(cx, CX18_REG_GPIO_OUT1),
148 cx18_read_reg(cx, CX18_REG_GPIO_OUT2));
151 mutex_unlock(&cx->gpio_lock);
154 /* Xceive tuner reset function */
155 int cx18_reset_tuner_gpio(void *dev, int component, int cmd, int value)
157 struct i2c_algo_bit_data *algo = dev;
158 struct cx18_i2c_algo_callback_data *cb_data = algo->data;
159 struct cx18 *cx = cb_data->cx;
161 if (cmd != XC2028_TUNER_RESET)
163 CX18_DEBUG_INFO("Resetting tuner\n");
165 mutex_lock(&cx->gpio_lock);
166 cx->gpio_val &= ~(1 << cx->card->xceive_pin);
168 mutex_unlock(&cx->gpio_lock);
169 schedule_timeout_interruptible(msecs_to_jiffies(1));
171 mutex_lock(&cx->gpio_lock);
172 cx->gpio_val |= 1 << cx->card->xceive_pin;
174 mutex_unlock(&cx->gpio_lock);
175 schedule_timeout_interruptible(msecs_to_jiffies(1));
179 int cx18_gpio(struct cx18 *cx, unsigned int command, void *arg)
181 struct v4l2_routing *route = arg;
185 case VIDIOC_INT_S_AUDIO_ROUTING:
186 if (route->input > 2)
188 mask = cx->card->gpio_audio_input.mask;
189 switch (route->input) {
191 data = cx->card->gpio_audio_input.tuner;
194 data = cx->card->gpio_audio_input.linein;
198 data = cx->card->gpio_audio_input.radio;
207 mutex_lock(&cx->gpio_lock);
208 cx->gpio_val = (cx->gpio_val & ~mask) | (data & mask);
210 mutex_unlock(&cx->gpio_lock);