2 * Xilinx SystemACE device driver
4 * Copyright 2007 Secret Lab Technologies Ltd.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
12 * The SystemACE chip is designed to configure FPGAs by loading an FPGA
13 * bitstream from a file on a CF card and squirting it into FPGAs connected
14 * to the SystemACE JTAG chain. It also has the advantage of providing an
15 * MPU interface which can be used to control the FPGA configuration process
16 * and to use the attached CF card for general purpose storage.
18 * This driver is a block device driver for the SystemACE.
21 * The driver registers itself as a platform_device driver at module
22 * load time. The platform bus will take care of calling the
23 * ace_probe() method for all SystemACE instances in the system. Any
24 * number of SystemACE instances are supported. ace_probe() calls
25 * ace_setup() which initialized all data structures, reads the CF
26 * id structure and registers the device.
29 * Just about all of the heavy lifting in this driver is performed by
30 * a Finite State Machine (FSM). The driver needs to wait on a number
31 * of events; some raised by interrupts, some which need to be polled
32 * for. Describing all of the behaviour in a FSM seems to be the
33 * easiest way to keep the complexity low and make it easy to
34 * understand what the driver is doing. If the block ops or the
35 * request function need to interact with the hardware, then they
36 * simply need to flag the request and kick of FSM processing.
38 * The FSM itself is atomic-safe code which can be run from any
39 * context. The general process flow is:
40 * 1. obtain the ace->lock spinlock.
41 * 2. loop on ace_fsm_dostate() until the ace->fsm_continue flag is
43 * 3. release the lock.
45 * Individual states do not sleep in any way. If a condition needs to
46 * be waited for then the state much clear the fsm_continue flag and
47 * either schedule the FSM to be run again at a later time, or expect
48 * an interrupt to call the FSM when the desired condition is met.
50 * In normal operation, the FSM is processed at interrupt context
51 * either when the driver's tasklet is scheduled, or when an irq is
52 * raised by the hardware. The tasklet can be scheduled at any time.
53 * The request method in particular schedules the tasklet when a new
54 * request has been indicated by the block layer. Once started, the
55 * FSM proceeds as far as it can processing the request until it
56 * needs on a hardware event. At this point, it must yield execution.
58 * A state has two options when yielding execution:
60 * - Call if need to poll for event.
61 * - clears the fsm_continue flag to exit the processing loop
62 * - reschedules the tasklet to run again as soon as possible
63 * 2. ace_fsm_yieldirq()
64 * - Call if an irq is expected from the HW
65 * - clears the fsm_continue flag to exit the processing loop
66 * - does not reschedule the tasklet so the FSM will not be processed
67 * again until an irq is received.
68 * After calling a yield function, the state must return control back
69 * to the FSM main loop.
71 * Additionally, the driver maintains a kernel timer which can process
72 * the FSM. If the FSM gets stalled, typically due to a missed
73 * interrupt, then the kernel timer will expire and the driver can
74 * continue where it left off.
77 * - Add FPGA configuration control interface.
78 * - Request major number from lanana
83 #include <linux/module.h>
84 #include <linux/ctype.h>
85 #include <linux/init.h>
86 #include <linux/interrupt.h>
87 #include <linux/errno.h>
88 #include <linux/kernel.h>
89 #include <linux/delay.h>
90 #include <linux/slab.h>
91 #include <linux/blkdev.h>
92 #include <linux/ata.h>
93 #include <linux/hdreg.h>
94 #include <linux/platform_device.h>
95 #if defined(CONFIG_OF)
96 #include <linux/of_device.h>
97 #include <linux/of_platform.h>
100 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
101 MODULE_DESCRIPTION("Xilinx SystemACE device driver");
102 MODULE_LICENSE("GPL");
104 /* SystemACE register definitions */
105 #define ACE_BUSMODE (0x00)
107 #define ACE_STATUS (0x04)
108 #define ACE_STATUS_CFGLOCK (0x00000001)
109 #define ACE_STATUS_MPULOCK (0x00000002)
110 #define ACE_STATUS_CFGERROR (0x00000004) /* config controller error */
111 #define ACE_STATUS_CFCERROR (0x00000008) /* CF controller error */
112 #define ACE_STATUS_CFDETECT (0x00000010)
113 #define ACE_STATUS_DATABUFRDY (0x00000020)
114 #define ACE_STATUS_DATABUFMODE (0x00000040)
115 #define ACE_STATUS_CFGDONE (0x00000080)
116 #define ACE_STATUS_RDYFORCFCMD (0x00000100)
117 #define ACE_STATUS_CFGMODEPIN (0x00000200)
118 #define ACE_STATUS_CFGADDR_MASK (0x0000e000)
119 #define ACE_STATUS_CFBSY (0x00020000)
120 #define ACE_STATUS_CFRDY (0x00040000)
121 #define ACE_STATUS_CFDWF (0x00080000)
122 #define ACE_STATUS_CFDSC (0x00100000)
123 #define ACE_STATUS_CFDRQ (0x00200000)
124 #define ACE_STATUS_CFCORR (0x00400000)
125 #define ACE_STATUS_CFERR (0x00800000)
127 #define ACE_ERROR (0x08)
128 #define ACE_CFGLBA (0x0c)
129 #define ACE_MPULBA (0x10)
131 #define ACE_SECCNTCMD (0x14)
132 #define ACE_SECCNTCMD_RESET (0x0100)
133 #define ACE_SECCNTCMD_IDENTIFY (0x0200)
134 #define ACE_SECCNTCMD_READ_DATA (0x0300)
135 #define ACE_SECCNTCMD_WRITE_DATA (0x0400)
136 #define ACE_SECCNTCMD_ABORT (0x0600)
138 #define ACE_VERSION (0x16)
139 #define ACE_VERSION_REVISION_MASK (0x00FF)
140 #define ACE_VERSION_MINOR_MASK (0x0F00)
141 #define ACE_VERSION_MAJOR_MASK (0xF000)
143 #define ACE_CTRL (0x18)
144 #define ACE_CTRL_FORCELOCKREQ (0x0001)
145 #define ACE_CTRL_LOCKREQ (0x0002)
146 #define ACE_CTRL_FORCECFGADDR (0x0004)
147 #define ACE_CTRL_FORCECFGMODE (0x0008)
148 #define ACE_CTRL_CFGMODE (0x0010)
149 #define ACE_CTRL_CFGSTART (0x0020)
150 #define ACE_CTRL_CFGSEL (0x0040)
151 #define ACE_CTRL_CFGRESET (0x0080)
152 #define ACE_CTRL_DATABUFRDYIRQ (0x0100)
153 #define ACE_CTRL_ERRORIRQ (0x0200)
154 #define ACE_CTRL_CFGDONEIRQ (0x0400)
155 #define ACE_CTRL_RESETIRQ (0x0800)
156 #define ACE_CTRL_CFGPROG (0x1000)
157 #define ACE_CTRL_CFGADDR_MASK (0xe000)
159 #define ACE_FATSTAT (0x1c)
161 #define ACE_NUM_MINORS 16
162 #define ACE_SECTOR_SIZE (512)
163 #define ACE_FIFO_SIZE (32)
164 #define ACE_BUF_PER_SECTOR (ACE_SECTOR_SIZE / ACE_FIFO_SIZE)
166 #define ACE_BUS_WIDTH_8 0
167 #define ACE_BUS_WIDTH_16 1
172 /* driver state data */
176 struct list_head list;
178 /* finite state machine data */
179 struct tasklet_struct fsm_tasklet;
180 uint fsm_task; /* Current activity (ACE_TASK_*) */
181 uint fsm_state; /* Current state (ACE_FSM_STATE_*) */
182 uint fsm_continue_flag; /* cleared to exit FSM mainloop */
184 struct timer_list stall_timer;
186 /* Transfer state/result, use for both id and block request */
187 struct request *req; /* request being processed */
188 void *data_ptr; /* pointer to I/O buffer */
189 int data_count; /* number of buffers remaining */
190 int data_result; /* Result of transfer; 0 := success */
192 int id_req_count; /* count of id requests */
194 struct completion id_completion; /* used when id req finishes */
197 /* Details of hardware device */
198 resource_size_t physaddr;
199 void __iomem *baseaddr;
201 int bus_width; /* 0 := 8 bit; 1 := 16 bit */
202 struct ace_reg_ops *reg_ops;
205 /* Block device data structures */
208 struct request_queue *queue;
211 /* Inserted CF card parameters */
212 u16 cf_id[ATA_ID_WORDS];
215 static int ace_major;
217 /* ---------------------------------------------------------------------
218 * Low level register access
222 u16(*in) (struct ace_device * ace, int reg);
223 void (*out) (struct ace_device * ace, int reg, u16 val);
224 void (*datain) (struct ace_device * ace);
225 void (*dataout) (struct ace_device * ace);
228 /* 8 Bit bus width */
229 static u16 ace_in_8(struct ace_device *ace, int reg)
231 void __iomem *r = ace->baseaddr + reg;
232 return in_8(r) | (in_8(r + 1) << 8);
235 static void ace_out_8(struct ace_device *ace, int reg, u16 val)
237 void __iomem *r = ace->baseaddr + reg;
239 out_8(r + 1, val >> 8);
242 static void ace_datain_8(struct ace_device *ace)
244 void __iomem *r = ace->baseaddr + 0x40;
245 u8 *dst = ace->data_ptr;
246 int i = ACE_FIFO_SIZE;
252 static void ace_dataout_8(struct ace_device *ace)
254 void __iomem *r = ace->baseaddr + 0x40;
255 u8 *src = ace->data_ptr;
256 int i = ACE_FIFO_SIZE;
262 static struct ace_reg_ops ace_reg_8_ops = {
265 .datain = ace_datain_8,
266 .dataout = ace_dataout_8,
269 /* 16 bit big endian bus attachment */
270 static u16 ace_in_be16(struct ace_device *ace, int reg)
272 return in_be16(ace->baseaddr + reg);
275 static void ace_out_be16(struct ace_device *ace, int reg, u16 val)
277 out_be16(ace->baseaddr + reg, val);
280 static void ace_datain_be16(struct ace_device *ace)
282 int i = ACE_FIFO_SIZE / 2;
283 u16 *dst = ace->data_ptr;
285 *dst++ = in_le16(ace->baseaddr + 0x40);
289 static void ace_dataout_be16(struct ace_device *ace)
291 int i = ACE_FIFO_SIZE / 2;
292 u16 *src = ace->data_ptr;
294 out_le16(ace->baseaddr + 0x40, *src++);
298 /* 16 bit little endian bus attachment */
299 static u16 ace_in_le16(struct ace_device *ace, int reg)
301 return in_le16(ace->baseaddr + reg);
304 static void ace_out_le16(struct ace_device *ace, int reg, u16 val)
306 out_le16(ace->baseaddr + reg, val);
309 static void ace_datain_le16(struct ace_device *ace)
311 int i = ACE_FIFO_SIZE / 2;
312 u16 *dst = ace->data_ptr;
314 *dst++ = in_be16(ace->baseaddr + 0x40);
318 static void ace_dataout_le16(struct ace_device *ace)
320 int i = ACE_FIFO_SIZE / 2;
321 u16 *src = ace->data_ptr;
323 out_be16(ace->baseaddr + 0x40, *src++);
327 static struct ace_reg_ops ace_reg_be16_ops = {
330 .datain = ace_datain_be16,
331 .dataout = ace_dataout_be16,
334 static struct ace_reg_ops ace_reg_le16_ops = {
337 .datain = ace_datain_le16,
338 .dataout = ace_dataout_le16,
341 static inline u16 ace_in(struct ace_device *ace, int reg)
343 return ace->reg_ops->in(ace, reg);
346 static inline u32 ace_in32(struct ace_device *ace, int reg)
348 return ace_in(ace, reg) | (ace_in(ace, reg + 2) << 16);
351 static inline void ace_out(struct ace_device *ace, int reg, u16 val)
353 ace->reg_ops->out(ace, reg, val);
356 static inline void ace_out32(struct ace_device *ace, int reg, u32 val)
358 ace_out(ace, reg, val);
359 ace_out(ace, reg + 2, val >> 16);
362 /* ---------------------------------------------------------------------
363 * Debug support functions
367 static void ace_dump_mem(void *base, int len)
369 const char *ptr = base;
372 for (i = 0; i < len; i += 16) {
373 printk(KERN_INFO "%.8x:", i);
374 for (j = 0; j < 16; j++) {
377 printk("%.2x", ptr[i + j]);
380 for (j = 0; j < 16; j++)
381 printk("%c", isprint(ptr[i + j]) ? ptr[i + j] : '.');
386 static inline void ace_dump_mem(void *base, int len)
391 static void ace_dump_regs(struct ace_device *ace)
393 dev_info(ace->dev, " ctrl: %.8x seccnt/cmd: %.4x ver:%.4x\n"
394 KERN_INFO " status:%.8x mpu_lba:%.8x busmode:%4x\n"
395 KERN_INFO " error: %.8x cfg_lba:%.8x fatstat:%.4x\n",
396 ace_in32(ace, ACE_CTRL),
397 ace_in(ace, ACE_SECCNTCMD),
398 ace_in(ace, ACE_VERSION),
399 ace_in32(ace, ACE_STATUS),
400 ace_in32(ace, ACE_MPULBA),
401 ace_in(ace, ACE_BUSMODE),
402 ace_in32(ace, ACE_ERROR),
403 ace_in32(ace, ACE_CFGLBA), ace_in(ace, ACE_FATSTAT));
406 void ace_fix_driveid(u16 *id)
408 #if defined(__BIG_ENDIAN)
411 /* All half words have wrong byte order; swap the bytes */
412 for (i = 0; i < ATA_ID_WORDS; i++, id++)
413 *id = le16_to_cpu(*id);
417 /* ---------------------------------------------------------------------
418 * Finite State Machine (FSM) implementation
421 /* FSM tasks; used to direct state transitions */
422 #define ACE_TASK_IDLE 0
423 #define ACE_TASK_IDENTIFY 1
424 #define ACE_TASK_READ 2
425 #define ACE_TASK_WRITE 3
426 #define ACE_FSM_NUM_TASKS 4
428 /* FSM state definitions */
429 #define ACE_FSM_STATE_IDLE 0
430 #define ACE_FSM_STATE_REQ_LOCK 1
431 #define ACE_FSM_STATE_WAIT_LOCK 2
432 #define ACE_FSM_STATE_WAIT_CFREADY 3
433 #define ACE_FSM_STATE_IDENTIFY_PREPARE 4
434 #define ACE_FSM_STATE_IDENTIFY_TRANSFER 5
435 #define ACE_FSM_STATE_IDENTIFY_COMPLETE 6
436 #define ACE_FSM_STATE_REQ_PREPARE 7
437 #define ACE_FSM_STATE_REQ_TRANSFER 8
438 #define ACE_FSM_STATE_REQ_COMPLETE 9
439 #define ACE_FSM_STATE_ERROR 10
440 #define ACE_FSM_NUM_STATES 11
442 /* Set flag to exit FSM loop and reschedule tasklet */
443 static inline void ace_fsm_yield(struct ace_device *ace)
445 dev_dbg(ace->dev, "ace_fsm_yield()\n");
446 tasklet_schedule(&ace->fsm_tasklet);
447 ace->fsm_continue_flag = 0;
450 /* Set flag to exit FSM loop and wait for IRQ to reschedule tasklet */
451 static inline void ace_fsm_yieldirq(struct ace_device *ace)
453 dev_dbg(ace->dev, "ace_fsm_yieldirq()\n");
455 if (ace->irq == NO_IRQ)
456 /* No IRQ assigned, so need to poll */
457 tasklet_schedule(&ace->fsm_tasklet);
458 ace->fsm_continue_flag = 0;
461 /* Get the next read/write request; ending requests that we don't handle */
462 struct request *ace_get_next_request(struct request_queue * q)
466 while ((req = elv_next_request(q)) != NULL) {
467 if (blk_fs_request(req))
469 blkdev_dequeue_request(req);
470 __blk_end_request_all(req, -EIO);
475 static void ace_fsm_dostate(struct ace_device *ace)
483 dev_dbg(ace->dev, "fsm_state=%i, id_req_count=%i\n",
484 ace->fsm_state, ace->id_req_count);
487 /* Verify that there is actually a CF in the slot. If not, then
488 * bail out back to the idle state and wake up all the waiters */
489 status = ace_in32(ace, ACE_STATUS);
490 if ((status & ACE_STATUS_CFDETECT) == 0) {
491 ace->fsm_state = ACE_FSM_STATE_IDLE;
492 ace->media_change = 1;
493 set_capacity(ace->gd, 0);
494 dev_info(ace->dev, "No CF in slot\n");
496 /* Drop all in-flight and pending requests */
498 __blk_end_request_all(ace->req, -EIO);
501 while ((req = elv_next_request(ace->queue)) != NULL) {
502 blkdev_dequeue_request(req);
503 __blk_end_request_all(req, -EIO);
506 /* Drop back to IDLE state and notify waiters */
507 ace->fsm_state = ACE_FSM_STATE_IDLE;
508 ace->id_result = -EIO;
509 while (ace->id_req_count) {
510 complete(&ace->id_completion);
515 switch (ace->fsm_state) {
516 case ACE_FSM_STATE_IDLE:
517 /* See if there is anything to do */
518 if (ace->id_req_count || ace_get_next_request(ace->queue)) {
520 ace->fsm_state = ACE_FSM_STATE_REQ_LOCK;
521 mod_timer(&ace->stall_timer, jiffies + HZ);
522 if (!timer_pending(&ace->stall_timer))
523 add_timer(&ace->stall_timer);
526 del_timer(&ace->stall_timer);
527 ace->fsm_continue_flag = 0;
530 case ACE_FSM_STATE_REQ_LOCK:
531 if (ace_in(ace, ACE_STATUS) & ACE_STATUS_MPULOCK) {
532 /* Already have the lock, jump to next state */
533 ace->fsm_state = ACE_FSM_STATE_WAIT_CFREADY;
537 /* Request the lock */
538 val = ace_in(ace, ACE_CTRL);
539 ace_out(ace, ACE_CTRL, val | ACE_CTRL_LOCKREQ);
540 ace->fsm_state = ACE_FSM_STATE_WAIT_LOCK;
543 case ACE_FSM_STATE_WAIT_LOCK:
544 if (ace_in(ace, ACE_STATUS) & ACE_STATUS_MPULOCK) {
545 /* got the lock; move to next state */
546 ace->fsm_state = ACE_FSM_STATE_WAIT_CFREADY;
550 /* wait a bit for the lock */
554 case ACE_FSM_STATE_WAIT_CFREADY:
555 status = ace_in32(ace, ACE_STATUS);
556 if (!(status & ACE_STATUS_RDYFORCFCMD) ||
557 (status & ACE_STATUS_CFBSY)) {
558 /* CF card isn't ready; it needs to be polled */
563 /* Device is ready for command; determine what to do next */
564 if (ace->id_req_count)
565 ace->fsm_state = ACE_FSM_STATE_IDENTIFY_PREPARE;
567 ace->fsm_state = ACE_FSM_STATE_REQ_PREPARE;
570 case ACE_FSM_STATE_IDENTIFY_PREPARE:
571 /* Send identify command */
572 ace->fsm_task = ACE_TASK_IDENTIFY;
573 ace->data_ptr = ace->cf_id;
574 ace->data_count = ACE_BUF_PER_SECTOR;
575 ace_out(ace, ACE_SECCNTCMD, ACE_SECCNTCMD_IDENTIFY);
577 /* As per datasheet, put config controller in reset */
578 val = ace_in(ace, ACE_CTRL);
579 ace_out(ace, ACE_CTRL, val | ACE_CTRL_CFGRESET);
581 /* irq handler takes over from this point; wait for the
582 * transfer to complete */
583 ace->fsm_state = ACE_FSM_STATE_IDENTIFY_TRANSFER;
584 ace_fsm_yieldirq(ace);
587 case ACE_FSM_STATE_IDENTIFY_TRANSFER:
588 /* Check that the sysace is ready to receive data */
589 status = ace_in32(ace, ACE_STATUS);
590 if (status & ACE_STATUS_CFBSY) {
591 dev_dbg(ace->dev, "CFBSY set; t=%i iter=%i dc=%i\n",
592 ace->fsm_task, ace->fsm_iter_num,
597 if (!(status & ACE_STATUS_DATABUFRDY)) {
602 /* Transfer the next buffer */
603 ace->reg_ops->datain(ace);
606 /* If there are still buffers to be transfers; jump out here */
607 if (ace->data_count != 0) {
608 ace_fsm_yieldirq(ace);
612 /* transfer finished; kick state machine */
613 dev_dbg(ace->dev, "identify finished\n");
614 ace->fsm_state = ACE_FSM_STATE_IDENTIFY_COMPLETE;
617 case ACE_FSM_STATE_IDENTIFY_COMPLETE:
618 ace_fix_driveid(ace->cf_id);
619 ace_dump_mem(ace->cf_id, 512); /* Debug: Dump out disk ID */
621 if (ace->data_result) {
622 /* Error occured, disable the disk */
623 ace->media_change = 1;
624 set_capacity(ace->gd, 0);
625 dev_err(ace->dev, "error fetching CF id (%i)\n",
628 ace->media_change = 0;
630 /* Record disk parameters */
631 set_capacity(ace->gd,
632 ata_id_u32(ace->cf_id, ATA_ID_LBA_CAPACITY));
633 dev_info(ace->dev, "capacity: %i sectors\n",
634 ata_id_u32(ace->cf_id, ATA_ID_LBA_CAPACITY));
637 /* We're done, drop to IDLE state and notify waiters */
638 ace->fsm_state = ACE_FSM_STATE_IDLE;
639 ace->id_result = ace->data_result;
640 while (ace->id_req_count) {
641 complete(&ace->id_completion);
646 case ACE_FSM_STATE_REQ_PREPARE:
647 req = ace_get_next_request(ace->queue);
649 ace->fsm_state = ACE_FSM_STATE_IDLE;
652 blkdev_dequeue_request(req);
654 /* Okay, it's a data request, set it up for transfer */
656 "request: sec=%llx hcnt=%x, ccnt=%x, dir=%i\n",
657 (unsigned long long)blk_rq_pos(req),
658 blk_rq_sectors(req), blk_rq_cur_sectors(req),
662 ace->data_ptr = req->buffer;
663 ace->data_count = blk_rq_cur_sectors(req) * ACE_BUF_PER_SECTOR;
664 ace_out32(ace, ACE_MPULBA, blk_rq_pos(req) & 0x0FFFFFFF);
666 count = blk_rq_sectors(req);
667 if (rq_data_dir(req)) {
668 /* Kick off write request */
669 dev_dbg(ace->dev, "write data\n");
670 ace->fsm_task = ACE_TASK_WRITE;
671 ace_out(ace, ACE_SECCNTCMD,
672 count | ACE_SECCNTCMD_WRITE_DATA);
674 /* Kick off read request */
675 dev_dbg(ace->dev, "read data\n");
676 ace->fsm_task = ACE_TASK_READ;
677 ace_out(ace, ACE_SECCNTCMD,
678 count | ACE_SECCNTCMD_READ_DATA);
681 /* As per datasheet, put config controller in reset */
682 val = ace_in(ace, ACE_CTRL);
683 ace_out(ace, ACE_CTRL, val | ACE_CTRL_CFGRESET);
685 /* Move to the transfer state. The systemace will raise
686 * an interrupt once there is something to do
688 ace->fsm_state = ACE_FSM_STATE_REQ_TRANSFER;
689 if (ace->fsm_task == ACE_TASK_READ)
690 ace_fsm_yieldirq(ace); /* wait for data ready */
693 case ACE_FSM_STATE_REQ_TRANSFER:
694 /* Check that the sysace is ready to receive data */
695 status = ace_in32(ace, ACE_STATUS);
696 if (status & ACE_STATUS_CFBSY) {
698 "CFBSY set; t=%i iter=%i c=%i dc=%i irq=%i\n",
699 ace->fsm_task, ace->fsm_iter_num,
700 blk_rq_cur_sectors(ace->req) * 16,
701 ace->data_count, ace->in_irq);
702 ace_fsm_yield(ace); /* need to poll CFBSY bit */
705 if (!(status & ACE_STATUS_DATABUFRDY)) {
707 "DATABUF not set; t=%i iter=%i c=%i dc=%i irq=%i\n",
708 ace->fsm_task, ace->fsm_iter_num,
709 blk_rq_cur_sectors(ace->req) * 16,
710 ace->data_count, ace->in_irq);
711 ace_fsm_yieldirq(ace);
715 /* Transfer the next buffer */
716 if (ace->fsm_task == ACE_TASK_WRITE)
717 ace->reg_ops->dataout(ace);
719 ace->reg_ops->datain(ace);
722 /* If there are still buffers to be transfers; jump out here */
723 if (ace->data_count != 0) {
724 ace_fsm_yieldirq(ace);
728 /* bio finished; is there another one? */
729 if (__blk_end_request_cur(ace->req, 0)) {
730 /* dev_dbg(ace->dev, "next block; h=%u c=%u\n",
731 * blk_rq_sectors(ace->req),
732 * blk_rq_cur_sectors(ace->req));
734 ace->data_ptr = ace->req->buffer;
735 ace->data_count = blk_rq_cur_sectors(ace->req) * 16;
736 ace_fsm_yieldirq(ace);
740 ace->fsm_state = ACE_FSM_STATE_REQ_COMPLETE;
743 case ACE_FSM_STATE_REQ_COMPLETE:
746 /* Finished request; go to idle state */
747 ace->fsm_state = ACE_FSM_STATE_IDLE;
751 ace->fsm_state = ACE_FSM_STATE_IDLE;
756 static void ace_fsm_tasklet(unsigned long data)
758 struct ace_device *ace = (void *)data;
761 spin_lock_irqsave(&ace->lock, flags);
763 /* Loop over state machine until told to stop */
764 ace->fsm_continue_flag = 1;
765 while (ace->fsm_continue_flag)
766 ace_fsm_dostate(ace);
768 spin_unlock_irqrestore(&ace->lock, flags);
771 static void ace_stall_timer(unsigned long data)
773 struct ace_device *ace = (void *)data;
777 "kicking stalled fsm; state=%i task=%i iter=%i dc=%i\n",
778 ace->fsm_state, ace->fsm_task, ace->fsm_iter_num,
780 spin_lock_irqsave(&ace->lock, flags);
782 /* Rearm the stall timer *before* entering FSM (which may then
783 * delete the timer) */
784 mod_timer(&ace->stall_timer, jiffies + HZ);
786 /* Loop over state machine until told to stop */
787 ace->fsm_continue_flag = 1;
788 while (ace->fsm_continue_flag)
789 ace_fsm_dostate(ace);
791 spin_unlock_irqrestore(&ace->lock, flags);
794 /* ---------------------------------------------------------------------
795 * Interrupt handling routines
797 static int ace_interrupt_checkstate(struct ace_device *ace)
799 u32 sreg = ace_in32(ace, ACE_STATUS);
800 u16 creg = ace_in(ace, ACE_CTRL);
802 /* Check for error occurance */
803 if ((sreg & (ACE_STATUS_CFGERROR | ACE_STATUS_CFCERROR)) &&
804 (creg & ACE_CTRL_ERRORIRQ)) {
805 dev_err(ace->dev, "transfer failure\n");
813 static irqreturn_t ace_interrupt(int irq, void *dev_id)
816 struct ace_device *ace = dev_id;
818 /* be safe and get the lock */
819 spin_lock(&ace->lock);
822 /* clear the interrupt */
823 creg = ace_in(ace, ACE_CTRL);
824 ace_out(ace, ACE_CTRL, creg | ACE_CTRL_RESETIRQ);
825 ace_out(ace, ACE_CTRL, creg);
827 /* check for IO failures */
828 if (ace_interrupt_checkstate(ace))
829 ace->data_result = -EIO;
831 if (ace->fsm_task == 0) {
833 "spurious irq; stat=%.8x ctrl=%.8x cmd=%.4x\n",
834 ace_in32(ace, ACE_STATUS), ace_in32(ace, ACE_CTRL),
835 ace_in(ace, ACE_SECCNTCMD));
836 dev_err(ace->dev, "fsm_task=%i fsm_state=%i data_count=%i\n",
837 ace->fsm_task, ace->fsm_state, ace->data_count);
840 /* Loop over state machine until told to stop */
841 ace->fsm_continue_flag = 1;
842 while (ace->fsm_continue_flag)
843 ace_fsm_dostate(ace);
845 /* done with interrupt; drop the lock */
847 spin_unlock(&ace->lock);
852 /* ---------------------------------------------------------------------
855 static void ace_request(struct request_queue * q)
858 struct ace_device *ace;
860 req = ace_get_next_request(q);
863 ace = req->rq_disk->private_data;
864 tasklet_schedule(&ace->fsm_tasklet);
868 static int ace_media_changed(struct gendisk *gd)
870 struct ace_device *ace = gd->private_data;
871 dev_dbg(ace->dev, "ace_media_changed(): %i\n", ace->media_change);
873 return ace->media_change;
876 static int ace_revalidate_disk(struct gendisk *gd)
878 struct ace_device *ace = gd->private_data;
881 dev_dbg(ace->dev, "ace_revalidate_disk()\n");
883 if (ace->media_change) {
884 dev_dbg(ace->dev, "requesting cf id and scheduling tasklet\n");
886 spin_lock_irqsave(&ace->lock, flags);
888 spin_unlock_irqrestore(&ace->lock, flags);
890 tasklet_schedule(&ace->fsm_tasklet);
891 wait_for_completion(&ace->id_completion);
894 dev_dbg(ace->dev, "revalidate complete\n");
895 return ace->id_result;
898 static int ace_open(struct block_device *bdev, fmode_t mode)
900 struct ace_device *ace = bdev->bd_disk->private_data;
903 dev_dbg(ace->dev, "ace_open() users=%i\n", ace->users + 1);
905 spin_lock_irqsave(&ace->lock, flags);
907 spin_unlock_irqrestore(&ace->lock, flags);
909 check_disk_change(bdev);
913 static int ace_release(struct gendisk *disk, fmode_t mode)
915 struct ace_device *ace = disk->private_data;
919 dev_dbg(ace->dev, "ace_release() users=%i\n", ace->users - 1);
921 spin_lock_irqsave(&ace->lock, flags);
923 if (ace->users == 0) {
924 val = ace_in(ace, ACE_CTRL);
925 ace_out(ace, ACE_CTRL, val & ~ACE_CTRL_LOCKREQ);
927 spin_unlock_irqrestore(&ace->lock, flags);
931 static int ace_getgeo(struct block_device *bdev, struct hd_geometry *geo)
933 struct ace_device *ace = bdev->bd_disk->private_data;
934 u16 *cf_id = ace->cf_id;
936 dev_dbg(ace->dev, "ace_getgeo()\n");
938 geo->heads = cf_id[ATA_ID_HEADS];
939 geo->sectors = cf_id[ATA_ID_SECTORS];
940 geo->cylinders = cf_id[ATA_ID_CYLS];
945 static struct block_device_operations ace_fops = {
946 .owner = THIS_MODULE,
948 .release = ace_release,
949 .media_changed = ace_media_changed,
950 .revalidate_disk = ace_revalidate_disk,
951 .getgeo = ace_getgeo,
954 /* --------------------------------------------------------------------
955 * SystemACE device setup/teardown code
957 static int __devinit ace_setup(struct ace_device *ace)
963 dev_dbg(ace->dev, "ace_setup(ace=0x%p)\n", ace);
964 dev_dbg(ace->dev, "physaddr=0x%llx irq=%i\n",
965 (unsigned long long)ace->physaddr, ace->irq);
967 spin_lock_init(&ace->lock);
968 init_completion(&ace->id_completion);
973 ace->baseaddr = ioremap(ace->physaddr, 0x80);
978 * Initialize the state machine tasklet and stall timer
980 tasklet_init(&ace->fsm_tasklet, ace_fsm_tasklet, (unsigned long)ace);
981 setup_timer(&ace->stall_timer, ace_stall_timer, (unsigned long)ace);
984 * Initialize the request queue
986 ace->queue = blk_init_queue(ace_request, &ace->lock);
987 if (ace->queue == NULL)
989 blk_queue_hardsect_size(ace->queue, 512);
992 * Allocate and initialize GD structure
994 ace->gd = alloc_disk(ACE_NUM_MINORS);
998 ace->gd->major = ace_major;
999 ace->gd->first_minor = ace->id * ACE_NUM_MINORS;
1000 ace->gd->fops = &ace_fops;
1001 ace->gd->queue = ace->queue;
1002 ace->gd->private_data = ace;
1003 snprintf(ace->gd->disk_name, 32, "xs%c", ace->id + 'a');
1006 if (ace->bus_width == ACE_BUS_WIDTH_16) {
1007 /* 0x0101 should work regardless of endianess */
1008 ace_out_le16(ace, ACE_BUSMODE, 0x0101);
1010 /* read it back to determine endianess */
1011 if (ace_in_le16(ace, ACE_BUSMODE) == 0x0001)
1012 ace->reg_ops = &ace_reg_le16_ops;
1014 ace->reg_ops = &ace_reg_be16_ops;
1016 ace_out_8(ace, ACE_BUSMODE, 0x00);
1017 ace->reg_ops = &ace_reg_8_ops;
1020 /* Make sure version register is sane */
1021 version = ace_in(ace, ACE_VERSION);
1022 if ((version == 0) || (version == 0xFFFF))
1025 /* Put sysace in a sane state by clearing most control reg bits */
1026 ace_out(ace, ACE_CTRL, ACE_CTRL_FORCECFGMODE |
1027 ACE_CTRL_DATABUFRDYIRQ | ACE_CTRL_ERRORIRQ);
1029 /* Now we can hook up the irq handler */
1030 if (ace->irq != NO_IRQ) {
1031 rc = request_irq(ace->irq, ace_interrupt, 0, "systemace", ace);
1033 /* Failure - fall back to polled mode */
1034 dev_err(ace->dev, "request_irq failed\n");
1039 /* Enable interrupts */
1040 val = ace_in(ace, ACE_CTRL);
1041 val |= ACE_CTRL_DATABUFRDYIRQ | ACE_CTRL_ERRORIRQ;
1042 ace_out(ace, ACE_CTRL, val);
1044 /* Print the identification */
1045 dev_info(ace->dev, "Xilinx SystemACE revision %i.%i.%i\n",
1046 (version >> 12) & 0xf, (version >> 8) & 0x0f, version & 0xff);
1047 dev_dbg(ace->dev, "physaddr 0x%llx, mapped to 0x%p, irq=%i\n",
1048 (unsigned long long) ace->physaddr, ace->baseaddr, ace->irq);
1050 ace->media_change = 1;
1051 ace_revalidate_disk(ace->gd);
1053 /* Make the sysace device 'live' */
1061 blk_cleanup_queue(ace->queue);
1063 iounmap(ace->baseaddr);
1065 dev_info(ace->dev, "xsysace: error initializing device at 0x%llx\n",
1066 (unsigned long long) ace->physaddr);
1070 static void __devexit ace_teardown(struct ace_device *ace)
1073 del_gendisk(ace->gd);
1078 blk_cleanup_queue(ace->queue);
1080 tasklet_kill(&ace->fsm_tasklet);
1082 if (ace->irq != NO_IRQ)
1083 free_irq(ace->irq, ace);
1085 iounmap(ace->baseaddr);
1088 static int __devinit
1089 ace_alloc(struct device *dev, int id, resource_size_t physaddr,
1090 int irq, int bus_width)
1092 struct ace_device *ace;
1094 dev_dbg(dev, "ace_alloc(%p)\n", dev);
1101 /* Allocate and initialize the ace device structure */
1102 ace = kzalloc(sizeof(struct ace_device), GFP_KERNEL);
1110 ace->physaddr = physaddr;
1112 ace->bus_width = bus_width;
1114 /* Call the setup code */
1115 rc = ace_setup(ace);
1119 dev_set_drvdata(dev, ace);
1123 dev_set_drvdata(dev, NULL);
1127 dev_err(dev, "could not initialize device, err=%i\n", rc);
1131 static void __devexit ace_free(struct device *dev)
1133 struct ace_device *ace = dev_get_drvdata(dev);
1134 dev_dbg(dev, "ace_free(%p)\n", dev);
1138 dev_set_drvdata(dev, NULL);
1143 /* ---------------------------------------------------------------------
1144 * Platform Bus Support
1147 static int __devinit ace_probe(struct platform_device *dev)
1149 resource_size_t physaddr = 0;
1150 int bus_width = ACE_BUS_WIDTH_16; /* FIXME: should not be hard coded */
1155 dev_dbg(&dev->dev, "ace_probe(%p)\n", dev);
1157 for (i = 0; i < dev->num_resources; i++) {
1158 if (dev->resource[i].flags & IORESOURCE_MEM)
1159 physaddr = dev->resource[i].start;
1160 if (dev->resource[i].flags & IORESOURCE_IRQ)
1161 irq = dev->resource[i].start;
1164 /* Call the bus-independant setup code */
1165 return ace_alloc(&dev->dev, id, physaddr, irq, bus_width);
1169 * Platform bus remove() method
1171 static int __devexit ace_remove(struct platform_device *dev)
1173 ace_free(&dev->dev);
1177 static struct platform_driver ace_platform_driver = {
1179 .remove = __devexit_p(ace_remove),
1181 .owner = THIS_MODULE,
1186 /* ---------------------------------------------------------------------
1187 * OF_Platform Bus Support
1190 #if defined(CONFIG_OF)
1191 static int __devinit
1192 ace_of_probe(struct of_device *op, const struct of_device_id *match)
1194 struct resource res;
1195 resource_size_t physaddr;
1197 int irq, bus_width, rc;
1199 dev_dbg(&op->dev, "ace_of_probe(%p, %p)\n", op, match);
1202 id = of_get_property(op->node, "port-number", NULL);
1205 rc = of_address_to_resource(op->node, 0, &res);
1207 dev_err(&op->dev, "invalid address\n");
1210 physaddr = res.start;
1213 irq = irq_of_parse_and_map(op->node, 0);
1216 bus_width = ACE_BUS_WIDTH_16;
1217 if (of_find_property(op->node, "8-bit", NULL))
1218 bus_width = ACE_BUS_WIDTH_8;
1220 /* Call the bus-independant setup code */
1221 return ace_alloc(&op->dev, id ? *id : 0, physaddr, irq, bus_width);
1224 static int __devexit ace_of_remove(struct of_device *op)
1230 /* Match table for of_platform binding */
1231 static struct of_device_id ace_of_match[] __devinitdata = {
1232 { .compatible = "xlnx,opb-sysace-1.00.b", },
1233 { .compatible = "xlnx,opb-sysace-1.00.c", },
1234 { .compatible = "xlnx,xps-sysace-1.00.a", },
1235 { .compatible = "xlnx,sysace", },
1238 MODULE_DEVICE_TABLE(of, ace_of_match);
1240 static struct of_platform_driver ace_of_driver = {
1241 .owner = THIS_MODULE,
1243 .match_table = ace_of_match,
1244 .probe = ace_of_probe,
1245 .remove = __devexit_p(ace_of_remove),
1251 /* Registration helpers to keep the number of #ifdefs to a minimum */
1252 static inline int __init ace_of_register(void)
1254 pr_debug("xsysace: registering OF binding\n");
1255 return of_register_platform_driver(&ace_of_driver);
1258 static inline void __exit ace_of_unregister(void)
1260 of_unregister_platform_driver(&ace_of_driver);
1262 #else /* CONFIG_OF */
1263 /* CONFIG_OF not enabled; do nothing helpers */
1264 static inline int __init ace_of_register(void) { return 0; }
1265 static inline void __exit ace_of_unregister(void) { }
1266 #endif /* CONFIG_OF */
1268 /* ---------------------------------------------------------------------
1269 * Module init/exit routines
1271 static int __init ace_init(void)
1275 ace_major = register_blkdev(ace_major, "xsysace");
1276 if (ace_major <= 0) {
1281 rc = ace_of_register();
1285 pr_debug("xsysace: registering platform binding\n");
1286 rc = platform_driver_register(&ace_platform_driver);
1290 pr_info("Xilinx SystemACE device driver, major=%i\n", ace_major);
1294 ace_of_unregister();
1296 unregister_blkdev(ace_major, "xsysace");
1298 printk(KERN_ERR "xsysace: registration failed; err=%i\n", rc);
1302 static void __exit ace_exit(void)
1304 pr_debug("Unregistering Xilinx SystemACE driver\n");
1305 platform_driver_unregister(&ace_platform_driver);
1306 ace_of_unregister();
1307 unregister_blkdev(ace_major, "xsysace");
1310 module_init(ace_init);
1311 module_exit(ace_exit);