2 * Sonics Silicon Backplane
3 * PCMCIA-Hostbus related functions
5 * Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
6 * Copyright 2007 Michael Buesch <mb@bu3sch.de>
8 * Licensed under the GNU/GPL. See COPYING for details.
11 #include <linux/ssb/ssb.h>
12 #include <linux/delay.h>
15 #include <pcmcia/cs_types.h>
16 #include <pcmcia/cs.h>
17 #include <pcmcia/cistpl.h>
18 #include <pcmcia/ciscode.h>
19 #include <pcmcia/ds.h>
20 #include <pcmcia/cisreg.h>
22 #include "ssb_private.h"
25 /* Define the following to 1 to enable a printk on each coreswitch. */
26 #define SSB_VERBOSE_PCMCIACORESWITCH_DEBUG 0
29 int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus,
32 struct pcmcia_device *pdev = bus->host_pcmcia;
40 addr = (coreidx * SSB_CORE_SIZE) + SSB_ENUM_BASE;
42 reg.Action = CS_WRITE;
44 reg.Value = (addr & 0x0000F000) >> 12;
45 err = pcmcia_access_configuration_register(pdev, ®);
46 if (err != CS_SUCCESS)
49 reg.Value = (addr & 0x00FF0000) >> 16;
50 err = pcmcia_access_configuration_register(pdev, ®);
51 if (err != CS_SUCCESS)
54 reg.Value = (addr & 0xFF000000) >> 24;
55 err = pcmcia_access_configuration_register(pdev, ®);
56 if (err != CS_SUCCESS)
63 err = pcmcia_access_configuration_register(pdev, ®);
64 if (err != CS_SUCCESS)
66 read_addr |= ((u32)(reg.Value & 0x0F)) << 12;
68 err = pcmcia_access_configuration_register(pdev, ®);
69 if (err != CS_SUCCESS)
71 read_addr |= ((u32)reg.Value) << 16;
73 err = pcmcia_access_configuration_register(pdev, ®);
74 if (err != CS_SUCCESS)
76 read_addr |= ((u32)reg.Value) << 24;
78 cur_core = (read_addr - SSB_ENUM_BASE) / SSB_CORE_SIZE;
79 if (cur_core == coreidx)
82 if (attempts++ > SSB_BAR0_MAX_RETRIES)
89 ssb_printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx);
93 int ssb_pcmcia_switch_core(struct ssb_bus *bus,
94 struct ssb_device *dev)
99 #if SSB_VERBOSE_PCMCIACORESWITCH_DEBUG
100 ssb_printk(KERN_INFO PFX
101 "Switching to %s core, index %d\n",
102 ssb_core_name(dev->id.coreid),
106 spin_lock_irqsave(&bus->bar_lock, flags);
107 err = ssb_pcmcia_switch_coreidx(bus, dev->core_index);
109 bus->mapped_device = dev;
110 spin_unlock_irqrestore(&bus->bar_lock, flags);
115 int ssb_pcmcia_switch_segment(struct ssb_bus *bus, u8 seg)
122 SSB_WARN_ON((seg != 0) && (seg != 1));
125 spin_lock_irqsave(&bus->bar_lock, flags);
127 reg.Action = CS_WRITE;
129 res = pcmcia_access_configuration_register(bus->host_pcmcia, ®);
130 if (unlikely(res != CS_SUCCESS))
133 reg.Action = CS_READ;
134 res = pcmcia_access_configuration_register(bus->host_pcmcia, ®);
135 if (unlikely(res != CS_SUCCESS))
138 if (reg.Value == seg)
141 if (unlikely(attempts++ > SSB_BAR0_MAX_RETRIES))
145 bus->mapped_pcmcia_seg = seg;
147 spin_unlock_irqrestore(&bus->bar_lock, flags);
150 ssb_printk(KERN_ERR PFX "Failed to switch pcmcia segment\n");
155 static int select_core_and_segment(struct ssb_device *dev,
158 struct ssb_bus *bus = dev->bus;
162 if (*offset >= 0x800) {
168 if (unlikely(dev != bus->mapped_device)) {
169 err = ssb_pcmcia_switch_core(bus, dev);
173 if (unlikely(need_segment != bus->mapped_pcmcia_seg)) {
174 err = ssb_pcmcia_switch_segment(bus, need_segment);
182 static u16 ssb_pcmcia_read16(struct ssb_device *dev, u16 offset)
184 struct ssb_bus *bus = dev->bus;
186 if (unlikely(select_core_and_segment(dev, &offset)))
189 return readw(bus->mmio + offset);
192 static u32 ssb_pcmcia_read32(struct ssb_device *dev, u16 offset)
194 struct ssb_bus *bus = dev->bus;
197 if (unlikely(select_core_and_segment(dev, &offset)))
199 lo = readw(bus->mmio + offset);
200 hi = readw(bus->mmio + offset + 2);
202 return (lo | (hi << 16));
205 static void ssb_pcmcia_write16(struct ssb_device *dev, u16 offset, u16 value)
207 struct ssb_bus *bus = dev->bus;
209 if (unlikely(select_core_and_segment(dev, &offset)))
211 writew(value, bus->mmio + offset);
214 static void ssb_pcmcia_write32(struct ssb_device *dev, u16 offset, u32 value)
216 struct ssb_bus *bus = dev->bus;
218 if (unlikely(select_core_and_segment(dev, &offset)))
220 writeb((value & 0xFF000000) >> 24, bus->mmio + offset + 3);
221 writeb((value & 0x00FF0000) >> 16, bus->mmio + offset + 2);
222 writeb((value & 0x0000FF00) >> 8, bus->mmio + offset + 1);
223 writeb((value & 0x000000FF) >> 0, bus->mmio + offset + 0);
226 /* Not "static", as it's used in main.c */
227 const struct ssb_bus_ops ssb_pcmcia_ops = {
228 .read16 = ssb_pcmcia_read16,
229 .read32 = ssb_pcmcia_read32,
230 .write16 = ssb_pcmcia_write16,
231 .write32 = ssb_pcmcia_write32,
234 int ssb_pcmcia_get_invariants(struct ssb_bus *bus,
235 struct ssb_init_invariants *iv)
241 int ssb_pcmcia_init(struct ssb_bus *bus)
246 if (bus->bustype != SSB_BUSTYPE_PCMCIA)
249 /* Switch segment to a known state and sync
250 * bus->mapped_pcmcia_seg with hardware state. */
251 ssb_pcmcia_switch_segment(bus, 0);
253 /* Init IRQ routing */
254 reg.Action = CS_READ;
256 if (bus->chip_id == 0x4306)
260 err = pcmcia_access_configuration_register(bus->host_pcmcia, ®);
261 if (err != CS_SUCCESS)
263 reg.Action = CS_WRITE;
264 reg.Value |= 0x04 | 0x01;
265 err = pcmcia_access_configuration_register(bus->host_pcmcia, ®);
266 if (err != CS_SUCCESS)