1 /* $Id: pci_common.c,v 1.29 2002/02/01 00:56:03 davem Exp $
2 * pci_common.c: PCI controller common support.
4 * Copyright (C) 1999 David S. Miller (davem@redhat.com)
7 #include <linux/string.h>
8 #include <linux/slab.h>
9 #include <linux/init.h>
13 /* Fix self device of BUS and hook it into BUS->self.
14 * The pci_scan_bus does not do this for the host bridge.
16 void __init pci_fixup_host_bridge_self(struct pci_bus *pbus)
20 list_for_each_entry(pdev, &pbus->devices, bus_list) {
21 if (pdev->class >> 8 == PCI_CLASS_BRIDGE_HOST) {
27 prom_printf("PCI: Critical error, cannot find host bridge PDEV.\n");
31 /* Find the OBP PROM device tree node for a PCI device.
32 * Return zero if not found.
34 static int __init find_device_prom_node(struct pci_pbm_info *pbm,
37 struct linux_prom_pci_registers *pregs,
45 * Return the PBM's PROM node in case we are it's PCI device,
46 * as the PBM's reg property is different to standard PCI reg
47 * properties. We would delete this device entry otherwise,
48 * which confuses XFree86's device probing...
50 if ((pdev->bus->number == pbm->pci_bus->number) && (pdev->devfn == 0) &&
51 (pdev->vendor == PCI_VENDOR_ID_SUN) &&
52 (pdev->device == PCI_DEVICE_ID_SUN_PBM ||
53 pdev->device == PCI_DEVICE_ID_SUN_SCHIZO ||
54 pdev->device == PCI_DEVICE_ID_SUN_TOMATILLO ||
55 pdev->device == PCI_DEVICE_ID_SUN_SABRE ||
56 pdev->device == PCI_DEVICE_ID_SUN_HUMMINGBIRD))
59 node = prom_getchild(bus_prom_node);
61 int err = prom_getproperty(node, "reg",
63 sizeof(*pregs) * PROMREG_MAX);
64 if (err == 0 || err == -1)
66 if (((pregs[0].phys_hi >> 8) & 0xff) == pdev->devfn) {
67 *nregs = err / sizeof(*pregs);
72 node = prom_getsibling(node);
77 /* Older versions of OBP on PCI systems encode 64-bit MEM
78 * space assignments incorrectly, this fixes them up. We also
79 * take the opportunity here to hide other kinds of bogus
82 static void __init fixup_obp_assignments(struct pci_dev *pdev,
83 struct pcidev_cookie *pcp)
87 if (pdev->vendor == PCI_VENDOR_ID_AL &&
88 (pdev->device == PCI_DEVICE_ID_AL_M7101 ||
89 pdev->device == PCI_DEVICE_ID_AL_M1533)) {
92 /* Zap all of the normal resources, they are
93 * meaningless and generate bogus resource collision
94 * messages. This is OpenBoot's ill-fated attempt to
95 * represent the implicit resources that these devices
98 pcp->num_prom_assignments = 0;
99 for (i = 0; i < 6; i++) {
100 pdev->resource[i].start =
101 pdev->resource[i].end =
102 pdev->resource[i].flags = 0;
104 pdev->resource[PCI_ROM_RESOURCE].start =
105 pdev->resource[PCI_ROM_RESOURCE].end =
106 pdev->resource[PCI_ROM_RESOURCE].flags = 0;
110 for (i = 0; i < pcp->num_prom_assignments; i++) {
111 struct linux_prom_pci_registers *ap;
114 ap = &pcp->prom_assignments[i];
115 space = ap->phys_hi >> 24;
116 if ((space & 0x3) == 2 &&
117 (space & 0x4) != 0) {
118 ap->phys_hi &= ~(0x7 << 24);
119 ap->phys_hi |= 0x3 << 24;
124 /* Fill in the PCI device cookie sysdata for the given
125 * PCI device. This cookie is the means by which one
126 * can get to OBP and PCI controller specific information
129 static void __init pdev_cookie_fillin(struct pci_pbm_info *pbm,
130 struct pci_dev *pdev,
133 struct linux_prom_pci_registers pregs[PROMREG_MAX];
134 struct pcidev_cookie *pcp;
135 int device_prom_node, nregs, err;
137 device_prom_node = find_device_prom_node(pbm, pdev, bus_prom_node,
139 if (device_prom_node == 0) {
140 /* If it is not in the OBP device tree then
141 * there must be a damn good reason for it.
143 * So what we do is delete the device from the
144 * PCI device tree completely. This scenario
145 * is seen, for example, on CP1500 for the
146 * second EBUS/HappyMeal pair if the external
147 * connector for it is not present.
149 pci_remove_bus_device(pdev);
153 pcp = kmalloc(sizeof(*pcp), GFP_ATOMIC);
155 prom_printf("PCI_COOKIE: Fatal malloc error, aborting...\n");
159 pcp->prom_node = device_prom_node;
160 memcpy(pcp->prom_regs, pregs, sizeof(pcp->prom_regs));
161 pcp->num_prom_regs = nregs;
162 err = prom_getproperty(device_prom_node, "name",
163 pcp->prom_name, sizeof(pcp->prom_name));
165 pcp->prom_name[err] = 0;
167 pcp->prom_name[0] = 0;
169 err = prom_getproperty(device_prom_node,
170 "assigned-addresses",
171 (char *)pcp->prom_assignments,
172 sizeof(pcp->prom_assignments));
173 if (err == 0 || err == -1)
174 pcp->num_prom_assignments = 0;
176 pcp->num_prom_assignments =
177 (err / sizeof(pcp->prom_assignments[0]));
179 if (strcmp(pcp->prom_name, "ebus") == 0) {
180 struct linux_prom_ebus_ranges erng[PROM_PCIRNG_MAX];
183 /* EBUS is special... */
184 err = prom_getproperty(device_prom_node, "ranges",
185 (char *)&erng[0], sizeof(erng));
186 if (err == 0 || err == -1) {
187 prom_printf("EBUS: Fatal error, no range property\n");
190 err = (err / sizeof(erng[0]));
191 for(iter = 0; iter < err; iter++) {
192 struct linux_prom_ebus_ranges *ep = &erng[iter];
193 struct linux_prom_pci_registers *ap;
195 ap = &pcp->prom_assignments[iter];
197 ap->phys_hi = ep->parent_phys_hi;
198 ap->phys_mid = ep->parent_phys_mid;
199 ap->phys_lo = ep->parent_phys_lo;
201 ap->size_lo = ep->size;
203 pcp->num_prom_assignments = err;
206 fixup_obp_assignments(pdev, pcp);
211 void __init pci_fill_in_pbm_cookies(struct pci_bus *pbus,
212 struct pci_pbm_info *pbm,
215 struct pci_dev *pdev, *pdev_next;
216 struct pci_bus *this_pbus, *pbus_next;
218 /* This must be _safe because the cookie fillin
219 routine can delete devices from the tree. */
220 list_for_each_entry_safe(pdev, pdev_next, &pbus->devices, bus_list)
221 pdev_cookie_fillin(pbm, pdev, prom_node);
223 list_for_each_entry_safe(this_pbus, pbus_next, &pbus->children, node) {
224 struct pcidev_cookie *pcp = this_pbus->self->sysdata;
226 pci_fill_in_pbm_cookies(this_pbus, pbm, pcp->prom_node);
230 static void __init bad_assignment(struct pci_dev *pdev,
231 struct linux_prom_pci_registers *ap,
232 struct resource *res,
235 prom_printf("PCI: Bogus PROM assignment. BUS[%02x] DEVFN[%x]\n",
236 pdev->bus->number, pdev->devfn);
238 prom_printf("PCI: phys[%08x:%08x:%08x] size[%08x:%08x]\n",
239 ap->phys_hi, ap->phys_mid, ap->phys_lo,
240 ap->size_hi, ap->size_lo);
242 prom_printf("PCI: RES[%016lx-->%016lx:(%lx)]\n",
243 res->start, res->end, res->flags);
244 prom_printf("Please email this information to davem@redhat.com\n");
249 static struct resource *
250 __init get_root_resource(struct linux_prom_pci_registers *ap,
251 struct pci_pbm_info *pbm)
253 int space = (ap->phys_hi >> 24) & 3;
257 /* Configuration space, silently ignore it. */
261 /* 16-bit IO space */
262 return &pbm->io_space;
265 /* 32-bit MEM space */
266 return &pbm->mem_space;
269 /* 64-bit MEM space, these are allocated out of
270 * the 32-bit mem_space range for the PBM, ie.
271 * we just zero out the upper 32-bits.
273 return &pbm->mem_space;
276 printk("PCI: What is resource space %x? "
277 "Tell davem@redhat.com about it!\n", space);
282 static struct resource *
283 __init get_device_resource(struct linux_prom_pci_registers *ap,
284 struct pci_dev *pdev)
286 struct resource *res;
287 int breg = (ap->phys_hi & 0xff);
290 case PCI_ROM_ADDRESS:
291 /* Unfortunately I have seen several cases where
292 * buggy FCODE uses a space value of '1' (I/O space)
293 * in the register property for the ROM address
294 * so disable this sanity check for now.
298 int space = (ap->phys_hi >> 24) & 3;
300 /* It had better be MEM space. */
302 bad_assignment(pdev, ap, NULL, 0);
305 res = &pdev->resource[PCI_ROM_RESOURCE];
308 case PCI_BASE_ADDRESS_0:
309 case PCI_BASE_ADDRESS_1:
310 case PCI_BASE_ADDRESS_2:
311 case PCI_BASE_ADDRESS_3:
312 case PCI_BASE_ADDRESS_4:
313 case PCI_BASE_ADDRESS_5:
314 res = &pdev->resource[(breg - PCI_BASE_ADDRESS_0) / 4];
318 bad_assignment(pdev, ap, NULL, 0);
326 static int __init pdev_resource_collisions_expected(struct pci_dev *pdev)
328 if (pdev->vendor != PCI_VENDOR_ID_SUN)
331 if (pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS ||
332 pdev->device == PCI_DEVICE_ID_SUN_RIO_1394 ||
333 pdev->device == PCI_DEVICE_ID_SUN_RIO_USB)
339 static void __init pdev_record_assignments(struct pci_pbm_info *pbm,
340 struct pci_dev *pdev)
342 struct pcidev_cookie *pcp = pdev->sysdata;
345 for (i = 0; i < pcp->num_prom_assignments; i++) {
346 struct linux_prom_pci_registers *ap;
347 struct resource *root, *res;
349 /* The format of this property is specified in
350 * the PCI Bus Binding to IEEE1275-1994.
352 ap = &pcp->prom_assignments[i];
353 root = get_root_resource(ap, pbm);
354 res = get_device_resource(ap, pdev);
355 if (root == NULL || res == NULL ||
359 /* Ok we know which resource this PROM assignment is
360 * for, sanity check it.
362 if ((res->start & 0xffffffffUL) != ap->phys_lo)
363 bad_assignment(pdev, ap, res, 1);
365 /* If it is a 64-bit MEM space assignment, verify that
366 * the resource is too and that the upper 32-bits match.
368 if (((ap->phys_hi >> 24) & 3) == 3) {
369 if (((res->flags & IORESOURCE_MEM) == 0) ||
370 ((res->flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK)
371 != PCI_BASE_ADDRESS_MEM_TYPE_64))
372 bad_assignment(pdev, ap, res, 1);
373 if ((res->start >> 32) != ap->phys_mid)
374 bad_assignment(pdev, ap, res, 1);
376 /* PBM cannot generate cpu initiated PIOs
377 * to the full 64-bit space. Therefore the
378 * upper 32-bits better be zero. If it is
379 * not, just skip it and we will assign it
380 * properly ourselves.
382 if ((res->start >> 32) != 0UL) {
383 printk(KERN_ERR "PCI: OBP assigns out of range MEM address "
384 "%016lx for region %ld on device %s\n",
385 res->start, (res - &pdev->resource[0]), pci_name(pdev));
390 /* Adjust the resource into the physical address space
393 pbm->parent->resource_adjust(pdev, res, root);
395 if (request_resource(root, res) < 0) {
396 /* OK, there is some conflict. But this is fine
397 * since we'll reassign it in the fixup pass.
399 * We notify the user that OBP made an error if it
400 * is a case we don't expect.
402 if (!pdev_resource_collisions_expected(pdev)) {
403 printk(KERN_ERR "PCI: Address space collision on region %ld "
404 "[%016lx:%016lx] of device %s\n",
405 (res - &pdev->resource[0]),
406 res->start, res->end,
413 void __init pci_record_assignments(struct pci_pbm_info *pbm,
414 struct pci_bus *pbus)
419 list_for_each_entry(dev, &pbus->devices, bus_list)
420 pdev_record_assignments(pbm, dev);
422 list_for_each_entry(bus, &pbus->children, node)
423 pci_record_assignments(pbm, bus);
426 /* Return non-zero if PDEV has implicit I/O resources even
427 * though it may not have an I/O base address register
430 static int __init has_implicit_io(struct pci_dev *pdev)
432 int class = pdev->class >> 8;
434 if (class == PCI_CLASS_NOT_DEFINED ||
435 class == PCI_CLASS_NOT_DEFINED_VGA ||
436 class == PCI_CLASS_STORAGE_IDE ||
437 (pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)
443 static void __init pdev_assign_unassigned(struct pci_pbm_info *pbm,
444 struct pci_dev *pdev)
448 int i, io_seen, mem_seen;
450 io_seen = mem_seen = 0;
451 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
452 struct resource *root, *res;
453 unsigned long size, min, max, align;
455 res = &pdev->resource[i];
457 if (res->flags & IORESOURCE_IO)
459 else if (res->flags & IORESOURCE_MEM)
462 /* If it is already assigned or the resource does
463 * not exist, there is nothing to do.
465 if (res->parent != NULL || res->flags == 0UL)
468 /* Determine the root we allocate from. */
469 if (res->flags & IORESOURCE_IO) {
470 root = &pbm->io_space;
471 min = root->start + 0x400UL;
474 root = &pbm->mem_space;
476 max = min + 0x80000000UL;
479 size = res->end - res->start;
481 if (allocate_resource(root, res, size + 1, min, max, align, NULL, NULL) < 0) {
483 prom_printf("PCI: Failed to allocate resource %d for %s\n",
488 /* Update PCI config space. */
489 pbm->parent->base_address_update(pdev, i);
492 /* Special case, disable the ROM. Several devices
493 * act funny (ie. do not respond to memory space writes)
494 * when it is left enabled. A good example are Qlogic,ISP
497 pci_read_config_dword(pdev, PCI_ROM_ADDRESS, ®);
498 reg &= ~PCI_ROM_ADDRESS_ENABLE;
499 pci_write_config_dword(pdev, PCI_ROM_ADDRESS, reg);
501 /* If we saw I/O or MEM resources, enable appropriate
502 * bits in PCI command register.
504 if (io_seen || mem_seen) {
505 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
506 if (io_seen || has_implicit_io(pdev))
507 cmd |= PCI_COMMAND_IO;
509 cmd |= PCI_COMMAND_MEMORY;
510 pci_write_config_word(pdev, PCI_COMMAND, cmd);
513 /* If this is a PCI bridge or an IDE controller,
514 * enable bus mastering. In the former case also
515 * set the cache line size correctly.
517 if (((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI) ||
518 (((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) &&
519 ((pdev->class & 0x80) != 0))) {
520 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
521 cmd |= PCI_COMMAND_MASTER;
522 pci_write_config_word(pdev, PCI_COMMAND, cmd);
524 if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI)
525 pci_write_config_byte(pdev,
531 void __init pci_assign_unassigned(struct pci_pbm_info *pbm,
532 struct pci_bus *pbus)
537 list_for_each_entry(dev, &pbus->devices, bus_list)
538 pdev_assign_unassigned(pbm, dev);
540 list_for_each_entry(bus, &pbus->children, node)
541 pci_assign_unassigned(pbm, bus);
544 static inline unsigned int pci_slot_swivel(struct pci_pbm_info *pbm,
545 struct pci_dev *toplevel_pdev,
546 struct pci_dev *pdev,
547 unsigned int interrupt)
551 if (unlikely(interrupt < 1 || interrupt > 4)) {
552 printk("%s: Device %s interrupt value of %u is strange.\n",
553 pbm->name, pci_name(pdev), interrupt);
557 ret = ((interrupt - 1 + (PCI_SLOT(pdev->devfn) & 3)) & 3) + 1;
559 printk("%s: %s IRQ Swivel %s [%x:%x] -> [%x]\n",
560 pbm->name, pci_name(toplevel_pdev), pci_name(pdev),
561 interrupt, PCI_SLOT(pdev->devfn), ret);
566 static inline unsigned int pci_apply_intmap(struct pci_pbm_info *pbm,
567 struct pci_dev *toplevel_pdev,
568 struct pci_dev *pbus,
569 struct pci_dev *pdev,
570 unsigned int interrupt,
573 struct linux_prom_pci_intmap imap[PROM_PCIIMAP_MAX];
574 struct linux_prom_pci_intmask imask;
575 struct pcidev_cookie *pbus_pcp = pbus->sysdata;
576 struct pcidev_cookie *pdev_pcp = pdev->sysdata;
577 struct linux_prom_pci_registers *pregs = pdev_pcp->prom_regs;
578 int plen, num_imap, i;
579 unsigned int hi, mid, lo, irq, orig_interrupt;
581 *cnode = pbus_pcp->prom_node;
583 plen = prom_getproperty(pbus_pcp->prom_node, "interrupt-map",
584 (char *) &imap[0], sizeof(imap));
586 (plen % sizeof(struct linux_prom_pci_intmap)) != 0) {
587 printk("%s: Device %s interrupt-map has bad len %d\n",
588 pbm->name, pci_name(pbus), plen);
591 num_imap = plen / sizeof(struct linux_prom_pci_intmap);
593 plen = prom_getproperty(pbus_pcp->prom_node, "interrupt-map-mask",
594 (char *) &imask, sizeof(imask));
596 (plen % sizeof(struct linux_prom_pci_intmask)) != 0) {
597 printk("%s: Device %s interrupt-map-mask has bad len %d\n",
598 pbm->name, pci_name(pbus), plen);
602 orig_interrupt = interrupt;
604 hi = pregs->phys_hi & imask.phys_hi;
605 mid = pregs->phys_mid & imask.phys_mid;
606 lo = pregs->phys_lo & imask.phys_lo;
607 irq = interrupt & imask.interrupt;
609 for (i = 0; i < num_imap; i++) {
610 if (imap[i].phys_hi == hi &&
611 imap[i].phys_mid == mid &&
612 imap[i].phys_lo == lo &&
613 imap[i].interrupt == irq) {
614 *cnode = imap[i].cnode;
615 interrupt = imap[i].cinterrupt;
619 printk("%s: %s MAP BUS %s DEV %s [%x] -> [%x]\n",
620 pbm->name, pci_name(toplevel_pdev),
621 pci_name(pbus), pci_name(pdev),
622 orig_interrupt, interrupt);
628 /* For each PCI bus on the way to the root:
629 * 1) If it has an interrupt-map property, apply it.
630 * 2) Else, swivel the interrupt number based upon the PCI device number.
632 * Return the "IRQ controller" node. If this is the PBM's device node,
633 * all interrupt translations are complete, else we should use that node's
634 * "reg" property to apply the PBM's "interrupt-{map,mask}" to the interrupt.
636 static unsigned int __init pci_intmap_match_to_root(struct pci_pbm_info *pbm,
637 struct pci_dev *pdev,
638 unsigned int *interrupt)
640 struct pci_dev *toplevel_pdev = pdev;
641 struct pcidev_cookie *toplevel_pcp = toplevel_pdev->sysdata;
642 unsigned int cnode = toplevel_pcp->prom_node;
644 while (pdev->bus->number != pbm->pci_first_busno) {
645 struct pci_dev *pbus = pdev->bus->self;
646 struct pcidev_cookie *pcp = pbus->sysdata;
649 plen = prom_getproplen(pcp->prom_node, "interrupt-map");
651 *interrupt = pci_slot_swivel(pbm, toplevel_pdev,
653 cnode = pcp->prom_node;
655 *interrupt = pci_apply_intmap(pbm, toplevel_pdev,
659 while (pcp->prom_node != cnode &&
660 pbus->bus->number != pbm->pci_first_busno) {
661 pbus = pbus->bus->self;
667 if (cnode == pbm->prom_node)
674 static int __init pci_intmap_match(struct pci_dev *pdev, unsigned int *interrupt)
676 struct pcidev_cookie *dev_pcp = pdev->sysdata;
677 struct pci_pbm_info *pbm = dev_pcp->pbm;
678 struct linux_prom_pci_registers reg[PROMREG_MAX];
679 unsigned int hi, mid, lo, irq;
682 cnode = pci_intmap_match_to_root(pbm, pdev, interrupt);
683 if (cnode == pbm->prom_node)
686 plen = prom_getproperty(cnode, "reg", (char *) reg, sizeof(reg));
688 (plen % sizeof(struct linux_prom_pci_registers)) != 0) {
689 printk("%s: OBP node %x reg property has bad len %d\n",
690 pbm->name, cnode, plen);
694 hi = reg[0].phys_hi & pbm->pbm_intmask.phys_hi;
695 mid = reg[0].phys_mid & pbm->pbm_intmask.phys_mid;
696 lo = reg[0].phys_lo & pbm->pbm_intmask.phys_lo;
697 irq = *interrupt & pbm->pbm_intmask.interrupt;
699 for (i = 0; i < pbm->num_pbm_intmap; i++) {
700 struct linux_prom_pci_intmap *intmap;
702 intmap = &pbm->pbm_intmap[i];
704 if (intmap->phys_hi == hi &&
705 intmap->phys_mid == mid &&
706 intmap->phys_lo == lo &&
707 intmap->interrupt == irq) {
708 *interrupt = intmap->cinterrupt;
717 printk("PCI-IRQ: Routing bus[%2x] slot[%2x] to INO[%02x]\n",
718 pdev->bus->number, PCI_SLOT(pdev->devfn),
723 static void __init pdev_fixup_irq(struct pci_dev *pdev)
725 struct pcidev_cookie *pcp = pdev->sysdata;
726 struct pci_pbm_info *pbm = pcp->pbm;
727 struct pci_controller_info *p = pbm->parent;
728 unsigned int portid = pbm->portid;
729 unsigned int prom_irq;
730 int prom_node = pcp->prom_node;
733 /* If this is an empty EBUS device, sometimes OBP fails to
734 * give it a valid fully specified interrupts property.
735 * The EBUS hooked up to SunHME on PCI I/O boards of
736 * Ex000 systems is one such case.
738 * The interrupt is not important so just ignore it.
740 if (pdev->vendor == PCI_VENDOR_ID_SUN &&
741 pdev->device == PCI_DEVICE_ID_SUN_EBUS &&
742 !prom_getchild(prom_node)) {
747 err = prom_getproperty(prom_node, "interrupts",
748 (char *)&prom_irq, sizeof(prom_irq));
749 if (err == 0 || err == -1) {
754 if (tlb_type != hypervisor) {
755 /* Fully specified already? */
756 if (((prom_irq & PCI_IRQ_IGN) >> 6) == portid) {
757 pdev->irq = p->irq_build(pbm, pdev, prom_irq);
761 /* An onboard device? (bit 5 set) */
762 if ((prom_irq & PCI_IRQ_INO) & 0x20) {
763 pdev->irq = p->irq_build(pbm, pdev, (portid << 6 | prom_irq));
768 /* Can we find a matching entry in the interrupt-map? */
769 if (pci_intmap_match(pdev, &prom_irq)) {
770 pdev->irq = p->irq_build(pbm, pdev, (portid << 6) | prom_irq);
774 /* Ok, we have to do it the hard way. */
776 unsigned int bus, slot, line;
778 bus = (pbm == &pbm->parent->pbm_B) ? (1 << 4) : 0;
780 /* If we have a legal interrupt property, use it as
783 if (prom_irq > 0 && prom_irq < 5) {
784 line = ((prom_irq - 1) & 3);
788 /* Else just directly consult PCI config space. */
789 pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pci_irq_line);
790 line = ((pci_irq_line - 1) & 3);
793 /* Now figure out the slot.
795 * Basically, device number zero on the top-level bus is
796 * always the PCI host controller. Slot 0 is then device 1.
797 * PBM A supports two external slots (0 and 1), and PBM B
798 * supports 4 external slots (0, 1, 2, and 3). On-board PCI
799 * devices are wired to device numbers outside of these
802 if (pdev->bus->number == pbm->pci_first_busno) {
803 slot = PCI_SLOT(pdev->devfn) - pbm->pci_first_slot;
805 struct pci_dev *bus_dev;
807 /* Underneath a bridge, use slot number of parent
808 * bridge which is closest to the PBM.
810 bus_dev = pdev->bus->self;
811 while (bus_dev->bus &&
812 bus_dev->bus->number != pbm->pci_first_busno)
813 bus_dev = bus_dev->bus->self;
815 slot = PCI_SLOT(bus_dev->devfn) - pbm->pci_first_slot;
819 pdev->irq = p->irq_build(pbm, pdev,
820 ((portid << 6) & PCI_IRQ_IGN) |
821 (bus | slot | line));
825 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE,
826 pdev->irq & PCI_IRQ_INO);
829 void __init pci_fixup_irq(struct pci_pbm_info *pbm,
830 struct pci_bus *pbus)
835 list_for_each_entry(dev, &pbus->devices, bus_list)
838 list_for_each_entry(bus, &pbus->children, node)
839 pci_fixup_irq(pbm, bus);
842 static void pdev_setup_busmastering(struct pci_dev *pdev, int is_66mhz)
845 u8 hdr_type, min_gnt, ltimer;
847 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
848 cmd |= PCI_COMMAND_MASTER;
849 pci_write_config_word(pdev, PCI_COMMAND, cmd);
851 /* Read it back, if the mastering bit did not
852 * get set, the device does not support bus
853 * mastering so we have nothing to do here.
855 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
856 if ((cmd & PCI_COMMAND_MASTER) == 0)
859 /* Set correct cache line size, 64-byte on all
860 * Sparc64 PCI systems. Note that the value is
861 * measured in 32-bit words.
863 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
866 pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr_type);
868 if (hdr_type != PCI_HEADER_TYPE_NORMAL)
871 /* If the latency timer is already programmed with a non-zero
872 * value, assume whoever set it (OBP or whoever) knows what
875 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, <imer);
879 /* XXX Since I'm tipping off the min grant value to
880 * XXX choose a suitable latency timer value, I also
881 * XXX considered making use of the max latency value
882 * XXX as well. Unfortunately I've seen too many bogusly
883 * XXX low settings for it to the point where it lacks
884 * XXX any usefulness. In one case, an ethernet card
885 * XXX claimed a min grant of 10 and a max latency of 5.
886 * XXX Now, if I had two such cards on the same bus I
887 * XXX could not set the desired burst period (calculated
888 * XXX from min grant) without violating the max latency
891 * XXX I blame dumb PC bios implementors for stuff like
892 * XXX this, most of them don't even try to do something
893 * XXX sensible with latency timer values and just set some
894 * XXX default value (usually 32) into every device.
897 pci_read_config_byte(pdev, PCI_MIN_GNT, &min_gnt);
900 /* If no min_gnt setting then use a default
915 /* Use a default value when the min_gnt value
916 * is erroneously high.
918 if (((unsigned int) min_gnt << shift_factor) > 512 ||
919 ((min_gnt << shift_factor) & 0xff) == 0) {
920 ltimer = 8 << shift_factor;
922 ltimer = min_gnt << shift_factor;
926 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ltimer);
929 void pci_determine_66mhz_disposition(struct pci_pbm_info *pbm,
930 struct pci_bus *pbus)
932 struct pci_dev *pdev;
936 if (pbm->is_66mhz_capable == 0) {
942 list_for_each_entry(pdev, &pbus->devices, bus_list) {
943 pci_read_config_word(pdev, PCI_STATUS, &status);
944 if (!(status & PCI_STATUS_66MHZ)) {
950 pbm->all_devs_66mhz = all_are_66mhz;
952 printk("PCI%d(PBM%c): Bus running at %dMHz\n",
954 (pbm == &pbm->parent->pbm_A) ? 'A' : 'B',
955 (all_are_66mhz ? 66 : 33));
958 void pci_setup_busmastering(struct pci_pbm_info *pbm,
959 struct pci_bus *pbus)
965 is_66mhz = pbm->is_66mhz_capable && pbm->all_devs_66mhz;
967 list_for_each_entry(dev, &pbus->devices, bus_list)
968 pdev_setup_busmastering(dev, is_66mhz);
970 list_for_each_entry(bus, &pbus->children, node)
971 pci_setup_busmastering(pbm, bus);
974 void pci_register_legacy_regions(struct resource *io_res,
975 struct resource *mem_res)
980 p = kzalloc(sizeof(*p), GFP_KERNEL);
984 p->name = "Video RAM area";
985 p->start = mem_res->start + 0xa0000UL;
986 p->end = p->start + 0x1ffffUL;
987 p->flags = IORESOURCE_BUSY;
988 request_resource(mem_res, p);
990 p = kzalloc(sizeof(*p), GFP_KERNEL);
994 p->name = "System ROM";
995 p->start = mem_res->start + 0xf0000UL;
996 p->end = p->start + 0xffffUL;
997 p->flags = IORESOURCE_BUSY;
998 request_resource(mem_res, p);
1000 p = kzalloc(sizeof(*p), GFP_KERNEL);
1004 p->name = "Video ROM";
1005 p->start = mem_res->start + 0xc0000UL;
1006 p->end = p->start + 0x7fffUL;
1007 p->flags = IORESOURCE_BUSY;
1008 request_resource(mem_res, p);
1011 /* Generic helper routines for PCI error reporting. */
1012 void pci_scan_for_target_abort(struct pci_controller_info *p,
1013 struct pci_pbm_info *pbm,
1014 struct pci_bus *pbus)
1016 struct pci_dev *pdev;
1017 struct pci_bus *bus;
1019 list_for_each_entry(pdev, &pbus->devices, bus_list) {
1020 u16 status, error_bits;
1022 pci_read_config_word(pdev, PCI_STATUS, &status);
1024 (status & (PCI_STATUS_SIG_TARGET_ABORT |
1025 PCI_STATUS_REC_TARGET_ABORT));
1027 pci_write_config_word(pdev, PCI_STATUS, error_bits);
1028 printk("PCI%d(PBM%c): Device [%s] saw Target Abort [%016x]\n",
1029 p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
1030 pci_name(pdev), status);
1034 list_for_each_entry(bus, &pbus->children, node)
1035 pci_scan_for_target_abort(p, pbm, bus);
1038 void pci_scan_for_master_abort(struct pci_controller_info *p,
1039 struct pci_pbm_info *pbm,
1040 struct pci_bus *pbus)
1042 struct pci_dev *pdev;
1043 struct pci_bus *bus;
1045 list_for_each_entry(pdev, &pbus->devices, bus_list) {
1046 u16 status, error_bits;
1048 pci_read_config_word(pdev, PCI_STATUS, &status);
1050 (status & (PCI_STATUS_REC_MASTER_ABORT));
1052 pci_write_config_word(pdev, PCI_STATUS, error_bits);
1053 printk("PCI%d(PBM%c): Device [%s] received Master Abort [%016x]\n",
1054 p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
1055 pci_name(pdev), status);
1059 list_for_each_entry(bus, &pbus->children, node)
1060 pci_scan_for_master_abort(p, pbm, bus);
1063 void pci_scan_for_parity_error(struct pci_controller_info *p,
1064 struct pci_pbm_info *pbm,
1065 struct pci_bus *pbus)
1067 struct pci_dev *pdev;
1068 struct pci_bus *bus;
1070 list_for_each_entry(pdev, &pbus->devices, bus_list) {
1071 u16 status, error_bits;
1073 pci_read_config_word(pdev, PCI_STATUS, &status);
1075 (status & (PCI_STATUS_PARITY |
1076 PCI_STATUS_DETECTED_PARITY));
1078 pci_write_config_word(pdev, PCI_STATUS, error_bits);
1079 printk("PCI%d(PBM%c): Device [%s] saw Parity Error [%016x]\n",
1080 p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
1081 pci_name(pdev), status);
1085 list_for_each_entry(bus, &pbus->children, node)
1086 pci_scan_for_parity_error(p, pbm, bus);