git.oblomov.eu Git - linux-2.6/blob - drivers/usb/gadget/omap_udc.c

   1 /*
   2  * omap_udc.c -- for OMAP full speed udc; most chips support OTG.
   3  *
   4  * Copyright (C) 2004 Texas Instruments, Inc.
   5  * Copyright (C) 2004-2005 David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #undef  DEBUG
  23 #undef  VERBOSE
  24
  25 #include <linux/config.h>
  26 #include <linux/module.h>
  27 #include <linux/kernel.h>
  28 #include <linux/ioport.h>
  29 #include <linux/types.h>
  30 #include <linux/errno.h>
  31 #include <linux/delay.h>
  32 #include <linux/sched.h>
  33 #include <linux/slab.h>
  34 #include <linux/init.h>
  35 #include <linux/timer.h>
  36 #include <linux/list.h>
  37 #include <linux/interrupt.h>
  38 #include <linux/proc_fs.h>
  39 #include <linux/mm.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/platform_device.h>
  42 #include <linux/usb_ch9.h>
  43 #include <linux/usb_gadget.h>
  44 #include <linux/usb_otg.h>
  45 #include <linux/dma-mapping.h>
  46
  47 #include <asm/byteorder.h>
  48 #include <asm/io.h>
  49 #include <asm/irq.h>
  50 #include <asm/system.h>
  51 #include <asm/unaligned.h>
  52 #include <asm/mach-types.h>
  53
  54 #include <asm/arch/dma.h>
  55 #include <asm/arch/usb.h>
  56
  57 #include "omap_udc.h"
  58
  59 #undef  USB_TRACE
  60
  61 /* bulk DMA seems to be behaving for both IN and OUT */
  62 #define USE_DMA
  63
  64 /* ISO too */
  65 #define USE_ISO
  66
  67 #define DRIVER_DESC     "OMAP UDC driver"
  68 #define DRIVER_VERSION  "4 October 2004"
  69
  70 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  71
  72
  73 /*
  74  * The OMAP UDC needs _very_ early endpoint setup:  before enabling the
  75  * D+ pullup to allow enumeration.  That's too early for the gadget
  76  * framework to use from usb_endpoint_enable(), which happens after
  77  * enumeration as part of activating an interface.  (But if we add an
  78  * optional new "UDC not yet running" state to the gadget driver model,
  79  * even just during driver binding, the endpoint autoconfig logic is the
  80  * natural spot to manufacture new endpoints.)
  81  *
  82  * So instead of using endpoint enable calls to control the hardware setup,
  83  * this driver defines a "fifo mode" parameter.  It's used during driver
  84  * initialization to choose among a set of pre-defined endpoint configs.
  85  * See omap_udc_setup() for available modes, or to add others.  That code
  86  * lives in an init section, so use this driver as a module if you need
  87  * to change the fifo mode after the kernel boots.
  88  *
  89  * Gadget drivers normally ignore endpoints they don't care about, and
  90  * won't include them in configuration descriptors.  That means only
  91  * misbehaving hosts would even notice they exist.
  92  */
  93 #ifdef  USE_ISO
  94 static unsigned fifo_mode = 3;
  95 #else
  96 static unsigned fifo_mode = 0;
  97 #endif
  98
  99 /* "modprobe omap_udc fifo_mode=42", or else as a kernel
 100  * boot parameter "omap_udc:fifo_mode=42"
 101  */
 102 module_param (fifo_mode, uint, 0);
 103 MODULE_PARM_DESC (fifo_mode, "endpoint setup (0 == default)");
 104
 105 #ifdef  USE_DMA
 106 static unsigned use_dma = 1;
 107
 108 /* "modprobe omap_udc use_dma=y", or else as a kernel
 109  * boot parameter "omap_udc:use_dma=y"
 110  */
 111 module_param (use_dma, bool, 0);
 112 MODULE_PARM_DESC (use_dma, "enable/disable DMA");
 113 #else   /* !USE_DMA */
 114
 115 /* save a bit of code */
 116 #define use_dma         0
 117 #endif  /* !USE_DMA */
 118
 119
 120 static const char driver_name [] = "omap_udc";
 121 static const char driver_desc [] = DRIVER_DESC;
 122
 123 /*-------------------------------------------------------------------------*/
 124
 125 /* there's a notion of "current endpoint" for modifying endpoint
 126  * state, and PIO access to its FIFO.
 127  */
 128
 129 static void use_ep(struct omap_ep *ep, u16 select)
 130 {
 131         u16     num = ep->bEndpointAddress & 0x0f;
 132
 133         if (ep->bEndpointAddress & USB_DIR_IN)
 134                 num |= UDC_EP_DIR;
 135         UDC_EP_NUM_REG = num | select;
 136         /* when select, MUST deselect later !! */
 137 }
 138
 139 static inline void deselect_ep(void)
 140 {
 141         UDC_EP_NUM_REG &= ~UDC_EP_SEL;
 142         /* 6 wait states before TX will happen */
 143 }
 144
 145 static void dma_channel_claim(struct omap_ep *ep, unsigned preferred);
 146
 147 /*-------------------------------------------------------------------------*/
 148
 149 static int omap_ep_enable(struct usb_ep *_ep,
 150                 const struct usb_endpoint_descriptor *desc)
 151 {
 152         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
 153         struct omap_udc *udc;
 154         unsigned long   flags;
 155         u16             maxp;
 156
 157         /* catch various bogus parameters */
 158         if (!_ep || !desc || ep->desc
 159                         || desc->bDescriptorType != USB_DT_ENDPOINT
 160                         || ep->bEndpointAddress != desc->bEndpointAddress
 161                         || ep->maxpacket < le16_to_cpu
 162                                                 (desc->wMaxPacketSize)) {
 163                 DBG("%s, bad ep or descriptor\n", __FUNCTION__);
 164                 return -EINVAL;
 165         }
 166         maxp = le16_to_cpu (desc->wMaxPacketSize);
 167         if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
 168                                 && maxp != ep->maxpacket)
 169                         || le16_to_cpu(desc->wMaxPacketSize) > ep->maxpacket
 170                         || !desc->wMaxPacketSize) {
 171                 DBG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
 172                 return -ERANGE;
 173         }
 174
 175 #ifdef  USE_ISO
 176         if ((desc->bmAttributes == USB_ENDPOINT_XFER_ISOC
 177                                 && desc->bInterval != 1)) {
 178                 /* hardware wants period = 1; USB allows 2^(Interval-1) */
 179                 DBG("%s, unsupported ISO period %dms\n", _ep->name,
 180                                 1 << (desc->bInterval - 1));
 181                 return -EDOM;
 182         }
 183 #else
 184         if (desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 185                 DBG("%s, ISO nyet\n", _ep->name);
 186                 return -EDOM;
 187         }
 188 #endif
 189
 190         /* xfer types must match, except that interrupt ~= bulk */
 191         if (ep->bmAttributes != desc->bmAttributes
 192                         && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
 193                         && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
 194                 DBG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
 195                 return -EINVAL;
 196         }
 197
 198         udc = ep->udc;
 199         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
 200                 DBG("%s, bogus device state\n", __FUNCTION__);
 201                 return -ESHUTDOWN;
 202         }
 203
 204         spin_lock_irqsave(&udc->lock, flags);
 205
 206         ep->desc = desc;
 207         ep->irqs = 0;
 208         ep->stopped = 0;
 209         ep->ep.maxpacket = maxp;
 210
 211         /* set endpoint to initial state */
 212         ep->dma_channel = 0;
 213         ep->has_dma = 0;
 214         ep->lch = -1;
 215         use_ep(ep, UDC_EP_SEL);
 216         UDC_CTRL_REG = udc->clr_halt;
 217         ep->ackwait = 0;
 218         deselect_ep();
 219
 220         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
 221                 list_add(&ep->iso, &udc->iso);
 222
 223         /* maybe assign a DMA channel to this endpoint */
 224         if (use_dma && desc->bmAttributes == USB_ENDPOINT_XFER_BULK)
 225                 /* FIXME ISO can dma, but prefers first channel */
 226                 dma_channel_claim(ep, 0);
 227
 228         /* PIO OUT may RX packets */
 229         if (desc->bmAttributes != USB_ENDPOINT_XFER_ISOC
 230                         && !ep->has_dma
 231                         && !(ep->bEndpointAddress & USB_DIR_IN)) {
 232                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
 233                 ep->ackwait = 1 + ep->double_buf;
 234         }
 235
 236         spin_unlock_irqrestore(&udc->lock, flags);
 237         VDBG("%s enabled\n", _ep->name);
 238         return 0;
 239 }
 240
 241 static void nuke(struct omap_ep *, int status);
 242
 243 static int omap_ep_disable(struct usb_ep *_ep)
 244 {
 245         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
 246         unsigned long   flags;
 247
 248         if (!_ep || !ep->desc) {
 249                 DBG("%s, %s not enabled\n", __FUNCTION__,
 250                         _ep ? ep->ep.name : NULL);
 251                 return -EINVAL;
 252         }
 253
 254         spin_lock_irqsave(&ep->udc->lock, flags);
 255         ep->desc = NULL;
 256         nuke (ep, -ESHUTDOWN);
 257         ep->ep.maxpacket = ep->maxpacket;
 258         ep->has_dma = 0;
 259         UDC_CTRL_REG = UDC_SET_HALT;
 260         list_del_init(&ep->iso);
 261         del_timer(&ep->timer);
 262
 263         spin_unlock_irqrestore(&ep->udc->lock, flags);
 264
 265         VDBG("%s disabled\n", _ep->name);
 266         return 0;
 267 }
 268
 269 /*-------------------------------------------------------------------------*/
 270
 271 static struct usb_request *
 272 omap_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
 273 {
 274         struct omap_req *req;
 275
 276         req = kzalloc(sizeof(*req), gfp_flags);
 277         if (req) {
 278                 req->req.dma = DMA_ADDR_INVALID;
 279                 INIT_LIST_HEAD (&req->queue);
 280         }
 281         return &req->req;
 282 }
 283
 284 static void
 285 omap_free_request(struct usb_ep *ep, struct usb_request *_req)
 286 {
 287         struct omap_req *req = container_of(_req, struct omap_req, req);
 288
 289         if (_req)
 290                 kfree (req);
 291 }
 292
 293 /*-------------------------------------------------------------------------*/
 294
 295 static void *
 296 omap_alloc_buffer(
 297         struct usb_ep   *_ep,
 298         unsigned        bytes,
 299         dma_addr_t      *dma,
 300         gfp_t           gfp_flags
 301 )
 302 {
 303         void            *retval;
 304         struct omap_ep  *ep;
 305
 306         ep = container_of(_ep, struct omap_ep, ep);
 307         if (use_dma && ep->has_dma) {
 308                 static int      warned;
 309                 if (!warned && bytes < PAGE_SIZE) {
 310                         dev_warn(ep->udc->gadget.dev.parent,
 311                                 "using dma_alloc_coherent for "
 312                                 "small allocations wastes memory\n");
 313                         warned++;
 314                 }
 315                 return dma_alloc_coherent(ep->udc->gadget.dev.parent,
 316                                 bytes, dma, gfp_flags);
 317         }
 318
 319         retval = kmalloc(bytes, gfp_flags);
 320         if (retval)
 321                 *dma = virt_to_phys(retval);
 322         return retval;
 323 }
 324
 325 static void omap_free_buffer(
 326         struct usb_ep   *_ep,
 327         void            *buf,
 328         dma_addr_t      dma,
 329         unsigned        bytes
 330 )
 331 {
 332         struct omap_ep  *ep;
 333
 334         ep = container_of(_ep, struct omap_ep, ep);
 335         if (use_dma && _ep && ep->has_dma)
 336                 dma_free_coherent(ep->udc->gadget.dev.parent, bytes, buf, dma);
 337         else
 338                 kfree (buf);
 339 }
 340
 341 /*-------------------------------------------------------------------------*/
 342
 343 static void
 344 done(struct omap_ep *ep, struct omap_req *req, int status)
 345 {
 346         unsigned                stopped = ep->stopped;
 347
 348         list_del_init(&req->queue);
 349
 350         if (req->req.status == -EINPROGRESS)
 351                 req->req.status = status;
 352         else
 353                 status = req->req.status;
 354
 355         if (use_dma && ep->has_dma) {
 356                 if (req->mapped) {
 357                         dma_unmap_single(ep->udc->gadget.dev.parent,
 358                                 req->req.dma, req->req.length,
 359                                 (ep->bEndpointAddress & USB_DIR_IN)
 360                                         ? DMA_TO_DEVICE
 361                                         : DMA_FROM_DEVICE);
 362                         req->req.dma = DMA_ADDR_INVALID;
 363                         req->mapped = 0;
 364                 } else
 365                         dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
 366                                 req->req.dma, req->req.length,
 367                                 (ep->bEndpointAddress & USB_DIR_IN)
 368                                         ? DMA_TO_DEVICE
 369                                         : DMA_FROM_DEVICE);
 370         }
 371
 372 #ifndef USB_TRACE
 373         if (status && status != -ESHUTDOWN)
 374 #endif
 375                 VDBG("complete %s req %p stat %d len %u/%u\n",
 376                         ep->ep.name, &req->req, status,
 377                         req->req.actual, req->req.length);
 378
 379         /* don't modify queue heads during completion callback */
 380         ep->stopped = 1;
 381         spin_unlock(&ep->udc->lock);
 382         req->req.complete(&ep->ep, &req->req);
 383         spin_lock(&ep->udc->lock);
 384         ep->stopped = stopped;
 385 }
 386
 387 /*-------------------------------------------------------------------------*/
 388
 389 #define UDC_FIFO_FULL           (UDC_NON_ISO_FIFO_FULL | UDC_ISO_FIFO_FULL)
 390 #define UDC_FIFO_UNWRITABLE     (UDC_EP_HALTED | UDC_FIFO_FULL)
 391
 392 #define FIFO_EMPTY      (UDC_NON_ISO_FIFO_EMPTY | UDC_ISO_FIFO_EMPTY)
 393 #define FIFO_UNREADABLE (UDC_EP_HALTED | FIFO_EMPTY)
 394
 395 static inline int
 396 write_packet(u8 *buf, struct omap_req *req, unsigned max)
 397 {
 398         unsigned        len;
 399         u16             *wp;
 400
 401         len = min(req->req.length - req->req.actual, max);
 402         req->req.actual += len;
 403
 404         max = len;
 405         if (likely((((int)buf) & 1) == 0)) {
 406                 wp = (u16 *)buf;
 407                 while (max >= 2) {
 408                         UDC_DATA_REG = *wp++;
 409                         max -= 2;
 410                 }
 411                 buf = (u8 *)wp;
 412         }
 413         while (max--)
 414                 *(volatile u8 *)&UDC_DATA_REG = *buf++;
 415         return len;
 416 }
 417
 418 // FIXME change r/w fifo calling convention
 419
 420
 421 // return:  0 = still running, 1 = completed, negative = errno
 422 static int write_fifo(struct omap_ep *ep, struct omap_req *req)
 423 {
 424         u8              *buf;
 425         unsigned        count;
 426         int             is_last;
 427         u16             ep_stat;
 428
 429         buf = req->req.buf + req->req.actual;
 430         prefetch(buf);
 431
 432         /* PIO-IN isn't double buffered except for iso */
 433         ep_stat = UDC_STAT_FLG_REG;
 434         if (ep_stat & UDC_FIFO_UNWRITABLE)
 435                 return 0;
 436
 437         count = ep->ep.maxpacket;
 438         count = write_packet(buf, req, count);
 439         UDC_CTRL_REG = UDC_SET_FIFO_EN;
 440         ep->ackwait = 1;
 441
 442         /* last packet is often short (sometimes a zlp) */
 443         if (count != ep->ep.maxpacket)
 444                 is_last = 1;
 445         else if (req->req.length == req->req.actual
 446                         && !req->req.zero)
 447                 is_last = 1;
 448         else
 449                 is_last = 0;
 450
 451         /* NOTE:  requests complete when all IN data is in a
 452          * FIFO (or sometimes later, if a zlp was needed).
 453          * Use usb_ep_fifo_status() where needed.
 454          */
 455         if (is_last)
 456                 done(ep, req, 0);
 457         return is_last;
 458 }
 459
 460 static inline int
 461 read_packet(u8 *buf, struct omap_req *req, unsigned avail)
 462 {
 463         unsigned        len;
 464         u16             *wp;
 465
 466         len = min(req->req.length - req->req.actual, avail);
 467         req->req.actual += len;
 468         avail = len;
 469
 470         if (likely((((int)buf) & 1) == 0)) {
 471                 wp = (u16 *)buf;
 472                 while (avail >= 2) {
 473                         *wp++ = UDC_DATA_REG;
 474                         avail -= 2;
 475                 }
 476                 buf = (u8 *)wp;
 477         }
 478         while (avail--)
 479                 *buf++ = *(volatile u8 *)&UDC_DATA_REG;
 480         return len;
 481 }
 482
 483 // return:  0 = still running, 1 = queue empty, negative = errno
 484 static int read_fifo(struct omap_ep *ep, struct omap_req *req)
 485 {
 486         u8              *buf;
 487         unsigned        count, avail;
 488         int             is_last;
 489
 490         buf = req->req.buf + req->req.actual;
 491         prefetchw(buf);
 492
 493         for (;;) {
 494                 u16     ep_stat = UDC_STAT_FLG_REG;
 495
 496                 is_last = 0;
 497                 if (ep_stat & FIFO_EMPTY) {
 498                         if (!ep->double_buf)
 499                                 break;
 500                         ep->fnf = 1;
 501                 }
 502                 if (ep_stat & UDC_EP_HALTED)
 503                         break;
 504
 505                 if (ep_stat & UDC_FIFO_FULL)
 506                         avail = ep->ep.maxpacket;
 507                 else  {
 508                         avail = UDC_RXFSTAT_REG;
 509                         ep->fnf = ep->double_buf;
 510                 }
 511                 count = read_packet(buf, req, avail);
 512
 513                 /* partial packet reads may not be errors */
 514                 if (count < ep->ep.maxpacket) {
 515                         is_last = 1;
 516                         /* overflowed this request?  flush extra data */
 517                         if (count != avail) {
 518                                 req->req.status = -EOVERFLOW;
 519                                 avail -= count;
 520                                 while (avail--)
 521                                         (void) *(volatile u8 *)&UDC_DATA_REG;
 522                         }
 523                 } else if (req->req.length == req->req.actual)
 524                         is_last = 1;
 525                 else
 526                         is_last = 0;
 527
 528                 if (!ep->bEndpointAddress)
 529                         break;
 530                 if (is_last)
 531                         done(ep, req, 0);
 532                 break;
 533         }
 534         return is_last;
 535 }
 536
 537 /*-------------------------------------------------------------------------*/
 538
 539 static inline dma_addr_t dma_csac(unsigned lch)
 540 {
 541         dma_addr_t      csac;
 542
 543         /* omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
 544          * read before the DMA controller finished disabling the channel.
 545          */
 546         csac = omap_readw(OMAP_DMA_CSAC(lch));
 547         if (csac == 0)
 548                 csac = omap_readw(OMAP_DMA_CSAC(lch));
 549         return csac;
 550 }
 551
 552 static inline dma_addr_t dma_cdac(unsigned lch)
 553 {
 554         dma_addr_t      cdac;
 555
 556         /* omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
 557          * read before the DMA controller finished disabling the channel.
 558          */
 559         cdac = omap_readw(OMAP_DMA_CDAC(lch));
 560         if (cdac == 0)
 561                 cdac = omap_readw(OMAP_DMA_CDAC(lch));
 562         return cdac;
 563 }
 564
 565 static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start)
 566 {
 567         dma_addr_t      end;
 568
 569         /* IN-DMA needs this on fault/cancel paths, so 15xx misreports
 570          * the last transfer's bytecount by more than a FIFO's worth.
 571          */
 572         if (cpu_is_omap15xx())
 573                 return 0;
 574
 575         end = dma_csac(ep->lch);
 576         if (end == ep->dma_counter)
 577                 return 0;
 578
 579         end |= start & (0xffff << 16);
 580         if (end < start)
 581                 end += 0x10000;
 582         return end - start;
 583 }
 584
 585 #define DMA_DEST_LAST(x) (cpu_is_omap15xx() \
 586                 ? omap_readw(OMAP_DMA_CSAC(x)) /* really: CPC */ \
 587                 : dma_cdac(x))
 588
 589 static u16 dma_dest_len(struct omap_ep *ep, dma_addr_t start)
 590 {
 591         dma_addr_t      end;
 592
 593         end = DMA_DEST_LAST(ep->lch);
 594         if (end == ep->dma_counter)
 595                 return 0;
 596
 597         end |= start & (0xffff << 16);
 598         if (cpu_is_omap15xx())
 599                 end++;
 600         if (end < start)
 601                 end += 0x10000;
 602         return end - start;
 603 }
 604
 605
 606 /* Each USB transfer request using DMA maps to one or more DMA transfers.
 607  * When DMA completion isn't request completion, the UDC continues with
 608  * the next DMA transfer for that USB transfer.
 609  */
 610
 611 static void next_in_dma(struct omap_ep *ep, struct omap_req *req)
 612 {
 613         u16             txdma_ctrl;
 614         unsigned        length = req->req.length - req->req.actual;
 615         const int       sync_mode = cpu_is_omap15xx()
 616                                 ? OMAP_DMA_SYNC_FRAME
 617                                 : OMAP_DMA_SYNC_ELEMENT;
 618
 619         /* measure length in either bytes or packets */
 620         if ((cpu_is_omap16xx() && length <= UDC_TXN_TSC)
 621                         || (cpu_is_omap15xx() && length < ep->maxpacket)) {
 622                 txdma_ctrl = UDC_TXN_EOT | length;
 623                 omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
 624                                 length, 1, sync_mode);
 625         } else {
 626                 length = min(length / ep->maxpacket,
 627                                 (unsigned) UDC_TXN_TSC + 1);
 628                 txdma_ctrl = length;
 629                 omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S16,
 630                                 ep->ep.maxpacket >> 1, length, sync_mode);
 631                 length *= ep->maxpacket;
 632         }
 633         omap_set_dma_src_params(ep->lch, OMAP_DMA_PORT_EMIFF,
 634                 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual);
 635
 636         omap_start_dma(ep->lch);
 637         ep->dma_counter = dma_csac(ep->lch);
 638         UDC_DMA_IRQ_EN_REG |= UDC_TX_DONE_IE(ep->dma_channel);
 639         UDC_TXDMA_REG(ep->dma_channel) = UDC_TXN_START | txdma_ctrl;
 640         req->dma_bytes = length;
 641 }
 642
 643 static void finish_in_dma(struct omap_ep *ep, struct omap_req *req, int status)
 644 {
 645         if (status == 0) {
 646                 req->req.actual += req->dma_bytes;
 647
 648                 /* return if this request needs to send data or zlp */
 649                 if (req->req.actual < req->req.length)
 650                         return;
 651                 if (req->req.zero
 652                                 && req->dma_bytes != 0
 653                                 && (req->req.actual % ep->maxpacket) == 0)
 654                         return;
 655         } else
 656                 req->req.actual += dma_src_len(ep, req->req.dma
 657                                                         + req->req.actual);
 658
 659         /* tx completion */
 660         omap_stop_dma(ep->lch);
 661         UDC_DMA_IRQ_EN_REG &= ~UDC_TX_DONE_IE(ep->dma_channel);
 662         done(ep, req, status);
 663 }
 664
 665 static void next_out_dma(struct omap_ep *ep, struct omap_req *req)
 666 {
 667         unsigned packets;
 668
 669         /* NOTE:  we filtered out "short reads" before, so we know
 670          * the buffer has only whole numbers of packets.
 671          */
 672
 673         /* set up this DMA transfer, enable the fifo, start */
 674         packets = (req->req.length - req->req.actual) / ep->ep.maxpacket;
 675         packets = min(packets, (unsigned)UDC_RXN_TC + 1);
 676         req->dma_bytes = packets * ep->ep.maxpacket;
 677         omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S16,
 678                         ep->ep.maxpacket >> 1, packets,
 679                         OMAP_DMA_SYNC_ELEMENT);
 680         omap_set_dma_dest_params(ep->lch, OMAP_DMA_PORT_EMIFF,
 681                 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual);
 682         ep->dma_counter = DMA_DEST_LAST(ep->lch);
 683
 684         UDC_RXDMA_REG(ep->dma_channel) = UDC_RXN_STOP | (packets - 1);
 685         UDC_DMA_IRQ_EN_REG |= UDC_RX_EOT_IE(ep->dma_channel);
 686         UDC_EP_NUM_REG = (ep->bEndpointAddress & 0xf);
 687         UDC_CTRL_REG = UDC_SET_FIFO_EN;
 688
 689         omap_start_dma(ep->lch);
 690 }
 691
 692 static void
 693 finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status, int one)
 694 {
 695         u16     count;
 696
 697         if (status == 0)
 698                 ep->dma_counter = (u16) (req->req.dma + req->req.actual);
 699         count = dma_dest_len(ep, req->req.dma + req->req.actual);
 700         count += req->req.actual;
 701         if (one)
 702                 count--;
 703         if (count <= req->req.length)
 704                 req->req.actual = count;
 705
 706         if (count != req->dma_bytes || status)
 707                 omap_stop_dma(ep->lch);
 708
 709         /* if this wasn't short, request may need another transfer */
 710         else if (req->req.actual < req->req.length)
 711                 return;
 712
 713         /* rx completion */
 714         UDC_DMA_IRQ_EN_REG &= ~UDC_RX_EOT_IE(ep->dma_channel);
 715         done(ep, req, status);
 716 }
 717
 718 static void dma_irq(struct omap_udc *udc, u16 irq_src)
 719 {
 720         u16             dman_stat = UDC_DMAN_STAT_REG;
 721         struct omap_ep  *ep;
 722         struct omap_req *req;
 723
 724         /* IN dma: tx to host */
 725         if (irq_src & UDC_TXN_DONE) {
 726                 ep = &udc->ep[16 + UDC_DMA_TX_SRC(dman_stat)];
 727                 ep->irqs++;
 728                 /* can see TXN_DONE after dma abort */
 729                 if (!list_empty(&ep->queue)) {
 730                         req = container_of(ep->queue.next,
 731                                                 struct omap_req, queue);
 732                         finish_in_dma(ep, req, 0);
 733                 }
 734                 UDC_IRQ_SRC_REG = UDC_TXN_DONE;
 735
 736                 if (!list_empty (&ep->queue)) {
 737                         req = container_of(ep->queue.next,
 738                                         struct omap_req, queue);
 739                         next_in_dma(ep, req);
 740                 }
 741         }
 742
 743         /* OUT dma: rx from host */
 744         if (irq_src & UDC_RXN_EOT) {
 745                 ep = &udc->ep[UDC_DMA_RX_SRC(dman_stat)];
 746                 ep->irqs++;
 747                 /* can see RXN_EOT after dma abort */
 748                 if (!list_empty(&ep->queue)) {
 749                         req = container_of(ep->queue.next,
 750                                         struct omap_req, queue);
 751                         finish_out_dma(ep, req, 0, dman_stat & UDC_DMA_RX_SB);
 752                 }
 753                 UDC_IRQ_SRC_REG = UDC_RXN_EOT;
 754
 755                 if (!list_empty (&ep->queue)) {
 756                         req = container_of(ep->queue.next,
 757                                         struct omap_req, queue);
 758                         next_out_dma(ep, req);
 759                 }
 760         }
 761
 762         if (irq_src & UDC_RXN_CNT) {
 763                 ep = &udc->ep[UDC_DMA_RX_SRC(dman_stat)];
 764                 ep->irqs++;
 765                 /* omap15xx does this unasked... */
 766                 VDBG("%s, RX_CNT irq?\n", ep->ep.name);
 767                 UDC_IRQ_SRC_REG = UDC_RXN_CNT;
 768         }
 769 }
 770
 771 static void dma_error(int lch, u16 ch_status, void *data)
 772 {
 773         struct omap_ep  *ep = data;
 774
 775         /* if ch_status & OMAP_DMA_DROP_IRQ ... */
 776         /* if ch_status & OMAP_DMA_TOUT_IRQ ... */
 777         ERR("%s dma error, lch %d status %02x\n", ep->ep.name, lch, ch_status);
 778
 779         /* complete current transfer ... */
 780 }
 781
 782 static void dma_channel_claim(struct omap_ep *ep, unsigned channel)
 783 {
 784         u16     reg;
 785         int     status, restart, is_in;
 786
 787         is_in = ep->bEndpointAddress & USB_DIR_IN;
 788         if (is_in)
 789                 reg = UDC_TXDMA_CFG_REG;
 790         else
 791                 reg = UDC_RXDMA_CFG_REG;
 792         reg |= UDC_DMA_REQ;             /* "pulse" activated */
 793
 794         ep->dma_channel = 0;
 795         ep->lch = -1;
 796         if (channel == 0 || channel > 3) {
 797                 if ((reg & 0x0f00) == 0)
 798                         channel = 3;
 799                 else if ((reg & 0x00f0) == 0)
 800                         channel = 2;
 801                 else if ((reg & 0x000f) == 0)   /* preferred for ISO */
 802                         channel = 1;
 803                 else {
 804                         status = -EMLINK;
 805                         goto just_restart;
 806                 }
 807         }
 808         reg |= (0x0f & ep->bEndpointAddress) << (4 * (channel - 1));
 809         ep->dma_channel = channel;
 810
 811         if (is_in) {
 812                 status = omap_request_dma(OMAP_DMA_USB_W2FC_TX0 - 1 + channel,
 813                         ep->ep.name, dma_error, ep, &ep->lch);
 814                 if (status == 0) {
 815                         UDC_TXDMA_CFG_REG = reg;
 816                         /* EMIFF */
 817                         omap_set_dma_src_burst_mode(ep->lch,
 818                                                 OMAP_DMA_DATA_BURST_4);
 819                         omap_set_dma_src_data_pack(ep->lch, 1);
 820                         /* TIPB */
 821                         omap_set_dma_dest_params(ep->lch,
 822                                 OMAP_DMA_PORT_TIPB,
 823                                 OMAP_DMA_AMODE_CONSTANT,
 824                                 (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG));
 825                 }
 826         } else {
 827                 status = omap_request_dma(OMAP_DMA_USB_W2FC_RX0 - 1 + channel,
 828                         ep->ep.name, dma_error, ep, &ep->lch);
 829                 if (status == 0) {
 830                         UDC_RXDMA_CFG_REG = reg;
 831                         /* TIPB */
 832                         omap_set_dma_src_params(ep->lch,
 833                                 OMAP_DMA_PORT_TIPB,
 834                                 OMAP_DMA_AMODE_CONSTANT,
 835                                 (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG));
 836                         /* EMIFF */
 837                         omap_set_dma_dest_burst_mode(ep->lch,
 838                                                 OMAP_DMA_DATA_BURST_4);
 839                         omap_set_dma_dest_data_pack(ep->lch, 1);
 840                 }
 841         }
 842         if (status)
 843                 ep->dma_channel = 0;
 844         else {
 845                 ep->has_dma = 1;
 846                 omap_disable_dma_irq(ep->lch, OMAP_DMA_BLOCK_IRQ);
 847
 848                 /* channel type P: hw synch (fifo) */
 849                 if (!cpu_is_omap15xx())
 850                         omap_writew(2, OMAP_DMA_LCH_CTRL(ep->lch));
 851         }
 852
 853 just_restart:
 854         /* restart any queue, even if the claim failed  */
 855         restart = !ep->stopped && !list_empty(&ep->queue);
 856
 857         if (status)
 858                 DBG("%s no dma channel: %d%s\n", ep->ep.name, status,
 859                         restart ? " (restart)" : "");
 860         else
 861                 DBG("%s claimed %cxdma%d lch %d%s\n", ep->ep.name,
 862                         is_in ? 't' : 'r',
 863                         ep->dma_channel - 1, ep->lch,
 864                         restart ? " (restart)" : "");
 865
 866         if (restart) {
 867                 struct omap_req *req;
 868                 req = container_of(ep->queue.next, struct omap_req, queue);
 869                 if (ep->has_dma)
 870                         (is_in ? next_in_dma : next_out_dma)(ep, req);
 871                 else {
 872                         use_ep(ep, UDC_EP_SEL);
 873                         (is_in ? write_fifo : read_fifo)(ep, req);
 874                         deselect_ep();
 875                         if (!is_in) {
 876                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
 877                                 ep->ackwait = 1 + ep->double_buf;
 878                         }
 879                         /* IN: 6 wait states before it'll tx */
 880                 }
 881         }
 882 }
 883
 884 static void dma_channel_release(struct omap_ep *ep)
 885 {
 886         int             shift = 4 * (ep->dma_channel - 1);
 887         u16             mask = 0x0f << shift;
 888         struct omap_req *req;
 889         int             active;
 890
 891         /* abort any active usb transfer request */
 892         if (!list_empty(&ep->queue))
 893                 req = container_of(ep->queue.next, struct omap_req, queue);
 894         else
 895                 req = NULL;
 896
 897         active = ((1 << 7) & omap_readl(OMAP_DMA_CCR(ep->lch))) != 0;
 898
 899         DBG("%s release %s %cxdma%d %p\n", ep->ep.name,
 900                         active ? "active" : "idle",
 901                         (ep->bEndpointAddress & USB_DIR_IN) ? 't' : 'r',
 902                         ep->dma_channel - 1, req);
 903
 904         /* NOTE: re-setting RX_REQ/TX_REQ because of a chip bug (before
 905          * OMAP 1710 ES2.0) where reading the DMA_CFG can clear them.
 906          */
 907
 908         /* wait till current packet DMA finishes, and fifo empties */
 909         if (ep->bEndpointAddress & USB_DIR_IN) {
 910                 UDC_TXDMA_CFG_REG = (UDC_TXDMA_CFG_REG & ~mask) | UDC_DMA_REQ;
 911
 912                 if (req) {
 913                         finish_in_dma(ep, req, -ECONNRESET);
 914
 915                         /* clear FIFO; hosts probably won't empty it */
 916                         use_ep(ep, UDC_EP_SEL);
 917                         UDC_CTRL_REG = UDC_CLR_EP;
 918                         deselect_ep();
 919                 }
 920                 while (UDC_TXDMA_CFG_REG & mask)
 921                         udelay(10);
 922         } else {
 923                 UDC_RXDMA_CFG_REG = (UDC_RXDMA_CFG_REG & ~mask) | UDC_DMA_REQ;
 924
 925                 /* dma empties the fifo */
 926                 while (UDC_RXDMA_CFG_REG & mask)
 927                         udelay(10);
 928                 if (req)
 929                         finish_out_dma(ep, req, -ECONNRESET, 0);
 930         }
 931         omap_free_dma(ep->lch);
 932         ep->dma_channel = 0;
 933         ep->lch = -1;
 934         /* has_dma still set, till endpoint is fully quiesced */
 935 }
 936
 937
 938 /*-------------------------------------------------------------------------*/
 939
 940 static int
 941 omap_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 942 {
 943         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
 944         struct omap_req *req = container_of(_req, struct omap_req, req);
 945         struct omap_udc *udc;
 946         unsigned long   flags;
 947         int             is_iso = 0;
 948
 949         /* catch various bogus parameters */
 950         if (!_req || !req->req.complete || !req->req.buf
 951                         || !list_empty(&req->queue)) {
 952                 DBG("%s, bad params\n", __FUNCTION__);
 953                 return -EINVAL;
 954         }
 955         if (!_ep || (!ep->desc && ep->bEndpointAddress)) {
 956                 DBG("%s, bad ep\n", __FUNCTION__);
 957                 return -EINVAL;
 958         }
 959         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 960                 if (req->req.length > ep->ep.maxpacket)
 961                         return -EMSGSIZE;
 962                 is_iso = 1;
 963         }
 964
 965         /* this isn't bogus, but OMAP DMA isn't the only hardware to
 966          * have a hard time with partial packet reads...  reject it.
 967          */
 968         if (use_dma
 969                         && ep->has_dma
 970                         && ep->bEndpointAddress != 0
 971                         && (ep->bEndpointAddress & USB_DIR_IN) == 0
 972                         && (req->req.length % ep->ep.maxpacket) != 0) {
 973                 DBG("%s, no partial packet OUT reads\n", __FUNCTION__);
 974                 return -EMSGSIZE;
 975         }
 976
 977         udc = ep->udc;
 978         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
 979                 return -ESHUTDOWN;
 980
 981         if (use_dma && ep->has_dma) {
 982                 if (req->req.dma == DMA_ADDR_INVALID) {
 983                         req->req.dma = dma_map_single(
 984                                 ep->udc->gadget.dev.parent,
 985                                 req->req.buf,
 986                                 req->req.length,
 987                                 (ep->bEndpointAddress & USB_DIR_IN)
 988                                         ? DMA_TO_DEVICE
 989                                         : DMA_FROM_DEVICE);
 990                         req->mapped = 1;
 991                 } else {
 992                         dma_sync_single_for_device(
 993                                 ep->udc->gadget.dev.parent,
 994                                 req->req.dma, req->req.length,
 995                                 (ep->bEndpointAddress & USB_DIR_IN)
 996                                         ? DMA_TO_DEVICE
 997                                         : DMA_FROM_DEVICE);
 998                         req->mapped = 0;
 999                 }
1000         }
1001
1002         VDBG("%s queue req %p, len %d buf %p\n",
1003                 ep->ep.name, _req, _req->length, _req->buf);
1004
1005         spin_lock_irqsave(&udc->lock, flags);
1006
1007         req->req.status = -EINPROGRESS;
1008         req->req.actual = 0;
1009
1010         /* maybe kickstart non-iso i/o queues */
1011         if (is_iso)
1012                 UDC_IRQ_EN_REG |= UDC_SOF_IE;
1013         else if (list_empty(&ep->queue) && !ep->stopped && !ep->ackwait) {
1014                 int     is_in;
1015
1016                 if (ep->bEndpointAddress == 0) {
1017                         if (!udc->ep0_pending || !list_empty (&ep->queue)) {
1018                                 spin_unlock_irqrestore(&udc->lock, flags);
1019                                 return -EL2HLT;
1020                         }
1021
1022                         /* empty DATA stage? */
1023                         is_in = udc->ep0_in;
1024                         if (!req->req.length) {
1025
1026                                 /* chip became CONFIGURED or ADDRESSED
1027                                  * earlier; drivers may already have queued
1028                                  * requests to non-control endpoints
1029                                  */
1030                                 if (udc->ep0_set_config) {
1031                                         u16     irq_en = UDC_IRQ_EN_REG;
1032
1033                                         irq_en |= UDC_DS_CHG_IE | UDC_EP0_IE;
1034                                         if (!udc->ep0_reset_config)
1035                                                 irq_en |= UDC_EPN_RX_IE
1036                                                         | UDC_EPN_TX_IE;
1037                                         UDC_IRQ_EN_REG = irq_en;
1038                                 }
1039
1040                                 /* STATUS for zero length DATA stages is
1041                                  * always an IN ... even for IN transfers,
1042                                  * a wierd case which seem to stall OMAP.
1043                                  */
1044                                 UDC_EP_NUM_REG = (UDC_EP_SEL|UDC_EP_DIR);
1045                                 UDC_CTRL_REG = UDC_CLR_EP;
1046                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1047                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1048
1049                                 /* cleanup */
1050                                 udc->ep0_pending = 0;
1051                                 done(ep, req, 0);
1052                                 req = NULL;
1053
1054                         /* non-empty DATA stage */
1055                         } else if (is_in) {
1056                                 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1057                         } else {
1058                                 if (udc->ep0_setup)
1059                                         goto irq_wait;
1060                                 UDC_EP_NUM_REG = UDC_EP_SEL;
1061                         }
1062                 } else {
1063                         is_in = ep->bEndpointAddress & USB_DIR_IN;
1064                         if (!ep->has_dma)
1065                                 use_ep(ep, UDC_EP_SEL);
1066                         /* if ISO: SOF IRQs must be enabled/disabled! */
1067                 }
1068
1069                 if (ep->has_dma)
1070                         (is_in ? next_in_dma : next_out_dma)(ep, req);
1071                 else if (req) {
1072                         if ((is_in ? write_fifo : read_fifo)(ep, req) == 1)
1073                                 req = NULL;
1074                         deselect_ep();
1075                         if (!is_in) {
1076                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1077                                 ep->ackwait = 1 + ep->double_buf;
1078                         }
1079                         /* IN: 6 wait states before it'll tx */
1080                 }
1081         }
1082
1083 irq_wait:
1084         /* irq handler advances the queue */
1085         if (req != NULL)
1086                 list_add_tail(&req->queue, &ep->queue);
1087         spin_unlock_irqrestore(&udc->lock, flags);
1088
1089         return 0;
1090 }
1091
1092 static int omap_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1093 {
1094         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
1095         struct omap_req *req;
1096         unsigned long   flags;
1097
1098         if (!_ep || !_req)
1099                 return -EINVAL;
1100
1101         spin_lock_irqsave(&ep->udc->lock, flags);
1102
1103         /* make sure it's actually queued on this endpoint */
1104         list_for_each_entry (req, &ep->queue, queue) {
1105                 if (&req->req == _req)
1106                         break;
1107         }
1108         if (&req->req != _req) {
1109                 spin_unlock_irqrestore(&ep->udc->lock, flags);
1110                 return -EINVAL;
1111         }
1112
1113         if (use_dma && ep->dma_channel && ep->queue.next == &req->queue) {
1114                 int channel = ep->dma_channel;
1115
1116                 /* releasing the channel cancels the request,
1117                  * reclaiming the channel restarts the queue
1118                  */
1119                 dma_channel_release(ep);
1120                 dma_channel_claim(ep, channel);
1121         } else
1122                 done(ep, req, -ECONNRESET);
1123         spin_unlock_irqrestore(&ep->udc->lock, flags);
1124         return 0;
1125 }
1126
1127 /*-------------------------------------------------------------------------*/
1128
1129 static int omap_ep_set_halt(struct usb_ep *_ep, int value)
1130 {
1131         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
1132         unsigned long   flags;
1133         int             status = -EOPNOTSUPP;
1134
1135         spin_lock_irqsave(&ep->udc->lock, flags);
1136
1137         /* just use protocol stalls for ep0; real halts are annoying */
1138         if (ep->bEndpointAddress == 0) {
1139                 if (!ep->udc->ep0_pending)
1140                         status = -EINVAL;
1141                 else if (value) {
1142                         if (ep->udc->ep0_set_config) {
1143                                 WARN("error changing config?\n");
1144                                 UDC_SYSCON2_REG = UDC_CLR_CFG;
1145                         }
1146                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1147                         ep->udc->ep0_pending = 0;
1148                         status = 0;
1149                 } else /* NOP */
1150                         status = 0;
1151
1152         /* otherwise, all active non-ISO endpoints can halt */
1153         } else if (ep->bmAttributes != USB_ENDPOINT_XFER_ISOC && ep->desc) {
1154
1155                 /* IN endpoints must already be idle */
1156                 if ((ep->bEndpointAddress & USB_DIR_IN)
1157                                 && !list_empty(&ep->queue)) {
1158                         status = -EAGAIN;
1159                         goto done;
1160                 }
1161
1162                 if (value) {
1163                         int     channel;
1164
1165                         if (use_dma && ep->dma_channel
1166                                         && !list_empty(&ep->queue)) {
1167                                 channel = ep->dma_channel;
1168                                 dma_channel_release(ep);
1169                         } else
1170                                 channel = 0;
1171
1172                         use_ep(ep, UDC_EP_SEL);
1173                         if (UDC_STAT_FLG_REG & UDC_NON_ISO_FIFO_EMPTY) {
1174                                 UDC_CTRL_REG = UDC_SET_HALT;
1175                                 status = 0;
1176                         } else
1177                                 status = -EAGAIN;
1178                         deselect_ep();
1179
1180                         if (channel)
1181                                 dma_channel_claim(ep, channel);
1182                 } else {
1183                         use_ep(ep, 0);
1184                         UDC_CTRL_REG = ep->udc->clr_halt;
1185                         ep->ackwait = 0;
1186                         if (!(ep->bEndpointAddress & USB_DIR_IN)) {
1187                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1188                                 ep->ackwait = 1 + ep->double_buf;
1189                         }
1190                 }
1191         }
1192 done:
1193         VDBG("%s %s halt stat %d\n", ep->ep.name,
1194                 value ? "set" : "clear", status);
1195
1196         spin_unlock_irqrestore(&ep->udc->lock, flags);
1197         return status;
1198 }
1199
1200 static struct usb_ep_ops omap_ep_ops = {
1201         .enable         = omap_ep_enable,
1202         .disable        = omap_ep_disable,
1203
1204         .alloc_request  = omap_alloc_request,
1205         .free_request   = omap_free_request,
1206
1207         .alloc_buffer   = omap_alloc_buffer,
1208         .free_buffer    = omap_free_buffer,
1209
1210         .queue          = omap_ep_queue,
1211         .dequeue        = omap_ep_dequeue,
1212
1213         .set_halt       = omap_ep_set_halt,
1214         // fifo_status ... report bytes in fifo
1215         // fifo_flush ... flush fifo
1216 };
1217
1218 /*-------------------------------------------------------------------------*/
1219
1220 static int omap_get_frame(struct usb_gadget *gadget)
1221 {
1222         u16     sof = UDC_SOF_REG;
1223         return (sof & UDC_TS_OK) ? (sof & UDC_TS) : -EL2NSYNC;
1224 }
1225
1226 static int omap_wakeup(struct usb_gadget *gadget)
1227 {
1228         struct omap_udc *udc;
1229         unsigned long   flags;
1230         int             retval = -EHOSTUNREACH;
1231
1232         udc = container_of(gadget, struct omap_udc, gadget);
1233
1234         spin_lock_irqsave(&udc->lock, flags);
1235         if (udc->devstat & UDC_SUS) {
1236                 /* NOTE:  OTG spec erratum says that OTG devices may
1237                  * issue wakeups without host enable.
1238                  */
1239                 if (udc->devstat & (UDC_B_HNP_ENABLE|UDC_R_WK_OK)) {
1240                         DBG("remote wakeup...\n");
1241                         UDC_SYSCON2_REG = UDC_RMT_WKP;
1242                         retval = 0;
1243                 }
1244
1245         /* NOTE:  non-OTG systems may use SRP TOO... */
1246         } else if (!(udc->devstat & UDC_ATT)) {
1247                 if (udc->transceiver)
1248                         retval = otg_start_srp(udc->transceiver);
1249         }
1250         spin_unlock_irqrestore(&udc->lock, flags);
1251
1252         return retval;
1253 }
1254
1255 static int
1256 omap_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1257 {
1258         struct omap_udc *udc;
1259         unsigned long   flags;
1260         u16             syscon1;
1261
1262         udc = container_of(gadget, struct omap_udc, gadget);
1263         spin_lock_irqsave(&udc->lock, flags);
1264         syscon1 = UDC_SYSCON1_REG;
1265         if (is_selfpowered)
1266                 syscon1 |= UDC_SELF_PWR;
1267         else
1268                 syscon1 &= ~UDC_SELF_PWR;
1269         UDC_SYSCON1_REG = syscon1;
1270         spin_unlock_irqrestore(&udc->lock, flags);
1271
1272         return 0;
1273 }
1274
1275 static int can_pullup(struct omap_udc *udc)
1276 {
1277         return udc->driver && udc->softconnect && udc->vbus_active;
1278 }
1279
1280 static void pullup_enable(struct omap_udc *udc)
1281 {
1282         udc->gadget.dev.parent->power.power_state = PMSG_ON;
1283         udc->gadget.dev.power.power_state = PMSG_ON;
1284         UDC_SYSCON1_REG |= UDC_PULLUP_EN;
1285 #ifndef CONFIG_USB_OTG
1286         if (!cpu_is_omap15xx())
1287                 OTG_CTRL_REG |= OTG_BSESSVLD;
1288 #endif
1289         UDC_IRQ_EN_REG = UDC_DS_CHG_IE;
1290 }
1291
1292 static void pullup_disable(struct omap_udc *udc)
1293 {
1294 #ifndef CONFIG_USB_OTG
1295         if (!cpu_is_omap15xx())
1296                 OTG_CTRL_REG &= ~OTG_BSESSVLD;
1297 #endif
1298         UDC_IRQ_EN_REG = UDC_DS_CHG_IE;
1299         UDC_SYSCON1_REG &= ~UDC_PULLUP_EN;
1300 }
1301
1302 /*
1303  * Called by whatever detects VBUS sessions:  external transceiver
1304  * driver, or maybe GPIO0 VBUS IRQ.  May request 48 MHz clock.
1305  */
1306 static int omap_vbus_session(struct usb_gadget *gadget, int is_active)
1307 {
1308         struct omap_udc *udc;
1309         unsigned long   flags;
1310
1311         udc = container_of(gadget, struct omap_udc, gadget);
1312         spin_lock_irqsave(&udc->lock, flags);
1313         VDBG("VBUS %s\n", is_active ? "on" : "off");
1314         udc->vbus_active = (is_active != 0);
1315         if (cpu_is_omap15xx()) {
1316                 /* "software" detect, ignored if !VBUS_MODE_1510 */
1317                 if (is_active)
1318                         FUNC_MUX_CTRL_0_REG |= VBUS_CTRL_1510;
1319                 else
1320                         FUNC_MUX_CTRL_0_REG &= ~VBUS_CTRL_1510;
1321         }
1322         if (can_pullup(udc))
1323                 pullup_enable(udc);
1324         else
1325                 pullup_disable(udc);
1326         spin_unlock_irqrestore(&udc->lock, flags);
1327         return 0;
1328 }
1329
1330 static int omap_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1331 {
1332         struct omap_udc *udc;
1333
1334         udc = container_of(gadget, struct omap_udc, gadget);
1335         if (udc->transceiver)
1336                 return otg_set_power(udc->transceiver, mA);
1337         return -EOPNOTSUPP;
1338 }
1339
1340 static int omap_pullup(struct usb_gadget *gadget, int is_on)
1341 {
1342         struct omap_udc *udc;
1343         unsigned long   flags;
1344
1345         udc = container_of(gadget, struct omap_udc, gadget);
1346         spin_lock_irqsave(&udc->lock, flags);
1347         udc->softconnect = (is_on != 0);
1348         if (can_pullup(udc))
1349                 pullup_enable(udc);
1350         else
1351                 pullup_disable(udc);
1352         spin_unlock_irqrestore(&udc->lock, flags);
1353         return 0;
1354 }
1355
1356 static struct usb_gadget_ops omap_gadget_ops = {
1357         .get_frame              = omap_get_frame,
1358         .wakeup                 = omap_wakeup,
1359         .set_selfpowered        = omap_set_selfpowered,
1360         .vbus_session           = omap_vbus_session,
1361         .vbus_draw              = omap_vbus_draw,
1362         .pullup                 = omap_pullup,
1363 };
1364
1365 /*-------------------------------------------------------------------------*/
1366
1367 /* dequeue ALL requests; caller holds udc->lock */
1368 static void nuke(struct omap_ep *ep, int status)
1369 {
1370         struct omap_req *req;
1371
1372         ep->stopped = 1;
1373
1374         if (use_dma && ep->dma_channel)
1375                 dma_channel_release(ep);
1376
1377         use_ep(ep, 0);
1378         UDC_CTRL_REG = UDC_CLR_EP;
1379         if (ep->bEndpointAddress && ep->bmAttributes != USB_ENDPOINT_XFER_ISOC)
1380                 UDC_CTRL_REG = UDC_SET_HALT;
1381
1382         while (!list_empty(&ep->queue)) {
1383                 req = list_entry(ep->queue.next, struct omap_req, queue);
1384                 done(ep, req, status);
1385         }
1386 }
1387
1388 /* caller holds udc->lock */
1389 static void udc_quiesce(struct omap_udc *udc)
1390 {
1391         struct omap_ep  *ep;
1392
1393         udc->gadget.speed = USB_SPEED_UNKNOWN;
1394         nuke(&udc->ep[0], -ESHUTDOWN);
1395         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list)
1396                 nuke(ep, -ESHUTDOWN);
1397 }
1398
1399 /*-------------------------------------------------------------------------*/
1400
1401 static void update_otg(struct omap_udc *udc)
1402 {
1403         u16     devstat;
1404
1405         if (!udc->gadget.is_otg)
1406                 return;
1407
1408         if (OTG_CTRL_REG & OTG_ID)
1409                 devstat = UDC_DEVSTAT_REG;
1410         else
1411                 devstat = 0;
1412
1413         udc->gadget.b_hnp_enable = !!(devstat & UDC_B_HNP_ENABLE);
1414         udc->gadget.a_hnp_support = !!(devstat & UDC_A_HNP_SUPPORT);
1415         udc->gadget.a_alt_hnp_support = !!(devstat & UDC_A_ALT_HNP_SUPPORT);
1416
1417         /* Enable HNP early, avoiding races on suspend irq path.
1418          * ASSUMES OTG state machine B_BUS_REQ input is true.
1419          */
1420         if (udc->gadget.b_hnp_enable)
1421                 OTG_CTRL_REG = (OTG_CTRL_REG | OTG_B_HNPEN | OTG_B_BUSREQ)
1422                                 & ~OTG_PULLUP;
1423 }
1424
1425 static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1426 {
1427         struct omap_ep  *ep0 = &udc->ep[0];
1428         struct omap_req *req = NULL;
1429
1430         ep0->irqs++;
1431
1432         /* Clear any pending requests and then scrub any rx/tx state
1433          * before starting to handle the SETUP request.
1434          */
1435         if (irq_src & UDC_SETUP) {
1436                 u16     ack = irq_src & (UDC_EP0_TX|UDC_EP0_RX);
1437
1438                 nuke(ep0, 0);
1439                 if (ack) {
1440                         UDC_IRQ_SRC_REG = ack;
1441                         irq_src = UDC_SETUP;
1442                 }
1443         }
1444
1445         /* IN/OUT packets mean we're in the DATA or STATUS stage.
1446          * This driver uses only uses protocol stalls (ep0 never halts),
1447          * and if we got this far the gadget driver already had a
1448          * chance to stall.  Tries to be forgiving of host oddities.
1449          *
1450          * NOTE:  the last chance gadget drivers have to stall control
1451          * requests is during their request completion callback.
1452          */
1453         if (!list_empty(&ep0->queue))
1454                 req = container_of(ep0->queue.next, struct omap_req, queue);
1455
1456         /* IN == TX to host */
1457         if (irq_src & UDC_EP0_TX) {
1458                 int     stat;
1459
1460                 UDC_IRQ_SRC_REG = UDC_EP0_TX;
1461                 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1462                 stat = UDC_STAT_FLG_REG;
1463                 if (stat & UDC_ACK) {
1464                         if (udc->ep0_in) {
1465                                 /* write next IN packet from response,
1466                                  * or set up the status stage.
1467                                  */
1468                                 if (req)
1469                                         stat = write_fifo(ep0, req);
1470                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1471                                 if (!req && udc->ep0_pending) {
1472                                         UDC_EP_NUM_REG = UDC_EP_SEL;
1473                                         UDC_CTRL_REG = UDC_CLR_EP;
1474                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1475                                         UDC_EP_NUM_REG = 0;
1476                                         udc->ep0_pending = 0;
1477                                 } /* else:  6 wait states before it'll tx */
1478                         } else {
1479                                 /* ack status stage of OUT transfer */
1480                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1481                                 if (req)
1482                                         done(ep0, req, 0);
1483                         }
1484                         req = NULL;
1485                 } else if (stat & UDC_STALL) {
1486                         UDC_CTRL_REG = UDC_CLR_HALT;
1487                         UDC_EP_NUM_REG = UDC_EP_DIR;
1488                 } else {
1489                         UDC_EP_NUM_REG = UDC_EP_DIR;
1490                 }
1491         }
1492
1493         /* OUT == RX from host */
1494         if (irq_src & UDC_EP0_RX) {
1495                 int     stat;
1496
1497                 UDC_IRQ_SRC_REG = UDC_EP0_RX;
1498                 UDC_EP_NUM_REG = UDC_EP_SEL;
1499                 stat = UDC_STAT_FLG_REG;
1500                 if (stat & UDC_ACK) {
1501                         if (!udc->ep0_in) {
1502                                 stat = 0;
1503                                 /* read next OUT packet of request, maybe
1504                                  * reactiviting the fifo; stall on errors.
1505                                  */
1506                                 if (!req || (stat = read_fifo(ep0, req)) < 0) {
1507                                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1508                                         udc->ep0_pending = 0;
1509                                         stat = 0;
1510                                 } else if (stat == 0)
1511                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1512                                 UDC_EP_NUM_REG = 0;
1513
1514                                 /* activate status stage */
1515                                 if (stat == 1) {
1516                                         done(ep0, req, 0);
1517                                         /* that may have STALLed ep0... */
1518                                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1519                                         UDC_CTRL_REG = UDC_CLR_EP;
1520                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1521                                         UDC_EP_NUM_REG = UDC_EP_DIR;
1522                                         udc->ep0_pending = 0;
1523                                 }
1524                         } else {
1525                                 /* ack status stage of IN transfer */
1526                                 UDC_EP_NUM_REG = 0;
1527                                 if (req)
1528                                         done(ep0, req, 0);
1529                         }
1530                 } else if (stat & UDC_STALL) {
1531                         UDC_CTRL_REG = UDC_CLR_HALT;
1532                         UDC_EP_NUM_REG = 0;
1533                 } else {
1534                         UDC_EP_NUM_REG = 0;
1535                 }
1536         }
1537
1538         /* SETUP starts all control transfers */
1539         if (irq_src & UDC_SETUP) {
1540                 union u {
1541                         u16                     word[4];
1542                         struct usb_ctrlrequest  r;
1543                 } u;
1544                 int                     status = -EINVAL;
1545                 struct omap_ep          *ep;
1546
1547                 /* read the (latest) SETUP message */
1548                 do {
1549                         UDC_EP_NUM_REG = UDC_SETUP_SEL;
1550                         /* two bytes at a time */
1551                         u.word[0] = UDC_DATA_REG;
1552                         u.word[1] = UDC_DATA_REG;
1553                         u.word[2] = UDC_DATA_REG;
1554                         u.word[3] = UDC_DATA_REG;
1555                         UDC_EP_NUM_REG = 0;
1556                 } while (UDC_IRQ_SRC_REG & UDC_SETUP);
1557
1558 #define w_value         le16_to_cpup (&u.r.wValue)
1559 #define w_index         le16_to_cpup (&u.r.wIndex)
1560 #define w_length        le16_to_cpup (&u.r.wLength)
1561
1562                 /* Delegate almost all control requests to the gadget driver,
1563                  * except for a handful of ch9 status/feature requests that
1564                  * hardware doesn't autodecode _and_ the gadget API hides.
1565                  */
1566                 udc->ep0_in = (u.r.bRequestType & USB_DIR_IN) != 0;
1567                 udc->ep0_set_config = 0;
1568                 udc->ep0_pending = 1;
1569                 ep0->stopped = 0;
1570                 ep0->ackwait = 0;
1571                 switch (u.r.bRequest) {
1572                 case USB_REQ_SET_CONFIGURATION:
1573                         /* udc needs to know when ep != 0 is valid */
1574                         if (u.r.bRequestType != USB_RECIP_DEVICE)
1575                                 goto delegate;
1576                         if (w_length != 0)
1577                                 goto do_stall;
1578                         udc->ep0_set_config = 1;
1579                         udc->ep0_reset_config = (w_value == 0);
1580                         VDBG("set config %d\n", w_value);
1581
1582                         /* update udc NOW since gadget driver may start
1583                          * queueing requests immediately; clear config
1584                          * later if it fails the request.
1585                          */
1586                         if (udc->ep0_reset_config)
1587                                 UDC_SYSCON2_REG = UDC_CLR_CFG;
1588                         else
1589                                 UDC_SYSCON2_REG = UDC_DEV_CFG;
1590                         update_otg(udc);
1591                         goto delegate;
1592                 case USB_REQ_CLEAR_FEATURE:
1593                         /* clear endpoint halt */
1594                         if (u.r.bRequestType != USB_RECIP_ENDPOINT)
1595                                 goto delegate;
1596                         if (w_value != USB_ENDPOINT_HALT
1597                                         || w_length != 0)
1598                                 goto do_stall;
1599                         ep = &udc->ep[w_index & 0xf];
1600                         if (ep != ep0) {
1601                                 if (w_index & USB_DIR_IN)
1602                                         ep += 16;
1603                                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
1604                                                 || !ep->desc)
1605                                         goto do_stall;
1606                                 use_ep(ep, 0);
1607                                 UDC_CTRL_REG = udc->clr_halt;
1608                                 ep->ackwait = 0;
1609                                 if (!(ep->bEndpointAddress & USB_DIR_IN)) {
1610                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1611                                         ep->ackwait = 1 + ep->double_buf;
1612                                 }
1613                                 /* NOTE:  assumes the host behaves sanely,
1614                                  * only clearing real halts.  Else we may
1615                                  * need to kill pending transfers and then
1616                                  * restart the queue... very messy for DMA!
1617                                  */
1618                         }
1619                         VDBG("%s halt cleared by host\n", ep->name);
1620                         goto ep0out_status_stage;
1621                 case USB_REQ_SET_FEATURE:
1622                         /* set endpoint halt */
1623                         if (u.r.bRequestType != USB_RECIP_ENDPOINT)
1624                                 goto delegate;
1625                         if (w_value != USB_ENDPOINT_HALT
1626                                         || w_length != 0)
1627                                 goto do_stall;
1628                         ep = &udc->ep[w_index & 0xf];
1629                         if (w_index & USB_DIR_IN)
1630                                 ep += 16;
1631                         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
1632                                         || ep == ep0 || !ep->desc)
1633                                 goto do_stall;
1634                         if (use_dma && ep->has_dma) {
1635                                 /* this has rude side-effects (aborts) and
1636                                  * can't really work if DMA-IN is active
1637                                  */
1638                                 DBG("%s host set_halt, NYET \n", ep->name);
1639                                 goto do_stall;
1640                         }
1641                         use_ep(ep, 0);
1642                         /* can't halt if fifo isn't empty... */
1643                         UDC_CTRL_REG = UDC_CLR_EP;
1644                         UDC_CTRL_REG = UDC_SET_HALT;
1645                         VDBG("%s halted by host\n", ep->name);
1646 ep0out_status_stage:
1647                         status = 0;
1648                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1649                         UDC_CTRL_REG = UDC_CLR_EP;
1650                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1651                         UDC_EP_NUM_REG = UDC_EP_DIR;
1652                         udc->ep0_pending = 0;
1653                         break;
1654                 case USB_REQ_GET_STATUS:
1655                         /* return interface status.  if we were pedantic,
1656                          * we'd detect non-existent interfaces, and stall.
1657                          */
1658                         if (u.r.bRequestType
1659                                         != (USB_DIR_IN|USB_RECIP_INTERFACE))
1660                                 goto delegate;
1661                         /* return two zero bytes */
1662                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1663                         UDC_DATA_REG = 0;
1664                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1665                         UDC_EP_NUM_REG = UDC_EP_DIR;
1666                         status = 0;
1667                         VDBG("GET_STATUS, interface %d\n", w_index);
1668                         /* next, status stage */
1669                         break;
1670                 default:
1671 delegate:
1672                         /* activate the ep0out fifo right away */
1673                         if (!udc->ep0_in && w_length) {
1674                                 UDC_EP_NUM_REG = 0;
1675                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1676                         }
1677
1678                         /* gadget drivers see class/vendor specific requests,
1679                          * {SET,GET}_{INTERFACE,DESCRIPTOR,CONFIGURATION},
1680                          * and more
1681                          */
1682                         VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n",
1683                                 u.r.bRequestType, u.r.bRequest,
1684                                 w_value, w_index, w_length);
1685
1686 #undef  w_value
1687 #undef  w_index
1688 #undef  w_length
1689
1690                         /* The gadget driver may return an error here,
1691                          * causing an immediate protocol stall.
1692                          *
1693                          * Else it must issue a response, either queueing a
1694                          * response buffer for the DATA stage, or halting ep0
1695                          * (causing a protocol stall, not a real halt).  A
1696                          * zero length buffer means no DATA stage.
1697                          *
1698                          * It's fine to issue that response after the setup()
1699                          * call returns, and this IRQ was handled.
1700                          */
1701                         udc->ep0_setup = 1;
1702                         spin_unlock(&udc->lock);
1703                         status = udc->driver->setup (&udc->gadget, &u.r);
1704                         spin_lock(&udc->lock);
1705                         udc->ep0_setup = 0;
1706                 }
1707
1708                 if (status < 0) {
1709 do_stall:
1710                         VDBG("req %02x.%02x protocol STALL; stat %d\n",
1711                                         u.r.bRequestType, u.r.bRequest, status);
1712                         if (udc->ep0_set_config) {
1713                                 if (udc->ep0_reset_config)
1714                                         WARN("error resetting config?\n");
1715                                 else
1716                                         UDC_SYSCON2_REG = UDC_CLR_CFG;
1717                         }
1718                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1719                         udc->ep0_pending = 0;
1720                 }
1721         }
1722 }
1723
1724 /*-------------------------------------------------------------------------*/
1725
1726 #define OTG_FLAGS (UDC_B_HNP_ENABLE|UDC_A_HNP_SUPPORT|UDC_A_ALT_HNP_SUPPORT)
1727
1728 static void devstate_irq(struct omap_udc *udc, u16 irq_src)
1729 {
1730         u16     devstat, change;
1731
1732         devstat = UDC_DEVSTAT_REG;
1733         change = devstat ^ udc->devstat;
1734         udc->devstat = devstat;
1735
1736         if (change & (UDC_USB_RESET|UDC_ATT)) {
1737                 udc_quiesce(udc);
1738
1739                 if (change & UDC_ATT) {
1740                         /* driver for any external transceiver will
1741                          * have called omap_vbus_session() already
1742                          */
1743                         if (devstat & UDC_ATT) {
1744                                 udc->gadget.speed = USB_SPEED_FULL;
1745                                 VDBG("connect\n");
1746                                 if (!udc->transceiver)
1747                                         pullup_enable(udc);
1748                                 // if (driver->connect) call it
1749                         } else if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1750                                 udc->gadget.speed = USB_SPEED_UNKNOWN;
1751                                 if (!udc->transceiver)
1752                                         pullup_disable(udc);
1753                                 DBG("disconnect, gadget %s\n",
1754                                         udc->driver->driver.name);
1755                                 if (udc->driver->disconnect) {
1756                                         spin_unlock(&udc->lock);
1757                                         udc->driver->disconnect(&udc->gadget);
1758                                         spin_lock(&udc->lock);
1759                                 }
1760                         }
1761                         change &= ~UDC_ATT;
1762                 }
1763
1764                 if (change & UDC_USB_RESET) {
1765                         if (devstat & UDC_USB_RESET) {
1766                                 VDBG("RESET=1\n");
1767                         } else {
1768                                 udc->gadget.speed = USB_SPEED_FULL;
1769                                 INFO("USB reset done, gadget %s\n",
1770                                         udc->driver->driver.name);
1771                                 /* ep0 traffic is legal from now on */
1772                                 UDC_IRQ_EN_REG = UDC_DS_CHG_IE | UDC_EP0_IE;
1773                         }
1774                         change &= ~UDC_USB_RESET;
1775                 }
1776         }
1777         if (change & UDC_SUS) {
1778                 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1779                         // FIXME tell isp1301 to suspend/resume (?)
1780                         if (devstat & UDC_SUS) {
1781                                 VDBG("suspend\n");
1782                                 update_otg(udc);
1783                                 /* HNP could be under way already */
1784                                 if (udc->gadget.speed == USB_SPEED_FULL
1785                                                 && udc->driver->suspend) {
1786                                         spin_unlock(&udc->lock);
1787                                         udc->driver->suspend(&udc->gadget);
1788                                         spin_lock(&udc->lock);
1789                                 }
1790                                 if (udc->transceiver)
1791                                         otg_set_suspend(udc->transceiver, 1);
1792                         } else {
1793                                 VDBG("resume\n");
1794                                 if (udc->transceiver)
1795                                         otg_set_suspend(udc->transceiver, 0);
1796                                 if (udc->gadget.speed == USB_SPEED_FULL
1797                                                 && udc->driver->resume) {
1798                                         spin_unlock(&udc->lock);
1799                                         udc->driver->resume(&udc->gadget);
1800                                         spin_lock(&udc->lock);
1801                                 }
1802                         }
1803                 }
1804                 change &= ~UDC_SUS;
1805         }
1806         if (!cpu_is_omap15xx() && (change & OTG_FLAGS)) {
1807                 update_otg(udc);
1808                 change &= ~OTG_FLAGS;
1809         }
1810
1811         change &= ~(UDC_CFG|UDC_DEF|UDC_ADD);
1812         if (change)
1813                 VDBG("devstat %03x, ignore change %03x\n",
1814                         devstat,  change);
1815
1816         UDC_IRQ_SRC_REG = UDC_DS_CHG;
1817 }
1818
1819 static irqreturn_t
1820 omap_udc_irq(int irq, void *_udc, struct pt_regs *r)
1821 {
1822         struct omap_udc *udc = _udc;
1823         u16             irq_src;
1824         irqreturn_t     status = IRQ_NONE;
1825         unsigned long   flags;
1826
1827         spin_lock_irqsave(&udc->lock, flags);
1828         irq_src = UDC_IRQ_SRC_REG;
1829
1830         /* Device state change (usb ch9 stuff) */
1831         if (irq_src & UDC_DS_CHG) {
1832                 devstate_irq(_udc, irq_src);
1833                 status = IRQ_HANDLED;
1834                 irq_src &= ~UDC_DS_CHG;
1835         }
1836
1837         /* EP0 control transfers */
1838         if (irq_src & (UDC_EP0_RX|UDC_SETUP|UDC_EP0_TX)) {
1839                 ep0_irq(_udc, irq_src);
1840                 status = IRQ_HANDLED;
1841                 irq_src &= ~(UDC_EP0_RX|UDC_SETUP|UDC_EP0_TX);
1842         }
1843
1844         /* DMA transfer completion */
1845         if (use_dma && (irq_src & (UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT))) {
1846                 dma_irq(_udc, irq_src);
1847                 status = IRQ_HANDLED;
1848                 irq_src &= ~(UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT);
1849         }
1850
1851         irq_src &= ~(UDC_SOF|UDC_EPN_TX|UDC_EPN_RX);
1852         if (irq_src)
1853                 DBG("udc_irq, unhandled %03x\n", irq_src);
1854         spin_unlock_irqrestore(&udc->lock, flags);
1855
1856         return status;
1857 }
1858
1859 /* workaround for seemingly-lost IRQs for RX ACKs... */
1860 #define PIO_OUT_TIMEOUT (jiffies + HZ/3)
1861 #define HALF_FULL(f)    (!((f)&(UDC_NON_ISO_FIFO_FULL|UDC_NON_ISO_FIFO_EMPTY)))
1862
1863 static void pio_out_timer(unsigned long _ep)
1864 {
1865         struct omap_ep  *ep = (void *) _ep;
1866         unsigned long   flags;
1867         u16             stat_flg;
1868
1869         spin_lock_irqsave(&ep->udc->lock, flags);
1870         if (!list_empty(&ep->queue) && ep->ackwait) {
1871                 use_ep(ep, 0);
1872                 stat_flg = UDC_STAT_FLG_REG;
1873
1874                 if ((stat_flg & UDC_ACK) && (!(stat_flg & UDC_FIFO_EN)
1875                                 || (ep->double_buf && HALF_FULL(stat_flg)))) {
1876                         struct omap_req *req;
1877
1878                         VDBG("%s: lose, %04x\n", ep->ep.name, stat_flg);
1879                         req = container_of(ep->queue.next,
1880                                         struct omap_req, queue);
1881                         UDC_EP_NUM_REG = ep->bEndpointAddress | UDC_EP_SEL;
1882                         (void) read_fifo(ep, req);
1883                         UDC_EP_NUM_REG = ep->bEndpointAddress;
1884                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1885                         ep->ackwait = 1 + ep->double_buf;
1886                 }
1887         }
1888         mod_timer(&ep->timer, PIO_OUT_TIMEOUT);
1889         spin_unlock_irqrestore(&ep->udc->lock, flags);
1890 }
1891
1892 static irqreturn_t
1893 omap_udc_pio_irq(int irq, void *_dev, struct pt_regs *r)
1894 {
1895         u16             epn_stat, irq_src;
1896         irqreturn_t     status = IRQ_NONE;
1897         struct omap_ep  *ep;
1898         int             epnum;
1899         struct omap_udc *udc = _dev;
1900         struct omap_req *req;
1901         unsigned long   flags;
1902
1903         spin_lock_irqsave(&udc->lock, flags);
1904         epn_stat = UDC_EPN_STAT_REG;
1905         irq_src = UDC_IRQ_SRC_REG;
1906
1907         /* handle OUT first, to avoid some wasteful NAKs */
1908         if (irq_src & UDC_EPN_RX) {
1909                 epnum = (epn_stat >> 8) & 0x0f;
1910                 UDC_IRQ_SRC_REG = UDC_EPN_RX;
1911                 status = IRQ_HANDLED;
1912                 ep = &udc->ep[epnum];
1913                 ep->irqs++;
1914
1915                 UDC_EP_NUM_REG = epnum | UDC_EP_SEL;
1916                 ep->fnf = 0;
1917                 if ((UDC_STAT_FLG_REG & UDC_ACK)) {
1918                         ep->ackwait--;
1919                         if (!list_empty(&ep->queue)) {
1920                                 int stat;
1921                                 req = container_of(ep->queue.next,
1922                                                 struct omap_req, queue);
1923                                 stat = read_fifo(ep, req);
1924                                 if (!ep->double_buf)
1925                                         ep->fnf = 1;
1926                         }
1927                 }
1928                 /* min 6 clock delay before clearing EP_SEL ... */
1929                 epn_stat = UDC_EPN_STAT_REG;
1930                 epn_stat = UDC_EPN_STAT_REG;
1931                 UDC_EP_NUM_REG = epnum;
1932
1933                 /* enabling fifo _after_ clearing ACK, contrary to docs,
1934                  * reduces lossage; timer still needed though (sigh).
1935                  */
1936                 if (ep->fnf) {
1937                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1938                         ep->ackwait = 1 + ep->double_buf;
1939                 }
1940                 mod_timer(&ep->timer, PIO_OUT_TIMEOUT);
1941         }
1942
1943         /* then IN transfers */
1944         else if (irq_src & UDC_EPN_TX) {
1945                 epnum = epn_stat & 0x0f;
1946                 UDC_IRQ_SRC_REG = UDC_EPN_TX;
1947                 status = IRQ_HANDLED;
1948                 ep = &udc->ep[16 + epnum];
1949                 ep->irqs++;
1950
1951                 UDC_EP_NUM_REG = epnum | UDC_EP_DIR | UDC_EP_SEL;
1952                 if ((UDC_STAT_FLG_REG & UDC_ACK)) {
1953                         ep->ackwait = 0;
1954                         if (!list_empty(&ep->queue)) {
1955                                 req = container_of(ep->queue.next,
1956                                                 struct omap_req, queue);
1957                                 (void) write_fifo(ep, req);
1958                         }
1959                 }
1960                 /* min 6 clock delay before clearing EP_SEL ... */
1961                 epn_stat = UDC_EPN_STAT_REG;
1962                 epn_stat = UDC_EPN_STAT_REG;
1963                 UDC_EP_NUM_REG = epnum | UDC_EP_DIR;
1964                 /* then 6 clocks before it'd tx */
1965         }
1966
1967         spin_unlock_irqrestore(&udc->lock, flags);
1968         return status;
1969 }
1970
1971 #ifdef  USE_ISO
1972 static irqreturn_t
1973 omap_udc_iso_irq(int irq, void *_dev, struct pt_regs *r)
1974 {
1975         struct omap_udc *udc = _dev;
1976         struct omap_ep  *ep;
1977         int             pending = 0;
1978         unsigned long   flags;
1979
1980         spin_lock_irqsave(&udc->lock, flags);
1981
1982         /* handle all non-DMA ISO transfers */
1983         list_for_each_entry (ep, &udc->iso, iso) {
1984                 u16             stat;
1985                 struct omap_req *req;
1986
1987                 if (ep->has_dma || list_empty(&ep->queue))
1988                         continue;
1989                 req = list_entry(ep->queue.next, struct omap_req, queue);
1990
1991                 use_ep(ep, UDC_EP_SEL);
1992                 stat = UDC_STAT_FLG_REG;
1993
1994                 /* NOTE: like the other controller drivers, this isn't
1995                  * currently reporting lost or damaged frames.
1996                  */
1997                 if (ep->bEndpointAddress & USB_DIR_IN) {
1998                         if (stat & UDC_MISS_IN)
1999                                 /* done(ep, req, -EPROTO) */;
2000                         else
2001                                 write_fifo(ep, req);
2002                 } else {
2003                         int     status = 0;
2004
2005                         if (stat & UDC_NO_RXPACKET)
2006                                 status = -EREMOTEIO;
2007                         else if (stat & UDC_ISO_ERR)
2008                                 status = -EILSEQ;
2009                         else if (stat & UDC_DATA_FLUSH)
2010                                 status = -ENOSR;
2011
2012                         if (status)
2013                                 /* done(ep, req, status) */;
2014                         else
2015                                 read_fifo(ep, req);
2016                 }
2017                 deselect_ep();
2018                 /* 6 wait states before next EP */
2019
2020                 ep->irqs++;
2021                 if (!list_empty(&ep->queue))
2022                         pending = 1;
2023         }
2024         if (!pending)
2025                 UDC_IRQ_EN_REG &= ~UDC_SOF_IE;
2026         UDC_IRQ_SRC_REG = UDC_SOF;
2027
2028         spin_unlock_irqrestore(&udc->lock, flags);
2029         return IRQ_HANDLED;
2030 }
2031 #endif
2032
2033 /*-------------------------------------------------------------------------*/
2034
2035 static struct omap_udc *udc;
2036
2037 int usb_gadget_register_driver (struct usb_gadget_driver *driver)
2038 {
2039         int             status = -ENODEV;
2040         struct omap_ep  *ep;
2041         unsigned long   flags;
2042
2043         /* basic sanity tests */
2044         if (!udc)
2045                 return -ENODEV;
2046         if (!driver
2047                         // FIXME if otg, check:  driver->is_otg
2048                         || driver->speed < USB_SPEED_FULL
2049                         || !driver->bind
2050                         || !driver->unbind
2051                         || !driver->setup)
2052                 return -EINVAL;
2053
2054         spin_lock_irqsave(&udc->lock, flags);
2055         if (udc->driver) {
2056                 spin_unlock_irqrestore(&udc->lock, flags);
2057                 return -EBUSY;
2058         }
2059
2060         /* reset state */
2061         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
2062                 ep->irqs = 0;
2063                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
2064                         continue;
2065                 use_ep(ep, 0);
2066                 UDC_CTRL_REG = UDC_SET_HALT;
2067         }
2068         udc->ep0_pending = 0;
2069         udc->ep[0].irqs = 0;
2070         udc->softconnect = 1;
2071
2072         /* hook up the driver */
2073         driver->driver.bus = NULL;
2074         udc->driver = driver;
2075         udc->gadget.dev.driver = &driver->driver;
2076         spin_unlock_irqrestore(&udc->lock, flags);
2077
2078         status = driver->bind (&udc->gadget);
2079         if (status) {
2080                 DBG("bind to %s --> %d\n", driver->driver.name, status);
2081                 udc->gadget.dev.driver = NULL;
2082                 udc->driver = NULL;
2083                 goto done;
2084         }
2085         DBG("bound to driver %s\n", driver->driver.name);
2086
2087         UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK;
2088
2089         /* connect to bus through transceiver */
2090         if (udc->transceiver) {
2091                 status = otg_set_peripheral(udc->transceiver, &udc->gadget);
2092                 if (status < 0) {
2093                         ERR("can't bind to transceiver\n");
2094                         driver->unbind (&udc->gadget);
2095                         udc->gadget.dev.driver = NULL;
2096                         udc->driver = NULL;
2097                         goto done;
2098                 }
2099         } else {
2100                 if (can_pullup(udc))
2101                         pullup_enable (udc);
2102                 else
2103                         pullup_disable (udc);
2104         }
2105
2106         /* boards that don't have VBUS sensing can't autogate 48MHz;
2107          * can't enter deep sleep while a gadget driver is active.
2108          */
2109         if (machine_is_omap_innovator() || machine_is_omap_osk())
2110                 omap_vbus_session(&udc->gadget, 1);
2111
2112 done:
2113         return status;
2114 }
2115 EXPORT_SYMBOL(usb_gadget_register_driver);
2116
2117 int usb_gadget_unregister_driver (struct usb_gadget_driver *driver)
2118 {
2119         unsigned long   flags;
2120         int             status = -ENODEV;
2121
2122         if (!udc)
2123                 return -ENODEV;
2124         if (!driver || driver != udc->driver)
2125                 return -EINVAL;
2126
2127         if (machine_is_omap_innovator() || machine_is_omap_osk())
2128                 omap_vbus_session(&udc->gadget, 0);
2129
2130         if (udc->transceiver)
2131                 (void) otg_set_peripheral(udc->transceiver, NULL);
2132         else
2133                 pullup_disable(udc);
2134
2135         spin_lock_irqsave(&udc->lock, flags);
2136         udc_quiesce(udc);
2137         spin_unlock_irqrestore(&udc->lock, flags);
2138
2139         driver->unbind(&udc->gadget);
2140         udc->gadget.dev.driver = NULL;
2141         udc->driver = NULL;
2142
2143         DBG("unregistered driver '%s'\n", driver->driver.name);
2144         return status;
2145 }
2146 EXPORT_SYMBOL(usb_gadget_unregister_driver);
2147
2148
2149 /*-------------------------------------------------------------------------*/
2150
2151 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2152
2153 #include <linux/seq_file.h>
2154
2155 static const char proc_filename[] = "driver/udc";
2156
2157 #define FOURBITS "%s%s%s%s"
2158 #define EIGHTBITS FOURBITS FOURBITS
2159
2160 static void proc_ep_show(struct seq_file *s, struct omap_ep *ep)
2161 {
2162         u16             stat_flg;
2163         struct omap_req *req;
2164         char            buf[20];
2165
2166         use_ep(ep, 0);
2167
2168         if (use_dma && ep->has_dma)
2169                 snprintf(buf, sizeof buf, "(%cxdma%d lch%d) ",
2170                         (ep->bEndpointAddress & USB_DIR_IN) ? 't' : 'r',
2171                         ep->dma_channel - 1, ep->lch);
2172         else
2173                 buf[0] = 0;
2174
2175         stat_flg = UDC_STAT_FLG_REG;
2176         seq_printf(s,
2177                 "\n%s %s%s%sirqs %ld stat %04x " EIGHTBITS FOURBITS "%s\n",
2178                 ep->name, buf,
2179                 ep->double_buf ? "dbuf " : "",
2180                 ({char *s; switch(ep->ackwait){
2181                 case 0: s = ""; break;
2182                 case 1: s = "(ackw) "; break;
2183                 case 2: s = "(ackw2) "; break;
2184                 default: s = "(?) "; break;
2185                 } s;}),
2186                 ep->irqs, stat_flg,
2187                 (stat_flg & UDC_NO_RXPACKET) ? "no_rxpacket " : "",
2188                 (stat_flg & UDC_MISS_IN) ? "miss_in " : "",
2189                 (stat_flg & UDC_DATA_FLUSH) ? "data_flush " : "",
2190                 (stat_flg & UDC_ISO_ERR) ? "iso_err " : "",
2191                 (stat_flg & UDC_ISO_FIFO_EMPTY) ? "iso_fifo_empty " : "",
2192                 (stat_flg & UDC_ISO_FIFO_FULL) ? "iso_fifo_full " : "",
2193                 (stat_flg & UDC_EP_HALTED) ? "HALT " : "",
2194                 (stat_flg & UDC_STALL) ? "STALL " : "",
2195                 (stat_flg & UDC_NAK) ? "NAK " : "",
2196                 (stat_flg & UDC_ACK) ? "ACK " : "",
2197                 (stat_flg & UDC_FIFO_EN) ? "fifo_en " : "",
2198                 (stat_flg & UDC_NON_ISO_FIFO_EMPTY) ? "fifo_empty " : "",
2199                 (stat_flg & UDC_NON_ISO_FIFO_FULL) ? "fifo_full " : "");
2200
2201         if (list_empty (&ep->queue))
2202                 seq_printf(s, "\t(queue empty)\n");
2203         else
2204                 list_for_each_entry (req, &ep->queue, queue) {
2205                         unsigned        length = req->req.actual;
2206
2207                         if (use_dma && buf[0]) {
2208                                 length += ((ep->bEndpointAddress & USB_DIR_IN)
2209                                                 ? dma_src_len : dma_dest_len)
2210                                         (ep, req->req.dma + length);
2211                                 buf[0] = 0;
2212                         }
2213                         seq_printf(s, "\treq %p len %d/%d buf %p\n",
2214                                         &req->req, length,
2215                                         req->req.length, req->req.buf);
2216                 }
2217 }
2218
2219 static char *trx_mode(unsigned m, int enabled)
2220 {
2221         switch (m) {
2222         case 0:         return enabled ? "*6wire" : "unused";
2223         case 1:         return "4wire";
2224         case 2:         return "3wire";
2225         case 3:         return "6wire";
2226         default:        return "unknown";
2227         }
2228 }
2229
2230 static int proc_otg_show(struct seq_file *s)
2231 {
2232         u32             tmp;
2233         u32             trans;
2234
2235         tmp = OTG_REV_REG;
2236         trans = USB_TRANSCEIVER_CTRL_REG;
2237         seq_printf(s, "\nOTG rev %d.%d, transceiver_ctrl %05x\n",
2238                 tmp >> 4, tmp & 0xf, trans);
2239         tmp = OTG_SYSCON_1_REG;
2240         seq_printf(s, "otg_syscon1 %08x usb2 %s, usb1 %s, usb0 %s,"
2241                         FOURBITS "\n", tmp,
2242                 trx_mode(USB2_TRX_MODE(tmp), trans & CONF_USB2_UNI_R),
2243                 trx_mode(USB1_TRX_MODE(tmp), trans & CONF_USB1_UNI_R),
2244                 (USB0_TRX_MODE(tmp) == 0 && !cpu_is_omap1710())
2245                         ? "internal"
2246                         : trx_mode(USB0_TRX_MODE(tmp), 1),
2247                 (tmp & OTG_IDLE_EN) ? " !otg" : "",
2248                 (tmp & HST_IDLE_EN) ? " !host" : "",
2249                 (tmp & DEV_IDLE_EN) ? " !dev" : "",
2250                 (tmp & OTG_RESET_DONE) ? " reset_done" : " reset_active");
2251         tmp = OTG_SYSCON_2_REG;
2252         seq_printf(s, "otg_syscon2 %08x%s" EIGHTBITS
2253                         " b_ase_brst=%d hmc=%d\n", tmp,
2254                 (tmp & OTG_EN) ? " otg_en" : "",
2255                 (tmp & USBX_SYNCHRO) ? " synchro" : "",
2256                 // much more SRP stuff
2257                 (tmp & SRP_DATA) ? " srp_data" : "",
2258                 (tmp & SRP_VBUS) ? " srp_vbus" : "",
2259                 (tmp & OTG_PADEN) ? " otg_paden" : "",
2260                 (tmp & HMC_PADEN) ? " hmc_paden" : "",
2261                 (tmp & UHOST_EN) ? " uhost_en" : "",
2262                 (tmp & HMC_TLLSPEED) ? " tllspeed" : "",
2263                 (tmp & HMC_TLLATTACH) ? " tllattach" : "",
2264                 B_ASE_BRST(tmp),
2265                 OTG_HMC(tmp));
2266         tmp = OTG_CTRL_REG;
2267         seq_printf(s, "otg_ctrl    %06x" EIGHTBITS EIGHTBITS "%s\n", tmp,
2268                 (tmp & OTG_ASESSVLD) ? " asess" : "",
2269                 (tmp & OTG_BSESSEND) ? " bsess_end" : "",
2270                 (tmp & OTG_BSESSVLD) ? " bsess" : "",
2271                 (tmp & OTG_VBUSVLD) ? " vbus" : "",
2272                 (tmp & OTG_ID) ? " id" : "",
2273                 (tmp & OTG_DRIVER_SEL) ? " DEVICE" : " HOST",
2274                 (tmp & OTG_A_SETB_HNPEN) ? " a_setb_hnpen" : "",
2275                 (tmp & OTG_A_BUSREQ) ? " a_bus" : "",
2276                 (tmp & OTG_B_HNPEN) ? " b_hnpen" : "",
2277                 (tmp & OTG_B_BUSREQ) ? " b_bus" : "",
2278                 (tmp & OTG_BUSDROP) ? " busdrop" : "",
2279                 (tmp & OTG_PULLDOWN) ? " down" : "",
2280                 (tmp & OTG_PULLUP) ? " up" : "",
2281                 (tmp & OTG_DRV_VBUS) ? " drv" : "",
2282                 (tmp & OTG_PD_VBUS) ? " pd_vb" : "",
2283                 (tmp & OTG_PU_VBUS) ? " pu_vb" : "",
2284                 (tmp & OTG_PU_ID) ? " pu_id" : ""
2285                 );
2286         tmp = OTG_IRQ_EN_REG;
2287         seq_printf(s, "otg_irq_en  %04x" "\n", tmp);
2288         tmp = OTG_IRQ_SRC_REG;
2289         seq_printf(s, "otg_irq_src %04x" "\n", tmp);
2290         tmp = OTG_OUTCTRL_REG;
2291         seq_printf(s, "otg_outctrl %04x" "\n", tmp);
2292         tmp = OTG_TEST_REG;
2293         seq_printf(s, "otg_test    %04x" "\n", tmp);
2294         return 0;
2295 }
2296
2297 static int proc_udc_show(struct seq_file *s, void *_)
2298 {
2299         u32             tmp;
2300         struct omap_ep  *ep;
2301         unsigned long   flags;
2302
2303         spin_lock_irqsave(&udc->lock, flags);
2304
2305         seq_printf(s, "%s, version: " DRIVER_VERSION
2306 #ifdef  USE_ISO
2307                 " (iso)"
2308 #endif
2309                 "%s\n",
2310                 driver_desc,
2311                 use_dma ?  " (dma)" : "");
2312
2313         tmp = UDC_REV_REG & 0xff;
2314         seq_printf(s,
2315                 "UDC rev %d.%d, fifo mode %d, gadget %s\n"
2316                 "hmc %d, transceiver %s\n",
2317                 tmp >> 4, tmp & 0xf,
2318                 fifo_mode,
2319                 udc->driver ? udc->driver->driver.name : "(none)",
2320                 HMC,
2321                 udc->transceiver ? udc->transceiver->label : "(none)");
2322         seq_printf(s, "ULPD control %04x req %04x status %04x\n",
2323                 __REG16(ULPD_CLOCK_CTRL),
2324                 __REG16(ULPD_SOFT_REQ),
2325                 __REG16(ULPD_STATUS_REQ));
2326
2327         /* OTG controller registers */
2328         if (!cpu_is_omap15xx())
2329                 proc_otg_show(s);
2330
2331         tmp = UDC_SYSCON1_REG;
2332         seq_printf(s, "\nsyscon1     %04x" EIGHTBITS "\n", tmp,
2333                 (tmp & UDC_CFG_LOCK) ? " cfg_lock" : "",
2334                 (tmp & UDC_DATA_ENDIAN) ? " data_endian" : "",
2335                 (tmp & UDC_DMA_ENDIAN) ? " dma_endian" : "",
2336                 (tmp & UDC_NAK_EN) ? " nak" : "",
2337                 (tmp & UDC_AUTODECODE_DIS) ? " autodecode_dis" : "",
2338                 (tmp & UDC_SELF_PWR) ? " self_pwr" : "",
2339                 (tmp & UDC_SOFF_DIS) ? " soff_dis" : "",
2340                 (tmp & UDC_PULLUP_EN) ? " PULLUP" : "");
2341         // syscon2 is write-only
2342
2343         /* UDC controller registers */
2344         if (!(tmp & UDC_PULLUP_EN)) {
2345                 seq_printf(s, "(suspended)\n");
2346                 spin_unlock_irqrestore(&udc->lock, flags);
2347                 return 0;
2348         }
2349
2350         tmp = UDC_DEVSTAT_REG;
2351         seq_printf(s, "devstat     %04x" EIGHTBITS "%s%s\n", tmp,
2352                 (tmp & UDC_B_HNP_ENABLE) ? " b_hnp" : "",
2353                 (tmp & UDC_A_HNP_SUPPORT) ? " a_hnp" : "",
2354                 (tmp & UDC_A_ALT_HNP_SUPPORT) ? " a_alt_hnp" : "",
2355                 (tmp & UDC_R_WK_OK) ? " r_wk_ok" : "",
2356                 (tmp & UDC_USB_RESET) ? " usb_reset" : "",
2357                 (tmp & UDC_SUS) ? " SUS" : "",
2358                 (tmp & UDC_CFG) ? " CFG" : "",
2359                 (tmp & UDC_ADD) ? " ADD" : "",
2360                 (tmp & UDC_DEF) ? " DEF" : "",
2361                 (tmp & UDC_ATT) ? " ATT" : "");
2362         seq_printf(s, "sof         %04x\n", UDC_SOF_REG);
2363         tmp = UDC_IRQ_EN_REG;
2364         seq_printf(s, "irq_en      %04x" FOURBITS "%s\n", tmp,
2365                 (tmp & UDC_SOF_IE) ? " sof" : "",
2366                 (tmp & UDC_EPN_RX_IE) ? " epn_rx" : "",
2367                 (tmp & UDC_EPN_TX_IE) ? " epn_tx" : "",
2368                 (tmp & UDC_DS_CHG_IE) ? " ds_chg" : "",
2369                 (tmp & UDC_EP0_IE) ? " ep0" : "");
2370         tmp = UDC_IRQ_SRC_REG;
2371         seq_printf(s, "irq_src     %04x" EIGHTBITS "%s%s\n", tmp,
2372                 (tmp & UDC_TXN_DONE) ? " txn_done" : "",
2373                 (tmp & UDC_RXN_CNT) ? " rxn_cnt" : "",
2374                 (tmp & UDC_RXN_EOT) ? " rxn_eot" : "",
2375                 (tmp & UDC_SOF) ? " sof" : "",
2376                 (tmp & UDC_EPN_RX) ? " epn_rx" : "",
2377                 (tmp & UDC_EPN_TX) ? " epn_tx" : "",
2378                 (tmp & UDC_DS_CHG) ? " ds_chg" : "",
2379                 (tmp & UDC_SETUP) ? " setup" : "",
2380                 (tmp & UDC_EP0_RX) ? " ep0out" : "",
2381                 (tmp & UDC_EP0_TX) ? " ep0in" : "");
2382         if (use_dma) {
2383                 unsigned i;
2384
2385                 tmp = UDC_DMA_IRQ_EN_REG;
2386                 seq_printf(s, "dma_irq_en  %04x%s" EIGHTBITS "\n", tmp,
2387                         (tmp & UDC_TX_DONE_IE(3)) ? " tx2_done" : "",
2388                         (tmp & UDC_RX_CNT_IE(3)) ? " rx2_cnt" : "",
2389                         (tmp & UDC_RX_EOT_IE(3)) ? " rx2_eot" : "",
2390
2391                         (tmp & UDC_TX_DONE_IE(2)) ? " tx1_done" : "",
2392                         (tmp & UDC_RX_CNT_IE(2)) ? " rx1_cnt" : "",
2393                         (tmp & UDC_RX_EOT_IE(2)) ? " rx1_eot" : "",
2394
2395                         (tmp & UDC_TX_DONE_IE(1)) ? " tx0_done" : "",
2396                         (tmp & UDC_RX_CNT_IE(1)) ? " rx0_cnt" : "",
2397                         (tmp & UDC_RX_EOT_IE(1)) ? " rx0_eot" : "");
2398
2399                 tmp = UDC_RXDMA_CFG_REG;
2400                 seq_printf(s, "rxdma_cfg   %04x\n", tmp);
2401                 if (tmp) {
2402                         for (i = 0; i < 3; i++) {
2403                                 if ((tmp & (0x0f << (i * 4))) == 0)
2404                                         continue;
2405                                 seq_printf(s, "rxdma[%d]    %04x\n", i,
2406                                                 UDC_RXDMA_REG(i + 1));
2407                         }
2408                 }
2409                 tmp = UDC_TXDMA_CFG_REG;
2410                 seq_printf(s, "txdma_cfg   %04x\n", tmp);
2411                 if (tmp) {
2412                         for (i = 0; i < 3; i++) {
2413                                 if (!(tmp & (0x0f << (i * 4))))
2414                                         continue;
2415                                 seq_printf(s, "txdma[%d]    %04x\n", i,
2416                                                 UDC_TXDMA_REG(i + 1));
2417                         }
2418                 }
2419         }
2420
2421         tmp = UDC_DEVSTAT_REG;
2422         if (tmp & UDC_ATT) {
2423                 proc_ep_show(s, &udc->ep[0]);
2424                 if (tmp & UDC_ADD) {
2425                         list_for_each_entry (ep, &udc->gadget.ep_list,
2426                                         ep.ep_list) {
2427                                 if (ep->desc)
2428                                         proc_ep_show(s, ep);
2429                         }
2430                 }
2431         }
2432         spin_unlock_irqrestore(&udc->lock, flags);
2433         return 0;
2434 }
2435
2436 static int proc_udc_open(struct inode *inode, struct file *file)
2437 {
2438         return single_open(file, proc_udc_show, NULL);
2439 }
2440
2441 static struct file_operations proc_ops = {
2442         .open           = proc_udc_open,
2443         .read           = seq_read,
2444         .llseek         = seq_lseek,
2445         .release        = single_release,
2446 };
2447
2448 static void create_proc_file(void)
2449 {
2450         struct proc_dir_entry *pde;
2451
2452         pde = create_proc_entry (proc_filename, 0, NULL);
2453         if (pde)
2454                 pde->proc_fops = &proc_ops;
2455 }
2456
2457 static void remove_proc_file(void)
2458 {
2459         remove_proc_entry(proc_filename, NULL);
2460 }
2461
2462 #else
2463
2464 static inline void create_proc_file(void) {}
2465 static inline void remove_proc_file(void) {}
2466
2467 #endif
2468
2469 /*-------------------------------------------------------------------------*/
2470
2471 /* Before this controller can enumerate, we need to pick an endpoint
2472  * configuration, or "fifo_mode"  That involves allocating 2KB of packet
2473  * buffer space among the endpoints we'll be operating.
2474  *
2475  * NOTE: as of OMAP 1710 ES2.0, writing a new endpoint config when
2476  * UDC_SYSCON_1_REG.CFG_LOCK is set can now work.  We won't use that
2477  * capability yet though.
2478  */
2479 static unsigned __init
2480 omap_ep_setup(char *name, u8 addr, u8 type,
2481                 unsigned buf, unsigned maxp, int dbuf)
2482 {
2483         struct omap_ep  *ep;
2484         u16             epn_rxtx = 0;
2485
2486         /* OUT endpoints first, then IN */
2487         ep = &udc->ep[addr & 0xf];
2488         if (addr & USB_DIR_IN)
2489                 ep += 16;
2490
2491         /* in case of ep init table bugs */
2492         BUG_ON(ep->name[0]);
2493
2494         /* chip setup ... bit values are same for IN, OUT */
2495         if (type == USB_ENDPOINT_XFER_ISOC) {
2496                 switch (maxp) {
2497                 case 8:         epn_rxtx = 0 << 12; break;
2498                 case 16:        epn_rxtx = 1 << 12; break;
2499                 case 32:        epn_rxtx = 2 << 12; break;
2500                 case 64:        epn_rxtx = 3 << 12; break;
2501                 case 128:       epn_rxtx = 4 << 12; break;
2502                 case 256:       epn_rxtx = 5 << 12; break;
2503                 case 512:       epn_rxtx = 6 << 12; break;
2504                 default:        BUG();
2505                 }
2506                 epn_rxtx |= UDC_EPN_RX_ISO;
2507                 dbuf = 1;
2508         } else {
2509                 /* double-buffering "not supported" on 15xx,
2510                  * and ignored for PIO-IN on 16xx
2511                  */
2512                 if (!use_dma || cpu_is_omap15xx())
2513                         dbuf = 0;
2514
2515                 switch (maxp) {
2516                 case 8:         epn_rxtx = 0 << 12; break;
2517                 case 16:        epn_rxtx = 1 << 12; break;
2518                 case 32:        epn_rxtx = 2 << 12; break;
2519                 case 64:        epn_rxtx = 3 << 12; break;
2520                 default:        BUG();
2521                 }
2522                 if (dbuf && addr)
2523                         epn_rxtx |= UDC_EPN_RX_DB;
2524                 init_timer(&ep->timer);
2525                 ep->timer.function = pio_out_timer;
2526                 ep->timer.data = (unsigned long) ep;
2527         }
2528         if (addr)
2529                 epn_rxtx |= UDC_EPN_RX_VALID;
2530         BUG_ON(buf & 0x07);
2531         epn_rxtx |= buf >> 3;
2532
2533         DBG("%s addr %02x rxtx %04x maxp %d%s buf %d\n",
2534                 name, addr, epn_rxtx, maxp, dbuf ? "x2" : "", buf);
2535
2536         if (addr & USB_DIR_IN)
2537                 UDC_EP_TX_REG(addr & 0xf) = epn_rxtx;
2538         else
2539                 UDC_EP_RX_REG(addr) = epn_rxtx;
2540
2541         /* next endpoint's buffer starts after this one's */
2542         buf += maxp;
2543         if (dbuf)
2544                 buf += maxp;
2545         BUG_ON(buf > 2048);
2546
2547         /* set up driver data structures */
2548         BUG_ON(strlen(name) >= sizeof ep->name);
2549         strlcpy(ep->name, name, sizeof ep->name);
2550         INIT_LIST_HEAD(&ep->queue);
2551         INIT_LIST_HEAD(&ep->iso);
2552         ep->bEndpointAddress = addr;
2553         ep->bmAttributes = type;
2554         ep->double_buf = dbuf;
2555         ep->udc = udc;
2556
2557         ep->ep.name = ep->name;
2558         ep->ep.ops = &omap_ep_ops;
2559         ep->ep.maxpacket = ep->maxpacket = maxp;
2560         list_add_tail (&ep->ep.ep_list, &udc->gadget.ep_list);
2561
2562         return buf;
2563 }
2564
2565 static void omap_udc_release(struct device *dev)
2566 {
2567         complete(udc->done);
2568         kfree (udc);
2569         udc = NULL;
2570 }
2571
2572 static int __init
2573 omap_udc_setup(struct platform_device *odev, struct otg_transceiver *xceiv)
2574 {
2575         unsigned        tmp, buf;
2576
2577         /* abolish any previous hardware state */
2578         UDC_SYSCON1_REG = 0;
2579         UDC_IRQ_EN_REG = 0;
2580         UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK;
2581         UDC_DMA_IRQ_EN_REG = 0;
2582         UDC_RXDMA_CFG_REG = 0;
2583         UDC_TXDMA_CFG_REG = 0;
2584
2585         /* UDC_PULLUP_EN gates the chip clock */
2586         // OTG_SYSCON_1_REG |= DEV_IDLE_EN;
2587
2588         udc = kzalloc(sizeof(*udc), SLAB_KERNEL);
2589         if (!udc)
2590                 return -ENOMEM;
2591
2592         spin_lock_init (&udc->lock);
2593
2594         udc->gadget.ops = &omap_gadget_ops;
2595         udc->gadget.ep0 = &udc->ep[0].ep;
2596         INIT_LIST_HEAD(&udc->gadget.ep_list);
2597         INIT_LIST_HEAD(&udc->iso);
2598         udc->gadget.speed = USB_SPEED_UNKNOWN;
2599         udc->gadget.name = driver_name;
2600
2601         device_initialize(&udc->gadget.dev);
2602         strcpy (udc->gadget.dev.bus_id, "gadget");
2603         udc->gadget.dev.release = omap_udc_release;
2604         udc->gadget.dev.parent = &odev->dev;
2605         if (use_dma)
2606                 udc->gadget.dev.dma_mask = odev->dev.dma_mask;
2607
2608         udc->transceiver = xceiv;
2609
2610         /* ep0 is special; put it right after the SETUP buffer */
2611         buf = omap_ep_setup("ep0", 0, USB_ENDPOINT_XFER_CONTROL,
2612                         8 /* after SETUP */, 64 /* maxpacket */, 0);
2613         list_del_init(&udc->ep[0].ep.ep_list);
2614
2615         /* initially disable all non-ep0 endpoints */
2616         for (tmp = 1; tmp < 15; tmp++) {
2617                 UDC_EP_RX_REG(tmp) = 0;
2618                 UDC_EP_TX_REG(tmp) = 0;
2619         }
2620
2621 #define OMAP_BULK_EP(name,addr) \
2622         buf = omap_ep_setup(name "-bulk", addr, \
2623                         USB_ENDPOINT_XFER_BULK, buf, 64, 1);
2624 #define OMAP_INT_EP(name,addr, maxp) \
2625         buf = omap_ep_setup(name "-int", addr, \
2626                         USB_ENDPOINT_XFER_INT, buf, maxp, 0);
2627 #define OMAP_ISO_EP(name,addr, maxp) \
2628         buf = omap_ep_setup(name "-iso", addr, \
2629                         USB_ENDPOINT_XFER_ISOC, buf, maxp, 1);
2630
2631         switch (fifo_mode) {
2632         case 0:
2633                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2634                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2635                 OMAP_INT_EP("ep3in",   USB_DIR_IN  | 3, 16);
2636                 break;
2637         case 1:
2638                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2639                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2640                 OMAP_INT_EP("ep9in",   USB_DIR_IN  | 9, 16);
2641
2642                 OMAP_BULK_EP("ep3in",  USB_DIR_IN  | 3);
2643                 OMAP_BULK_EP("ep4out", USB_DIR_OUT | 4);
2644                 OMAP_INT_EP("ep10in",  USB_DIR_IN  | 10, 16);
2645
2646                 OMAP_BULK_EP("ep5in",  USB_DIR_IN  | 5);
2647                 OMAP_BULK_EP("ep5out", USB_DIR_OUT | 5);
2648                 OMAP_INT_EP("ep11in",  USB_DIR_IN  | 11, 16);
2649
2650                 OMAP_BULK_EP("ep6in",  USB_DIR_IN  | 6);
2651                 OMAP_BULK_EP("ep6out", USB_DIR_OUT | 6);
2652                 OMAP_INT_EP("ep12in",  USB_DIR_IN  | 12, 16);
2653
2654                 OMAP_BULK_EP("ep7in",  USB_DIR_IN  | 7);
2655                 OMAP_BULK_EP("ep7out", USB_DIR_OUT | 7);
2656                 OMAP_INT_EP("ep13in",  USB_DIR_IN  | 13, 16);
2657                 OMAP_INT_EP("ep13out", USB_DIR_OUT | 13, 16);
2658
2659                 OMAP_BULK_EP("ep8in",  USB_DIR_IN  | 8);
2660                 OMAP_BULK_EP("ep8out", USB_DIR_OUT | 8);
2661                 OMAP_INT_EP("ep14in",  USB_DIR_IN  | 14, 16);
2662                 OMAP_INT_EP("ep14out", USB_DIR_OUT | 14, 16);
2663
2664                 OMAP_BULK_EP("ep15in",  USB_DIR_IN  | 15);
2665                 OMAP_BULK_EP("ep15out", USB_DIR_OUT | 15);
2666
2667                 break;
2668
2669 #ifdef  USE_ISO
2670         case 2:                 /* mixed iso/bulk */
2671                 OMAP_ISO_EP("ep1in",   USB_DIR_IN  | 1, 256);
2672                 OMAP_ISO_EP("ep2out",  USB_DIR_OUT | 2, 256);
2673                 OMAP_ISO_EP("ep3in",   USB_DIR_IN  | 3, 128);
2674                 OMAP_ISO_EP("ep4out",  USB_DIR_OUT | 4, 128);
2675
2676                 OMAP_INT_EP("ep5in",   USB_DIR_IN  | 5, 16);
2677
2678                 OMAP_BULK_EP("ep6in",  USB_DIR_IN  | 6);
2679                 OMAP_BULK_EP("ep7out", USB_DIR_OUT | 7);
2680                 OMAP_INT_EP("ep8in",   USB_DIR_IN  | 8, 16);
2681                 break;
2682         case 3:                 /* mixed bulk/iso */
2683                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2684                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2685                 OMAP_INT_EP("ep3in",   USB_DIR_IN  | 3, 16);
2686
2687                 OMAP_BULK_EP("ep4in",  USB_DIR_IN  | 4);
2688                 OMAP_BULK_EP("ep5out", USB_DIR_OUT | 5);
2689                 OMAP_INT_EP("ep6in",   USB_DIR_IN  | 6, 16);
2690
2691                 OMAP_ISO_EP("ep7in",   USB_DIR_IN  | 7, 256);
2692                 OMAP_ISO_EP("ep8out",  USB_DIR_OUT | 8, 256);
2693                 OMAP_INT_EP("ep9in",   USB_DIR_IN  | 9, 16);
2694                 break;
2695 #endif
2696
2697         /* add more modes as needed */
2698
2699         default:
2700                 ERR("unsupported fifo_mode #%d\n", fifo_mode);
2701                 return -ENODEV;
2702         }
2703         UDC_SYSCON1_REG = UDC_CFG_LOCK|UDC_SELF_PWR;
2704         INFO("fifo mode %d, %d bytes not used\n", fifo_mode, 2048 - buf);
2705         return 0;
2706 }
2707
2708 static int __init omap_udc_probe(struct platform_device *pdev)
2709 {
2710         int                     status = -ENODEV;
2711         int                     hmc;
2712         struct otg_transceiver  *xceiv = NULL;
2713         const char              *type = NULL;
2714         struct omap_usb_config  *config = pdev->dev.platform_data;
2715
2716         /* NOTE:  "knows" the order of the resources! */
2717         if (!request_mem_region(pdev->resource[0].start,
2718                         pdev->resource[0].end - pdev->resource[0].start + 1,
2719                         driver_name)) {
2720                 DBG("request_mem_region failed\n");
2721                 return -EBUSY;
2722         }
2723
2724         INFO("OMAP UDC rev %d.%d%s\n",
2725                 UDC_REV_REG >> 4, UDC_REV_REG & 0xf,
2726                 config->otg ? ", Mini-AB" : "");
2727
2728         /* use the mode given to us by board init code */
2729         if (cpu_is_omap15xx()) {
2730                 hmc = HMC_1510;
2731                 type = "(unknown)";
2732
2733                 if (machine_is_omap_innovator()) {
2734                         /* just set up software VBUS detect, and then
2735                          * later rig it so we always report VBUS.
2736                          * FIXME without really sensing VBUS, we can't
2737                          * know when to turn PULLUP_EN on/off; and that
2738                          * means we always "need" the 48MHz clock.
2739                          */
2740                         u32 tmp = FUNC_MUX_CTRL_0_REG;
2741
2742                         FUNC_MUX_CTRL_0_REG &= ~VBUS_CTRL_1510;
2743                         tmp |= VBUS_MODE_1510;
2744                         tmp &= ~VBUS_CTRL_1510;
2745                         FUNC_MUX_CTRL_0_REG = tmp;
2746                 }
2747         } else {
2748                 /* The transceiver may package some GPIO logic or handle
2749                  * loopback and/or transceiverless setup; if we find one,
2750                  * use it.  Except for OTG, we don't _need_ to talk to one;
2751                  * but not having one probably means no VBUS detection.
2752                  */
2753                 xceiv = otg_get_transceiver();
2754                 if (xceiv)
2755                         type = xceiv->label;
2756                 else if (config->otg) {
2757                         DBG("OTG requires external transceiver!\n");
2758                         goto cleanup0;
2759                 }
2760
2761                 hmc = HMC_1610;
2762                 switch (hmc) {
2763                 case 0:                 /* POWERUP DEFAULT == 0 */
2764                 case 4:
2765                 case 12:
2766                 case 20:
2767                         if (!cpu_is_omap1710()) {
2768                                 type = "integrated";
2769                                 break;
2770                         }
2771                         /* FALL THROUGH */
2772                 case 3:
2773                 case 11:
2774                 case 16:
2775                 case 19:
2776                 case 25:
2777                         if (!xceiv) {
2778                                 DBG("external transceiver not registered!\n");
2779                                 type = "unknown";
2780                         }
2781                         break;
2782                 case 21:                        /* internal loopback */
2783                         type = "loopback";
2784                         break;
2785                 case 14:                        /* transceiverless */
2786                         if (cpu_is_omap1710())
2787                                 goto bad_on_1710;
2788                         /* FALL THROUGH */
2789                 case 13:
2790                 case 15:
2791                         type = "no";
2792                         break;
2793
2794                 default:
2795 bad_on_1710:
2796                         ERR("unrecognized UDC HMC mode %d\n", hmc);
2797                         goto cleanup0;
2798                 }
2799         }
2800         INFO("hmc mode %d, %s transceiver\n", hmc, type);
2801
2802         /* a "gadget" abstracts/virtualizes the controller */
2803         status = omap_udc_setup(pdev, xceiv);
2804         if (status) {
2805                 goto cleanup0;
2806         }
2807         xceiv = NULL;
2808         // "udc" is now valid
2809         pullup_disable(udc);
2810 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
2811         udc->gadget.is_otg = (config->otg != 0);
2812 #endif
2813
2814         /* starting with omap1710 es2.0, clear toggle is a separate bit */
2815         if (UDC_REV_REG >= 0x61)
2816                 udc->clr_halt = UDC_RESET_EP | UDC_CLRDATA_TOGGLE;
2817         else
2818                 udc->clr_halt = UDC_RESET_EP;
2819
2820         /* USB general purpose IRQ:  ep0, state changes, dma, etc */
2821         status = request_irq(pdev->resource[1].start, omap_udc_irq,
2822                         SA_SAMPLE_RANDOM, driver_name, udc);
2823         if (status != 0) {
2824                 ERR( "can't get irq %ld, err %d\n",
2825                         pdev->resource[1].start, status);
2826                 goto cleanup1;
2827         }
2828
2829         /* USB "non-iso" IRQ (PIO for all but ep0) */
2830         status = request_irq(pdev->resource[2].start, omap_udc_pio_irq,
2831                         SA_SAMPLE_RANDOM, "omap_udc pio", udc);
2832         if (status != 0) {
2833                 ERR( "can't get irq %ld, err %d\n",
2834                         pdev->resource[2].start, status);
2835                 goto cleanup2;
2836         }
2837 #ifdef  USE_ISO
2838         status = request_irq(pdev->resource[3].start, omap_udc_iso_irq,
2839                         SA_INTERRUPT, "omap_udc iso", udc);
2840         if (status != 0) {
2841                 ERR("can't get irq %ld, err %d\n",
2842                         pdev->resource[3].start, status);
2843                 goto cleanup3;
2844         }
2845 #endif
2846
2847         create_proc_file();
2848         device_add(&udc->gadget.dev);
2849         return 0;
2850
2851 #ifdef  USE_ISO
2852 cleanup3:
2853         free_irq(pdev->resource[2].start, udc);
2854 #endif
2855
2856 cleanup2:
2857         free_irq(pdev->resource[1].start, udc);
2858
2859 cleanup1:
2860         kfree (udc);
2861         udc = NULL;
2862
2863 cleanup0:
2864         if (xceiv)
2865                 put_device(xceiv->dev);
2866         release_mem_region(pdev->resource[0].start,
2867                         pdev->resource[0].end - pdev->resource[0].start + 1);
2868         return status;
2869 }
2870
2871 static int __exit omap_udc_remove(struct platform_device *pdev)
2872 {
2873         DECLARE_COMPLETION(done);
2874
2875         if (!udc)
2876                 return -ENODEV;
2877
2878         udc->done = &done;
2879
2880         pullup_disable(udc);
2881         if (udc->transceiver) {
2882                 put_device(udc->transceiver->dev);
2883                 udc->transceiver = NULL;
2884         }
2885         UDC_SYSCON1_REG = 0;
2886
2887         remove_proc_file();
2888
2889 #ifdef  USE_ISO
2890         free_irq(pdev->resource[3].start, udc);
2891 #endif
2892         free_irq(pdev->resource[2].start, udc);
2893         free_irq(pdev->resource[1].start, udc);
2894
2895         release_mem_region(pdev->resource[0].start,
2896                         pdev->resource[0].end - pdev->resource[0].start + 1);
2897
2898         device_unregister(&udc->gadget.dev);
2899         wait_for_completion(&done);
2900
2901         return 0;
2902 }
2903
2904 /* suspend/resume/wakeup from sysfs (echo > power/state) or when the
2905  * system is forced into deep sleep
2906  *
2907  * REVISIT we should probably reject suspend requests when there's a host
2908  * session active, rather than disconnecting, at least on boards that can
2909  * report VBUS irqs (UDC_DEVSTAT_REG.UDC_ATT).  And in any case, we need to
2910  * make host resumes and VBUS detection trigger OMAP wakeup events; that
2911  * may involve talking to an external transceiver (e.g. isp1301).
2912  */
2913
2914 static int omap_udc_suspend(struct platform_device *dev, pm_message_t message)
2915 {
2916         u32     devstat;
2917
2918         devstat = UDC_DEVSTAT_REG;
2919
2920         /* we're requesting 48 MHz clock if the pullup is enabled
2921          * (== we're attached to the host) and we're not suspended,
2922          * which would prevent entry to deep sleep...
2923          */
2924         if ((devstat & UDC_ATT) != 0 && (devstat & UDC_SUS) == 0) {
2925                 WARN("session active; suspend requires disconnect\n");
2926                 omap_pullup(&udc->gadget, 0);
2927         }
2928
2929         udc->gadget.dev.power.power_state = PMSG_SUSPEND;
2930         udc->gadget.dev.parent->power.power_state = PMSG_SUSPEND;
2931         return 0;
2932 }
2933
2934 static int omap_udc_resume(struct platform_device *dev)
2935 {
2936         DBG("resume + wakeup/SRP\n");
2937         omap_pullup(&udc->gadget, 1);
2938
2939         /* maybe the host would enumerate us if we nudged it */
2940         msleep(100);
2941         return omap_wakeup(&udc->gadget);
2942 }
2943
2944 /*-------------------------------------------------------------------------*/
2945
2946 static struct platform_driver udc_driver = {
2947         .probe          = omap_udc_probe,
2948         .remove         = __exit_p(omap_udc_remove),
2949         .suspend        = omap_udc_suspend,
2950         .resume         = omap_udc_resume,
2951         .driver         = {
2952                 .owner  = THIS_MODULE,
2953                 .name   = (char *) driver_name,
2954         },
2955 };
2956
2957 static int __init udc_init(void)
2958 {
2959         INFO("%s, version: " DRIVER_VERSION
2960 #ifdef  USE_ISO
2961                 " (iso)"
2962 #endif
2963                 "%s\n", driver_desc,
2964                 use_dma ?  " (dma)" : "");
2965         return platform_driver_register(&udc_driver);
2966 }
2967 module_init(udc_init);
2968
2969 static void __exit udc_exit(void)
2970 {
2971         platform_driver_unregister(&udc_driver);
2972 }
2973 module_exit(udc_exit);
2974
2975 MODULE_DESCRIPTION(DRIVER_DESC);
2976 MODULE_LICENSE("GPL");
2977