git.oblomov.eu Git - linux-2.6/blob - arch/powerpc/boot/dts/mpc8641_hpcn.dts

   1 /*
   2  * MPC8641 HPCN Device Tree Source
   3  *
   4  * Copyright 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "MPC8641HPCN";
  16         compatible = "fsl,mpc8641hpcn";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 ethernet2 = &enet2;
  24                 ethernet3 = &enet3;
  25                 serial0 = &serial0;
  26                 serial1 = &serial1;
  27                 pci0 = &pci0;
  28                 pci1 = &pci1;
  29         };
  30
  31         cpus {
  32                 #address-cells = <1>;
  33                 #size-cells = <0>;
  34
  35                 PowerPC,8641@0 {
  36                         device_type = "cpu";
  37                         reg = <0>;
  38                         d-cache-line-size = <32>;
  39                         i-cache-line-size = <32>;
  40                         d-cache-size = <32768>;         // L1
  41                         i-cache-size = <32768>;         // L1
  42                         timebase-frequency = <0>;       // From uboot
  43                         bus-frequency = <0>;            // From uboot
  44                         clock-frequency = <0>;          // From uboot
  45                 };
  46                 PowerPC,8641@1 {
  47                         device_type = "cpu";
  48                         reg = <1>;
  49                         d-cache-line-size = <32>;
  50                         i-cache-line-size = <32>;
  51                         d-cache-size = <32768>;
  52                         i-cache-size = <32768>;
  53                         timebase-frequency = <0>;       // From uboot
  54                         bus-frequency = <0>;            // From uboot
  55                         clock-frequency = <0>;          // From uboot
  56                 };
  57         };
  58
  59         memory {
  60                 device_type = "memory";
  61                 reg = <0x00000000 0x40000000>;  // 1G at 0x0
  62         };
  63
  64         localbus@f8005000 {
  65                 #address-cells = <2>;
  66                 #size-cells = <1>;
  67                 compatible = "fsl,mpc8641-localbus", "simple-bus";
  68                 reg = <0xf8005000 0x1000>;
  69                 interrupts = <19 2>;
  70                 interrupt-parent = <&mpic>;
  71
  72                 ranges = <0 0 0xff800000 0x00800000
  73                           1 0 0xfe000000 0x01000000
  74                           2 0 0xf8200000 0x00100000
  75                           3 0 0xf8100000 0x00100000>;
  76
  77                 flash@0,0 {
  78                         compatible = "cfi-flash";
  79                         reg = <0 0 0x00800000>;
  80                         bank-width = <2>;
  81                         device-width = <2>;
  82                         #address-cells = <1>;
  83                         #size-cells = <1>;
  84                         partition@0 {
  85                                 label = "kernel";
  86                                 reg = <0x00000000 0x00300000>;
  87                         };
  88                         partition@300000 {
  89                                 label = "firmware b";
  90                                 reg = <0x00300000 0x00100000>;
  91                                 read-only;
  92                         };
  93                         partition@400000 {
  94                                 label = "fs";
  95                                 reg = <0x00400000 0x00300000>;
  96                         };
  97                         partition@700000 {
  98                                 label = "firmware a";
  99                                 reg = <0x00700000 0x00100000>;
 100                                 read-only;
 101                         };
 102                 };
 103         };
 104
 105         soc8641@f8000000 {
 106                 #address-cells = <1>;
 107                 #size-cells = <1>;
 108                 device_type = "soc";
 109                 compatible = "simple-bus";
 110                 ranges = <0x00000000 0xf8000000 0x00100000>;
 111                 reg = <0xf8000000 0x00001000>;  // CCSRBAR
 112                 bus-frequency = <0>;
 113
 114                 i2c@3000 {
 115                         #address-cells = <1>;
 116                         #size-cells = <0>;
 117                         cell-index = <0>;
 118                         compatible = "fsl-i2c";
 119                         reg = <0x3000 0x100>;
 120                         interrupts = <43 2>;
 121                         interrupt-parent = <&mpic>;
 122                         dfsrr;
 123                 };
 124
 125                 i2c@3100 {
 126                         #address-cells = <1>;
 127                         #size-cells = <0>;
 128                         cell-index = <1>;
 129                         compatible = "fsl-i2c";
 130                         reg = <0x3100 0x100>;
 131                         interrupts = <43 2>;
 132                         interrupt-parent = <&mpic>;
 133                         dfsrr;
 134                 };
 135
 136                 mdio@24520 {
 137                         #address-cells = <1>;
 138                         #size-cells = <0>;
 139                         compatible = "fsl,gianfar-mdio";
 140                         reg = <0x24520 0x20>;
 141
 142                         phy0: ethernet-phy@0 {
 143                                 interrupt-parent = <&mpic>;
 144                                 interrupts = <10 1>;
 145                                 reg = <0>;
 146                                 device_type = "ethernet-phy";
 147                         };
 148                         phy1: ethernet-phy@1 {
 149                                 interrupt-parent = <&mpic>;
 150                                 interrupts = <10 1>;
 151                                 reg = <1>;
 152                                 device_type = "ethernet-phy";
 153                         };
 154                         phy2: ethernet-phy@2 {
 155                                 interrupt-parent = <&mpic>;
 156                                 interrupts = <10 1>;
 157                                 reg = <2>;
 158                                 device_type = "ethernet-phy";
 159                         };
 160                         phy3: ethernet-phy@3 {
 161                                 interrupt-parent = <&mpic>;
 162                                 interrupts = <10 1>;
 163                                 reg = <3>;
 164                                 device_type = "ethernet-phy";
 165                         };
 166                 };
 167
 168                 enet0: ethernet@24000 {
 169                         cell-index = <0>;
 170                         device_type = "network";
 171                         model = "TSEC";
 172                         compatible = "gianfar";
 173                         reg = <0x24000 0x1000>;
 174                         local-mac-address = [ 00 00 00 00 00 00 ];
 175                         interrupts = <29 2 30  2 34 2>;
 176                         interrupt-parent = <&mpic>;
 177                         phy-handle = <&phy0>;
 178                         phy-connection-type = "rgmii-id";
 179                 };
 180
 181                 enet1: ethernet@25000 {
 182                         cell-index = <1>;
 183                         device_type = "network";
 184                         model = "TSEC";
 185                         compatible = "gianfar";
 186                         reg = <0x25000 0x1000>;
 187                         local-mac-address = [ 00 00 00 00 00 00 ];
 188                         interrupts = <35 2 36 2 40 2>;
 189                         interrupt-parent = <&mpic>;
 190                         phy-handle = <&phy1>;
 191                         phy-connection-type = "rgmii-id";
 192                 };
 193
 194                 enet2: ethernet@26000 {
 195                         cell-index = <2>;
 196                         device_type = "network";
 197                         model = "TSEC";
 198                         compatible = "gianfar";
 199                         reg = <0x26000 0x1000>;
 200                         local-mac-address = [ 00 00 00 00 00 00 ];
 201                         interrupts = <31 2 32 2 33 2>;
 202                         interrupt-parent = <&mpic>;
 203                         phy-handle = <&phy2>;
 204                         phy-connection-type = "rgmii-id";
 205                 };
 206
 207                 enet3: ethernet@27000 {
 208                         cell-index = <3>;
 209                         device_type = "network";
 210                         model = "TSEC";
 211                         compatible = "gianfar";
 212                         reg = <0x27000 0x1000>;
 213                         local-mac-address = [ 00 00 00 00 00 00 ];
 214                         interrupts = <37 2 38 2 39 2>;
 215                         interrupt-parent = <&mpic>;
 216                         phy-handle = <&phy3>;
 217                         phy-connection-type = "rgmii-id";
 218                 };
 219
 220                 serial0: serial@4500 {
 221                         cell-index = <0>;
 222                         device_type = "serial";
 223                         compatible = "ns16550";
 224                         reg = <0x4500 0x100>;
 225                         clock-frequency = <0>;
 226                         interrupts = <42 2>;
 227                         interrupt-parent = <&mpic>;
 228                 };
 229
 230                 serial1: serial@4600 {
 231                         cell-index = <1>;
 232                         device_type = "serial";
 233                         compatible = "ns16550";
 234                         reg = <0x4600 0x100>;
 235                         clock-frequency = <0>;
 236                         interrupts = <28 2>;
 237                         interrupt-parent = <&mpic>;
 238                 };
 239
 240                 mpic: pic@40000 {
 241                         clock-frequency = <0>;
 242                         interrupt-controller;
 243                         #address-cells = <0>;
 244                         #interrupt-cells = <2>;
 245                         reg = <0x40000 0x40000>;
 246                         compatible = "chrp,open-pic";
 247                         device_type = "open-pic";
 248                         big-endian;
 249                 };
 250
 251                 global-utilities@e0000 {
 252                         compatible = "fsl,mpc8641-guts";
 253                         reg = <0xe0000 0x1000>;
 254                         fsl,has-rstcr;
 255                 };
 256         };
 257
 258         pci0: pcie@f8008000 {
 259                 cell-index = <0>;
 260                 compatible = "fsl,mpc8641-pcie";
 261                 device_type = "pci";
 262                 #interrupt-cells = <1>;
 263                 #size-cells = <2>;
 264                 #address-cells = <3>;
 265                 reg = <0xf8008000 0x1000>;
 266                 bus-range = <0x0 0xff>;
 267                 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
 268                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
 269                 clock-frequency = <33333333>;
 270                 interrupt-parent = <&mpic>;
 271                 interrupts = <24 2>;
 272                 interrupt-map-mask = <0xff00 0 0 7>;
 273                 interrupt-map = <
 274                         /* IDSEL 0x11 func 0 - PCI slot 1 */
 275                         0x8800 0 0 1 &mpic 2 1
 276                         0x8800 0 0 2 &mpic 3 1
 277                         0x8800 0 0 3 &mpic 4 1
 278                         0x8800 0 0 4 &mpic 1 1
 279
 280                         /* IDSEL 0x11 func 1 - PCI slot 1 */
 281                         0x8900 0 0 1 &mpic 2 1
 282                         0x8900 0 0 2 &mpic 3 1
 283                         0x8900 0 0 3 &mpic 4 1
 284                         0x8900 0 0 4 &mpic 1 1
 285
 286                         /* IDSEL 0x11 func 2 - PCI slot 1 */
 287                         0x8a00 0 0 1 &mpic 2 1
 288                         0x8a00 0 0 2 &mpic 3 1
 289                         0x8a00 0 0 3 &mpic 4 1
 290                         0x8a00 0 0 4 &mpic 1 1
 291
 292                         /* IDSEL 0x11 func 3 - PCI slot 1 */
 293                         0x8b00 0 0 1 &mpic 2 1
 294                         0x8b00 0 0 2 &mpic 3 1
 295                         0x8b00 0 0 3 &mpic 4 1
 296                         0x8b00 0 0 4 &mpic 1 1
 297
 298                         /* IDSEL 0x11 func 4 - PCI slot 1 */
 299                         0x8c00 0 0 1 &mpic 2 1
 300                         0x8c00 0 0 2 &mpic 3 1
 301                         0x8c00 0 0 3 &mpic 4 1
 302                         0x8c00 0 0 4 &mpic 1 1
 303
 304                         /* IDSEL 0x11 func 5 - PCI slot 1 */
 305                         0x8d00 0 0 1 &mpic 2 1
 306                         0x8d00 0 0 2 &mpic 3 1
 307                         0x8d00 0 0 3 &mpic 4 1
 308                         0x8d00 0 0 4 &mpic 1 1
 309
 310                         /* IDSEL 0x11 func 6 - PCI slot 1 */
 311                         0x8e00 0 0 1 &mpic 2 1
 312                         0x8e00 0 0 2 &mpic 3 1
 313                         0x8e00 0 0 3 &mpic 4 1
 314                         0x8e00 0 0 4 &mpic 1 1
 315
 316                         /* IDSEL 0x11 func 7 - PCI slot 1 */
 317                         0x8f00 0 0 1 &mpic 2 1
 318                         0x8f00 0 0 2 &mpic 3 1
 319                         0x8f00 0 0 3 &mpic 4 1
 320                         0x8f00 0 0 4 &mpic 1 1
 321
 322                         /* IDSEL 0x12 func 0 - PCI slot 2 */
 323                         0x9000 0 0 1 &mpic 3 1
 324                         0x9000 0 0 2 &mpic 4 1
 325                         0x9000 0 0 3 &mpic 1 1
 326                         0x9000 0 0 4 &mpic 2 1
 327
 328                         /* IDSEL 0x12 func 1 - PCI slot 2 */
 329                         0x9100 0 0 1 &mpic 3 1
 330                         0x9100 0 0 2 &mpic 4 1
 331                         0x9100 0 0 3 &mpic 1 1
 332                         0x9100 0 0 4 &mpic 2 1
 333
 334                         /* IDSEL 0x12 func 2 - PCI slot 2 */
 335                         0x9200 0 0 1 &mpic 3 1
 336                         0x9200 0 0 2 &mpic 4 1
 337                         0x9200 0 0 3 &mpic 1 1
 338                         0x9200 0 0 4 &mpic 2 1
 339
 340                         /* IDSEL 0x12 func 3 - PCI slot 2 */
 341                         0x9300 0 0 1 &mpic 3 1
 342                         0x9300 0 0 2 &mpic 4 1
 343                         0x9300 0 0 3 &mpic 1 1
 344                         0x9300 0 0 4 &mpic 2 1
 345
 346                         /* IDSEL 0x12 func 4 - PCI slot 2 */
 347                         0x9400 0 0 1 &mpic 3 1
 348                         0x9400 0 0 2 &mpic 4 1
 349                         0x9400 0 0 3 &mpic 1 1
 350                         0x9400 0 0 4 &mpic 2 1
 351
 352                         /* IDSEL 0x12 func 5 - PCI slot 2 */
 353                         0x9500 0 0 1 &mpic 3 1
 354                         0x9500 0 0 2 &mpic 4 1
 355                         0x9500 0 0 3 &mpic 1 1
 356                         0x9500 0 0 4 &mpic 2 1
 357
 358                         /* IDSEL 0x12 func 6 - PCI slot 2 */
 359                         0x9600 0 0 1 &mpic 3 1
 360                         0x9600 0 0 2 &mpic 4 1
 361                         0x9600 0 0 3 &mpic 1 1
 362                         0x9600 0 0 4 &mpic 2 1
 363
 364                         /* IDSEL 0x12 func 7 - PCI slot 2 */
 365                         0x9700 0 0 1 &mpic 3 1
 366                         0x9700 0 0 2 &mpic 4 1
 367                         0x9700 0 0 3 &mpic 1 1
 368                         0x9700 0 0 4 &mpic 2 1
 369
 370                         // IDSEL 0x1c  USB
 371                         0xe000 0 0 1 &i8259 12 2
 372                         0xe100 0 0 2 &i8259 9 2
 373                         0xe200 0 0 3 &i8259 10 2
 374                         0xe300 0 0 4 &i8259 112
 375
 376                         // IDSEL 0x1d  Audio
 377                         0xe800 0 0 1 &i8259 6 2
 378
 379                         // IDSEL 0x1e Legacy
 380                         0xf000 0 0 1 &i8259 7 2
 381                         0xf100 0 0 1 &i8259 7 2
 382
 383                         // IDSEL 0x1f IDE/SATA
 384                         0xf800 0 0 1 &i8259 14 2
 385                         0xf900 0 0 1 &i8259 5 2
 386                         >;
 387
 388                 pcie@0 {
 389                         reg = <0 0 0 0 0>;
 390                         #size-cells = <2>;
 391                         #address-cells = <3>;
 392                         device_type = "pci";
 393                         ranges = <0x02000000 0x0 0x80000000
 394                                   0x02000000 0x0 0x80000000
 395                                   0x0 0x20000000
 396
 397                                   0x01000000 0x0 0x00000000
 398                                   0x01000000 0x0 0x00000000
 399                                   0x0 0x00100000>;
 400                         uli1575@0 {
 401                                 reg = <0 0 0 0 0>;
 402                                 #size-cells = <2>;
 403                                 #address-cells = <3>;
 404                                 ranges = <0x02000000 0x0 0x80000000
 405                                           0x02000000 0x0 0x80000000
 406                                           0x0 0x20000000
 407                                           0x01000000 0x0 0x00000000
 408                                           0x01000000 0x0 0x00000000
 409                                           0x0 0x00100000>;
 410                                 isa@1e {
 411                                         device_type = "isa";
 412                                         #interrupt-cells = <2>;
 413                                         #size-cells = <1>;
 414                                         #address-cells = <2>;
 415                                         reg = <0xf000 0 0 0 0>;
 416                                         ranges = <1 0 0x01000000 0 0
 417                                                   0x00001000>;
 418                                         interrupt-parent = <&i8259>;
 419
 420                                         i8259: interrupt-controller@20 {
 421                                                 reg = <1 0x20 2
 422                                                        1 0xa0 2
 423                                                        1 0x4d0 2>;
 424                                                 interrupt-controller;
 425                                                 device_type = "interrupt-controller";
 426                                                 #address-cells = <0>;
 427                                                 #interrupt-cells = <2>;
 428                                                 compatible = "chrp,iic";
 429                                                 interrupts = <9 2>;
 430                                                 interrupt-parent = <&mpic>;
 431                                         };
 432
 433                                         i8042@60 {
 434                                                 #size-cells = <0>;
 435                                                 #address-cells = <1>;
 436                                                 reg = <1 0x60 1 1 0x64 1>;
 437                                                 interrupts = <1 3 12 3>;
 438                                                 interrupt-parent =
 439                                                         <&i8259>;
 440
 441                                                 keyboard@0 {
 442                                                         reg = <0>;
 443                                                         compatible = "pnpPNP,303";
 444                                                 };
 445
 446                                                 mouse@1 {
 447                                                         reg = <1>;
 448                                                         compatible = "pnpPNP,f03";
 449                                                 };
 450                                         };
 451
 452                                         rtc@70 {
 453                                                 compatible =
 454                                                         "pnpPNP,b00";
 455                                                 reg = <1 0x70 2>;
 456                                         };
 457
 458                                         gpio@400 {
 459                                                 reg = <1 0x400 0x80>;
 460                                         };
 461                                 };
 462                         };
 463                 };
 464
 465         };
 466
 467         pci1: pcie@f8009000 {
 468                 cell-index = <1>;
 469                 compatible = "fsl,mpc8641-pcie";
 470                 device_type = "pci";
 471                 #interrupt-cells = <1>;
 472                 #size-cells = <2>;
 473                 #address-cells = <3>;
 474                 reg = <0xf8009000 0x1000>;
 475                 bus-range = <0 0xff>;
 476                 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
 477                           0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
 478                 clock-frequency = <33333333>;
 479                 interrupt-parent = <&mpic>;
 480                 interrupts = <25 2>;
 481                 interrupt-map-mask = <0xf800 0 0 7>;
 482                 interrupt-map = <
 483                         /* IDSEL 0x0 */
 484                         0x0000 0 0 1 &mpic 4 1
 485                         0x0000 0 0 2 &mpic 5 1
 486                         0x0000 0 0 3 &mpic 6 1
 487                         0x0000 0 0 4 &mpic 7 1
 488                         >;
 489                 pcie@0 {
 490                         reg = <0 0 0 0 0>;
 491                         #size-cells = <2>;
 492                         #address-cells = <3>;
 493                         device_type = "pci";
 494                         ranges = <0x02000000 0x0 0xa0000000
 495                                   0x02000000 0x0 0xa0000000
 496                                   0x0 0x20000000
 497
 498                                   0x01000000 0x0 0x00000000
 499                                   0x01000000 0x0 0x00000000
 500                                   0x0 0x00100000>;
 501                 };
 502         };
 503 };