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   1 /*
   2  * Favr-32 board-specific setup code.
   3  *
   4  * Copyright (C) 2008 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/clk.h>
  11 #include <linux/etherdevice.h>
  12 #include <linux/bootmem.h>
  13 #include <linux/fb.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/types.h>
  17 #include <linux/linkage.h>
  18 #include <linux/gpio.h>
  19 #include <linux/leds.h>
  20 #include <linux/atmel-mci.h>
  21 #include <linux/atmel-pwm-bl.h>
  22 #include <linux/spi/spi.h>
  23 #include <linux/spi/ads7846.h>
  24
  25 #include <sound/atmel-abdac.h>
  26
  27 #include <video/atmel_lcdc.h>
  28
  29 #include <asm/setup.h>
  30
  31 #include <mach/at32ap700x.h>
  32 #include <mach/init.h>
  33 #include <mach/board.h>
  34 #include <mach/portmux.h>
  35
  36 /* Oscillator frequencies. These are board-specific */
  37 unsigned long at32_board_osc_rates[3] = {
  38         [0] = 32768,    /* 32.768 kHz on RTC osc */
  39         [1] = 20000000, /* 20 MHz on osc0 */
  40         [2] = 12000000, /* 12 MHz on osc1 */
  41 };
  42
  43 /* Initialized by bootloader-specific startup code. */
  44 struct tag *bootloader_tags __initdata;
  45
  46 static struct atmel_abdac_pdata __initdata abdac0_data = {
  47 };
  48
  49 struct eth_addr {
  50         u8 addr[6];
  51 };
  52 static struct eth_addr __initdata hw_addr[1];
  53 static struct eth_platform_data __initdata eth_data[1] = {
  54         {
  55                 .phy_mask       = ~(1U << 1),
  56         },
  57 };
  58
  59 static int ads7843_get_pendown_state(void)
  60 {
  61         return !gpio_get_value(GPIO_PIN_PB(3));
  62 }
  63
  64 static struct ads7846_platform_data ads7843_data = {
  65         .model                  = 7843,
  66         .get_pendown_state      = ads7843_get_pendown_state,
  67         .pressure_max           = 255,
  68         /*
  69          * Values below are for debounce filtering, these can be experimented
  70          * with further.
  71          */
  72         .debounce_max           = 20,
  73         .debounce_rep           = 4,
  74         .debounce_tol           = 5,
  75 };
  76
  77 static struct spi_board_info __initdata spi1_board_info[] = {
  78         {
  79                 /* ADS7843 touch controller */
  80                 .modalias       = "ads7846",
  81                 .max_speed_hz   = 2000000,
  82                 .chip_select    = 0,
  83                 .bus_num        = 1,
  84                 .platform_data  = &ads7843_data,
  85         },
  86 };
  87
  88 static struct mci_platform_data __initdata mci0_data = {
  89         .slot[0] = {
  90                 .bus_width      = 4,
  91                 .detect_pin     = -ENODEV,
  92                 .wp_pin         = -ENODEV,
  93         },
  94 };
  95
  96 static struct fb_videomode __initdata lb104v03_modes[] = {
  97         {
  98                 .name           = "640x480 @ 50",
  99                 .refresh        = 50,
 100                 .xres           = 640,          .yres           = 480,
 101                 .pixclock       = KHZ2PICOS(25100),
 102
 103                 .left_margin    = 90,           .right_margin   = 70,
 104                 .upper_margin   = 30,           .lower_margin   = 15,
 105                 .hsync_len      = 12,           .vsync_len      = 2,
 106
 107                 .sync           = 0,
 108                 .vmode          = FB_VMODE_NONINTERLACED,
 109         },
 110 };
 111
 112 static struct fb_monspecs __initdata favr32_default_monspecs = {
 113         .manufacturer           = "LG",
 114         .monitor                = "LB104V03",
 115         .modedb                 = lb104v03_modes,
 116         .modedb_len             = ARRAY_SIZE(lb104v03_modes),
 117         .hfmin                  = 27273,
 118         .hfmax                  = 31111,
 119         .vfmin                  = 45,
 120         .vfmax                  = 60,
 121         .dclkmax                = 28000000,
 122 };
 123
 124 struct atmel_lcdfb_info __initdata favr32_lcdc_data = {
 125         .default_bpp            = 16,
 126         .default_dmacon         = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
 127         .default_lcdcon2        = (ATMEL_LCDC_DISTYPE_TFT
 128                                    | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
 129                                    | ATMEL_LCDC_MEMOR_BIG),
 130         .default_monspecs       = &favr32_default_monspecs,
 131         .guard_time             = 2,
 132 };
 133
 134 static struct gpio_led favr32_leds[] = {
 135         {
 136                 .name            = "green",
 137                 .gpio            = GPIO_PIN_PE(19),
 138                 .default_trigger = "heartbeat",
 139                 .active_low      = 1,
 140         },
 141         {
 142                 .name            = "red",
 143                 .gpio            = GPIO_PIN_PE(20),
 144                 .active_low      = 1,
 145         },
 146 };
 147
 148 static struct gpio_led_platform_data favr32_led_data = {
 149         .num_leds       = ARRAY_SIZE(favr32_leds),
 150         .leds           = favr32_leds,
 151 };
 152
 153 static struct platform_device favr32_led_dev = {
 154         .name           = "leds-gpio",
 155         .id             = 0,
 156         .dev            = {
 157                 .platform_data  = &favr32_led_data,
 158         },
 159 };
 160
 161 /*
 162  * The next two functions should go away as the boot loader is
 163  * supposed to initialize the macb address registers with a valid
 164  * ethernet address. But we need to keep it around for a while until
 165  * we can be reasonably sure the boot loader does this.
 166  *
 167  * The phy_id is ignored as the driver will probe for it.
 168  */
 169 static int __init parse_tag_ethernet(struct tag *tag)
 170 {
 171         int i;
 172
 173         i = tag->u.ethernet.mac_index;
 174         if (i < ARRAY_SIZE(hw_addr))
 175                 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
 176                        sizeof(hw_addr[i].addr));
 177
 178         return 0;
 179 }
 180 __tagtable(ATAG_ETHERNET, parse_tag_ethernet);
 181
 182 static void __init set_hw_addr(struct platform_device *pdev)
 183 {
 184         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 185         const u8 *addr;
 186         void __iomem *regs;
 187         struct clk *pclk;
 188
 189         if (!res)
 190                 return;
 191         if (pdev->id >= ARRAY_SIZE(hw_addr))
 192                 return;
 193
 194         addr = hw_addr[pdev->id].addr;
 195         if (!is_valid_ether_addr(addr))
 196                 return;
 197
 198         /*
 199          * Since this is board-specific code, we'll cheat and use the
 200          * physical address directly as we happen to know that it's
 201          * the same as the virtual address.
 202          */
 203         regs = (void __iomem __force *)res->start;
 204         pclk = clk_get(&pdev->dev, "pclk");
 205         if (!pclk)
 206                 return;
 207
 208         clk_enable(pclk);
 209         __raw_writel((addr[3] << 24) | (addr[2] << 16)
 210                      | (addr[1] << 8) | addr[0], regs + 0x98);
 211         __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
 212         clk_disable(pclk);
 213         clk_put(pclk);
 214 }
 215
 216 void __init favr32_setup_leds(void)
 217 {
 218         unsigned i;
 219
 220         for (i = 0; i < ARRAY_SIZE(favr32_leds); i++)
 221                 at32_select_gpio(favr32_leds[i].gpio, AT32_GPIOF_OUTPUT);
 222
 223         platform_device_register(&favr32_led_dev);
 224 }
 225
 226 static struct atmel_pwm_bl_platform_data atmel_pwm_bl_pdata = {
 227         .pwm_channel            = 2,
 228         .pwm_frequency          = 200000,
 229         .pwm_compare_max        = 345,
 230         .pwm_duty_max           = 345,
 231         .pwm_duty_min           = 90,
 232         .pwm_active_low         = 1,
 233         .gpio_on                = GPIO_PIN_PA(28),
 234         .on_active_low          = 0,
 235 };
 236
 237 static struct platform_device atmel_pwm_bl_dev = {
 238         .name           = "atmel-pwm-bl",
 239         .id             = 0,
 240         .dev            = {
 241                 .platform_data = &atmel_pwm_bl_pdata,
 242         },
 243 };
 244
 245 static void __init favr32_setup_atmel_pwm_bl(void)
 246 {
 247         platform_device_register(&atmel_pwm_bl_dev);
 248         at32_select_gpio(atmel_pwm_bl_pdata.gpio_on, 0);
 249 }
 250
 251 void __init setup_board(void)
 252 {
 253         at32_map_usart(3, 0, 0);        /* USART 3 => /dev/ttyS0 */
 254         at32_setup_serial_console(0);
 255 }
 256
 257 static int __init set_abdac_rate(struct platform_device *pdev)
 258 {
 259         int retval;
 260         struct clk *osc1;
 261         struct clk *pll1;
 262         struct clk *abdac;
 263
 264         if (pdev == NULL)
 265                 return -ENXIO;
 266
 267         osc1 = clk_get(NULL, "osc1");
 268         if (IS_ERR(osc1)) {
 269                 retval = PTR_ERR(osc1);
 270                 goto out;
 271         }
 272
 273         pll1 = clk_get(NULL, "pll1");
 274         if (IS_ERR(pll1)) {
 275                 retval = PTR_ERR(pll1);
 276                 goto out_osc1;
 277         }
 278
 279         abdac = clk_get(&pdev->dev, "sample_clk");
 280         if (IS_ERR(abdac)) {
 281                 retval = PTR_ERR(abdac);
 282                 goto out_pll1;
 283         }
 284
 285         retval = clk_set_parent(pll1, osc1);
 286         if (retval != 0)
 287                 goto out_abdac;
 288
 289         /*
 290          * Rate is 32000 to 50000 and ABDAC oversamples 256x. Multiply, in
 291          * power of 2, to a value above 80 MHz. Power of 2 so it is possible
 292          * for the generic clock to divide it down again and 80 MHz is the
 293          * lowest frequency for the PLL.
 294          */
 295         retval = clk_round_rate(pll1,
 296                         CONFIG_BOARD_FAVR32_ABDAC_RATE * 256 * 16);
 297         if (retval < 0)
 298                 goto out_abdac;
 299
 300         retval = clk_set_rate(pll1, retval);
 301         if (retval != 0)
 302                 goto out_abdac;
 303
 304         retval = clk_set_parent(abdac, pll1);
 305         if (retval != 0)
 306                 goto out_abdac;
 307
 308 out_abdac:
 309         clk_put(abdac);
 310 out_pll1:
 311         clk_put(pll1);
 312 out_osc1:
 313         clk_put(osc1);
 314 out:
 315         return retval;
 316 }
 317
 318 static int __init favr32_init(void)
 319 {
 320         /*
 321          * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific
 322          * pins so that nobody messes with them.
 323          */
 324         at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
 325
 326         at32_select_gpio(GPIO_PIN_PB(3), 0);    /* IRQ from ADS7843 */
 327
 328         at32_add_device_usart(0);
 329
 330         set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
 331
 332         spi1_board_info[0].irq = gpio_to_irq(GPIO_PIN_PB(3));
 333
 334         set_abdac_rate(at32_add_device_abdac(0, &abdac0_data));
 335
 336         at32_add_device_pwm(1 << atmel_pwm_bl_pdata.pwm_channel);
 337         at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
 338         at32_add_device_mci(0, &mci0_data);
 339         at32_add_device_usba(0, NULL);
 340         at32_add_device_lcdc(0, &favr32_lcdc_data, fbmem_start, fbmem_size, 0);
 341
 342         favr32_setup_leds();
 343
 344         favr32_setup_atmel_pwm_bl();
 345
 346         return 0;
 347 }
 348 postcore_initcall(favr32_init);