2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 Abstract: rt2x00 queue specific routines.
26 #include <linux/kernel.h>
27 #include <linux/module.h>
30 #include "rt2x00lib.h"
32 void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
33 struct txentry_desc *txdesc,
34 struct ieee80211_tx_control *control)
36 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
37 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
38 struct ieee80211_rate *rate =
39 ieee80211_get_tx_rate(rt2x00dev->hw, control);
40 const struct rt2x00_rate *hwrate;
41 unsigned int data_length;
42 unsigned int duration;
43 unsigned int residual;
46 memset(txdesc, 0, sizeof(*txdesc));
49 * Initialize information from queue
51 txdesc->queue = entry->queue->qid;
52 txdesc->cw_min = entry->queue->cw_min;
53 txdesc->cw_max = entry->queue->cw_max;
54 txdesc->aifs = entry->queue->aifs;
56 /* Data length should be extended with 4 bytes for CRC */
57 data_length = entry->skb->len + 4;
60 * Read required fields from ieee80211 header.
62 frame_control = le16_to_cpu(hdr->frame_control);
65 * Check whether this frame is to be acked.
67 if (!(control->flags & IEEE80211_TXCTL_NO_ACK))
68 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
71 * Check if this is a RTS/CTS frame
73 if (is_rts_frame(frame_control) || is_cts_frame(frame_control)) {
74 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
75 if (is_rts_frame(frame_control)) {
76 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
77 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
79 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
80 __clear_bit(ENTRY_TXD_ACK, &txdesc->flags);
82 if (control->rts_cts_rate_idx >= 0)
84 ieee80211_get_rts_cts_rate(rt2x00dev->hw, control);
88 * Determine retry information.
90 txdesc->retry_limit = control->retry_limit;
91 if (control->flags & IEEE80211_TXCTL_LONG_RETRY_LIMIT)
92 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
95 * Check if more fragments are pending
97 if (ieee80211_get_morefrag(hdr)) {
98 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
99 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
103 * Beacons and probe responses require the tsf timestamp
104 * to be inserted into the frame.
106 if (txdesc->queue == QID_BEACON || is_probe_resp(frame_control))
107 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
110 * Determine with what IFS priority this frame should be send.
111 * Set ifs to IFS_SIFS when the this is not the first fragment,
112 * or this fragment came after RTS/CTS.
114 if (test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
115 txdesc->ifs = IFS_SIFS;
116 } else if (control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT) {
117 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
118 txdesc->ifs = IFS_BACKOFF;
120 txdesc->ifs = IFS_SIFS;
125 * Length calculation depends on OFDM/CCK rate.
127 hwrate = rt2x00_get_rate(rate->hw_value);
128 txdesc->signal = hwrate->plcp;
129 txdesc->service = 0x04;
131 if (hwrate->flags & DEV_RATE_OFDM) {
132 __set_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags);
134 txdesc->length_high = (data_length >> 6) & 0x3f;
135 txdesc->length_low = data_length & 0x3f;
138 * Convert length to microseconds.
140 residual = get_duration_res(data_length, hwrate->bitrate);
141 duration = get_duration(data_length, hwrate->bitrate);
147 * Check if we need to set the Length Extension
149 if (hwrate->bitrate == 110 && residual <= 30)
150 txdesc->service |= 0x80;
153 txdesc->length_high = (duration >> 8) & 0xff;
154 txdesc->length_low = duration & 0xff;
157 * When preamble is enabled we should set the
158 * preamble bit for the signal.
160 if (rt2x00_get_rate_preamble(rate->hw_value))
161 txdesc->signal |= 0x08;
164 EXPORT_SYMBOL_GPL(rt2x00queue_create_tx_descriptor);
166 void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
167 struct txentry_desc *txdesc)
169 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
170 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
172 rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
175 * All processing on the frame has been completed, this means
176 * it is now ready to be dumped to userspace through debugfs.
178 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
181 * We are done writing the frame to the queue entry,
182 * if this entry is a RTS of CTS-to-self frame we are done,
183 * otherwise we need to kick the queue.
185 if (rt2x00dev->ops->lib->kick_tx_queue &&
186 !(skbdesc->flags & FRAME_DESC_DRIVER_GENERATED))
187 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev,
190 EXPORT_SYMBOL_GPL(rt2x00queue_write_tx_descriptor);
192 struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
193 const enum data_queue_qid queue)
195 int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
197 if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
198 return &rt2x00dev->tx[queue];
203 if (queue == QID_BEACON)
204 return &rt2x00dev->bcn[0];
205 else if (queue == QID_ATIM && atim)
206 return &rt2x00dev->bcn[1];
210 EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
212 struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
213 enum queue_index index)
215 struct queue_entry *entry;
216 unsigned long irqflags;
218 if (unlikely(index >= Q_INDEX_MAX)) {
219 ERROR(queue->rt2x00dev,
220 "Entry requested from invalid index type (%d)\n", index);
224 spin_lock_irqsave(&queue->lock, irqflags);
226 entry = &queue->entries[queue->index[index]];
228 spin_unlock_irqrestore(&queue->lock, irqflags);
232 EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
234 void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
236 unsigned long irqflags;
238 if (unlikely(index >= Q_INDEX_MAX)) {
239 ERROR(queue->rt2x00dev,
240 "Index change on invalid index type (%d)\n", index);
244 spin_lock_irqsave(&queue->lock, irqflags);
246 queue->index[index]++;
247 if (queue->index[index] >= queue->limit)
248 queue->index[index] = 0;
250 if (index == Q_INDEX) {
252 } else if (index == Q_INDEX_DONE) {
257 spin_unlock_irqrestore(&queue->lock, irqflags);
259 EXPORT_SYMBOL_GPL(rt2x00queue_index_inc);
261 static void rt2x00queue_reset(struct data_queue *queue)
263 unsigned long irqflags;
265 spin_lock_irqsave(&queue->lock, irqflags);
269 memset(queue->index, 0, sizeof(queue->index));
271 spin_unlock_irqrestore(&queue->lock, irqflags);
274 void rt2x00queue_init_rx(struct rt2x00_dev *rt2x00dev)
276 struct data_queue *queue = rt2x00dev->rx;
279 rt2x00queue_reset(queue);
281 if (!rt2x00dev->ops->lib->init_rxentry)
284 for (i = 0; i < queue->limit; i++)
285 rt2x00dev->ops->lib->init_rxentry(rt2x00dev,
289 void rt2x00queue_init_tx(struct rt2x00_dev *rt2x00dev)
291 struct data_queue *queue;
294 txall_queue_for_each(rt2x00dev, queue) {
295 rt2x00queue_reset(queue);
297 if (!rt2x00dev->ops->lib->init_txentry)
300 for (i = 0; i < queue->limit; i++)
301 rt2x00dev->ops->lib->init_txentry(rt2x00dev,
306 static int rt2x00queue_alloc_entries(struct data_queue *queue,
307 const struct data_queue_desc *qdesc)
309 struct queue_entry *entries;
310 unsigned int entry_size;
313 rt2x00queue_reset(queue);
315 queue->limit = qdesc->entry_num;
316 queue->data_size = qdesc->data_size;
317 queue->desc_size = qdesc->desc_size;
320 * Allocate all queue entries.
322 entry_size = sizeof(*entries) + qdesc->priv_size;
323 entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
327 #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
328 ( ((char *)(__base)) + ((__limit) * (__esize)) + \
329 ((__index) * (__psize)) )
331 for (i = 0; i < queue->limit; i++) {
332 entries[i].flags = 0;
333 entries[i].queue = queue;
334 entries[i].skb = NULL;
335 entries[i].entry_idx = i;
336 entries[i].priv_data =
337 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
338 sizeof(*entries), qdesc->priv_size);
341 #undef QUEUE_ENTRY_PRIV_OFFSET
343 queue->entries = entries;
348 int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
350 struct data_queue *queue;
354 status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
358 tx_queue_for_each(rt2x00dev, queue) {
359 status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
364 status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
368 if (!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags))
371 status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
372 rt2x00dev->ops->atim);
379 ERROR(rt2x00dev, "Queue entries allocation failed.\n");
381 rt2x00queue_uninitialize(rt2x00dev);
386 void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
388 struct data_queue *queue;
390 queue_for_each(rt2x00dev, queue) {
391 kfree(queue->entries);
392 queue->entries = NULL;
396 static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
397 struct data_queue *queue, enum data_queue_qid qid)
399 spin_lock_init(&queue->lock);
401 queue->rt2x00dev = rt2x00dev;
408 int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
410 struct data_queue *queue;
411 enum data_queue_qid qid;
412 unsigned int req_atim =
413 !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
416 * We need the following queues:
420 * Atim: 1 (if required)
422 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
424 queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
426 ERROR(rt2x00dev, "Queue allocation failed.\n");
431 * Initialize pointers
433 rt2x00dev->rx = queue;
434 rt2x00dev->tx = &queue[1];
435 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
438 * Initialize queue parameters.
440 * TX: qid = QID_AC_BE + index
441 * TX: cw_min: 2^5 = 32.
442 * TX: cw_max: 2^10 = 1024.
443 * BCN & Atim: qid = QID_MGMT
445 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
448 tx_queue_for_each(rt2x00dev, queue)
449 rt2x00queue_init(rt2x00dev, queue, qid++);
451 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_MGMT);
453 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_MGMT);
458 void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
460 kfree(rt2x00dev->rx);
461 rt2x00dev->rx = NULL;
462 rt2x00dev->tx = NULL;
463 rt2x00dev->bcn = NULL;