3 ** head.S -- This file contains the initial boot code for the
6 ** Copyright 1993 by Hamish Macdonald
8 ** 68040 fixes by Michael Rausch
9 ** 68060 fixes by Roman Hodek
10 ** MMU cleanup by Randy Thelen
11 ** Final MMU cleanup by Roman Zippel
13 ** Atari support by Andreas Schwab, using ideas of Robert de Vries
15 ** VME Support by Richard Hirst
17 ** 94/11/14 Andreas Schwab: put kernel at PAGESIZE
18 ** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
19 ** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
20 ** 95/11/18 Richard Hirst: Added MVME166 support
21 ** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
22 ** Magnum- and FX-alternate ram
23 ** 98/04/25 Phil Blundell: added HP300 support
24 ** 1998/08/30 David Kilzer: Added support for font_desc structures
26 ** 9/02/11 Richard Zidlicky: added Q40 support (initial vesion 99/01/01)
27 ** 2004/05/13 Kars de Jong: Finalised HP300 support
29 ** This file is subject to the terms and conditions of the GNU General Public
30 ** License. See the file README.legal in the main directory of this archive
38 * At this point, the boot loader has:
41 * Put us in supervisor state.
43 * The kernel setup code takes the following steps:
44 * . Raise interrupt level
45 * . Set up initial kernel memory mapping.
46 * . This sets up a mapping of the 4M of memory the kernel is located in.
47 * . It also does a mapping of any initial machine specific areas.
49 * . Enable cache memories
50 * . Jump to kernel startup
52 * Much of the file restructuring was to accomplish:
53 * 1) Remove register dependency through-out the file.
54 * 2) Increase use of subroutines to perform functions
55 * 3) Increase readability of the code
57 * Of course, readability is a subjective issue, so it will never be
58 * argued that that goal was accomplished. It was merely a goal.
59 * A key way to help make code more readable is to give good
60 * documentation. So, the first thing you will find is exaustive
61 * write-ups on the structure of the file, and the features of the
62 * functional subroutines.
66 * Without a doubt the single largest chunk of head.S is spent
67 * mapping the kernel and I/O physical space into the logical range
69 * There are new subroutines and data structures to make MMU
70 * support cleaner and easier to understand.
71 * First, you will find a routine call "mmu_map" which maps
72 * a logical to a physical region for some length given a cache
73 * type on behalf of the caller. This routine makes writing the
74 * actual per-machine specific code very simple.
75 * A central part of the code, but not a subroutine in itself,
76 * is the mmu_init code which is broken down into mapping the kernel
77 * (the same for all machines) and mapping machine-specific I/O
79 * Also, there will be a description of engaging the MMU and
81 * You will notice that there is a chunk of code which
82 * can emit the entire MMU mapping of the machine. This is present
83 * only in debug modes and can be very helpful.
84 * Further, there is a new console driver in head.S that is
85 * also only engaged in debug mode. Currently, it's only supported
86 * on the Macintosh class of machines. However, it is hoped that
87 * others will plug-in support for specific machines.
89 * ######################################################################
93 * mmu_map was written for two key reasons. First, it was clear
94 * that it was very difficult to read the previous code for mapping
95 * regions of memory. Second, the Macintosh required such extensive
96 * memory allocations that it didn't make sense to propagate the
97 * existing code any further.
98 * mmu_map requires some parameters:
100 * mmu_map (logical, physical, length, cache_type)
102 * While this essentially describes the function in the abstract, you'll
103 * find more indepth description of other parameters at the implementation site.
105 * mmu_get_root_table_entry
106 * ------------------------
107 * mmu_get_ptr_table_entry
108 * -----------------------
109 * mmu_get_page_table_entry
110 * ------------------------
112 * These routines are used by other mmu routines to get a pointer into
113 * a table, if necessary a new table is allocated. These routines are working
114 * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root
115 * table needs of course only to be allocated once in mmu_get_root_table_entry,
116 * so that here also some mmu specific initialization is done. The second page
117 * at the start of the kernel (the first page is unmapped later) is used for
118 * the kernel_pg_dir. It must be at a position known at link time (as it's used
119 * to initialize the init task struct) and since it needs special cache
120 * settings, it's the easiest to use this page, the rest of the page is used
121 * for further pointer tables.
122 * mmu_get_page_table_entry allocates always a whole page for page tables, this
123 * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense
124 * to manage page tables in smaller pieces as nearly all mappings have that
127 * ######################################################################
130 * ######################################################################
134 * Thanks to a small helping routine enabling the mmu got quite simple
135 * and there is only one way left. mmu_engage makes a complete a new mapping
136 * that only includes the absolute necessary to be able to jump to the final
137 * postion and to restore the original mapping.
138 * As this code doesn't need a transparent translation register anymore this
139 * means all registers are free to be used by machines that needs them for
142 * ######################################################################
146 * This algorithm will print out the page tables of the system as
147 * appropriate for an 030 or an 040. This is useful for debugging purposes
148 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses.
150 * ######################################################################
154 * The console is also able to be turned off. The console in head.S
155 * is specifically for debugging and can be very useful. It is surrounded by
156 * #ifdef CONSOLE/#endif clauses so it doesn't have to ship in known-good
157 * kernels. It's basic algorithm is to determine the size of the screen
158 * (in height/width and bit depth) and then use that information for
159 * displaying an 8x8 font or an 8x16 (widthxheight). I prefer the 8x8 for
160 * debugging so I can see more good data. But it was trivial to add support
161 * for both fonts, so I included it.
162 * Also, the algorithm for plotting pixels is abstracted so that in
163 * theory other platforms could add support for different kinds of frame
164 * buffers. This could be very useful.
166 * console_put_penguin
167 * -------------------
168 * An important part of any Linux bring up is the penguin and there's
169 * nothing like getting the Penguin on the screen! This algorithm will work
170 * on any machine for which there is a console_plot_pixel.
174 * My hope is that the scroll algorithm does the right thing on the
175 * various platforms, but it wouldn't be hard to add the test conditions
176 * and new code if it doesn't.
181 * ######################################################################
183 * Register usage has greatly simplified within head.S. Every subroutine
184 * saves and restores all registers that it modifies (except it returns a
185 * value in there of course). So the only register that needs to be initialized
186 * is the stack pointer.
187 * All other init code and data is now placed in the init section, so it will
188 * be automatically freed at the end of the kernel initialization.
190 * ######################################################################
194 * There are many options available in a build of this file. I've
195 * taken the time to describe them here to save you the time of searching
196 * for them and trying to understand what they mean.
198 * CONFIG_xxx: These are the obvious machine configuration defines created
199 * during configuration. These are defined in include/linux/autoconf.h.
201 * CONSOLE: There is support for head.S console in this file. This
202 * console can talk to a Mac frame buffer, but could easily be extrapolated
203 * to extend it to support other platforms.
205 * TEST_MMU: This is a test harness for running on any given machine but
206 * getting an MMU dump for another class of machine. The classes of machines
207 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.)
208 * and any of the models (030, 040, 060, etc.).
210 * NOTE: TEST_MMU is NOT permanent! It is scheduled to be removed
211 * When head.S boots on Atari, Amiga, Macintosh, and VME
212 * machines. At that point the underlying logic will be
213 * believed to be solid enough to be trusted, and TEST_MMU
214 * can be dropped. Do note that that will clean up the
215 * head.S code significantly as large blocks of #if/#else
216 * clauses can be removed.
218 * MMU_NOCACHE_KERNEL: On the Macintosh platform there was an inquiry into
219 * determing why devices don't appear to work. A test case was to remove
220 * the cacheability of the kernel bits.
222 * MMU_PRINT: There is a routine built into head.S that can display the
223 * MMU data structures. It outputs its result through the serial_putc
224 * interface. So where ever that winds up driving data, that's where the
225 * mmu struct will appear. On the Macintosh that's typically the console.
227 * SERIAL_DEBUG: There are a series of putc() macro statements
228 * scattered through out the code to give progress of status to the
229 * person sitting at the console. This constant determines whether those
232 * DEBUG: This is the standard DEBUG flag that can be set for building
233 * the kernel. It has the effect adding additional tests into
239 * In theory these could be determined at run time or handed
240 * over by the booter. But, let's be real, it's a fine hard
241 * coded value. (But, you will notice the code is run-time
242 * flexible!) A pointer to the font's struct font_desc
243 * is kept locally in Lconsole_font. It is used to determine
244 * font size information dynamically.
247 * USE_PRINTER: Use the printer port for serial debug.
248 * USE_SCC_B: Use the SCC port A (Serial2) for serial debug.
249 * USE_SCC_A: Use the SCC port B (Modem2) for serial debug.
250 * USE_MFP: Use the ST-MFP port (Modem1) for serial debug.
252 * Macintosh constants:
253 * MAC_SERIAL_DEBUG: Turns on serial debug output for the Macintosh.
254 * MAC_USE_SCC_A: Use the SCC port A (modem) for serial debug.
255 * MAC_USE_SCC_B: Use the SCC port B (printer) for serial debug (default).
258 #include <linux/config.h>
259 #include <linux/linkage.h>
260 #include <linux/init.h>
261 #include <asm/bootinfo.h>
262 #include <asm/setup.h>
263 #include <asm/entry.h>
264 #include <asm/pgtable.h>
265 #include <asm/page.h>
266 #include <asm/asm-offsets.h>
270 #include <asm/machw.h>
273 * Macintosh console support
276 #ifdef CONFIG_FRAMEBUFFER_CONSOLE
278 #define CONSOLE_PENGUIN
282 * Macintosh serial debug support; outputs boot info to the printer
283 * and/or modem serial ports
285 #undef MAC_SERIAL_DEBUG
288 * Macintosh serial debug port selection; define one or both;
289 * requires MAC_SERIAL_DEBUG to be defined
291 #define MAC_USE_SCC_A /* Macintosh modem serial port */
292 #define MAC_USE_SCC_B /* Macintosh printer serial port */
294 #endif /* CONFIG_MAC */
297 #undef MMU_NOCACHE_KERNEL
302 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8.
303 * The 8x8 font is harder to read but fits more on the screen.
305 #define FONT_8x8 /* default */
306 /* #define FONT_8x16 */ /* 2nd choice */
307 /* #define FONT_6x11 */ /* 3rd choice */
311 .globl m68k_pgtable_cachemode
312 .globl m68k_supervisor_cachemode
313 #ifdef CONFIG_MVME16x
320 CPUTYPE_040 = 1 /* indicates an 040 */
321 CPUTYPE_060 = 2 /* indicates an 060 */
322 CPUTYPE_0460 = 3 /* if either above are set, this is set */
323 CPUTYPE_020 = 4 /* indicates an 020 */
325 /* Translation control register */
330 /* Transparent translation registers */
331 TTR_ENABLE = 0x8000 /* enable transparent translation */
332 TTR_ANYMODE = 0x4000 /* user and kernel mode access */
333 TTR_KERNELMODE = 0x2000 /* only kernel mode access */
334 TTR_USERMODE = 0x0000 /* only user mode access */
335 TTR_CI = 0x0400 /* inhibit cache */
336 TTR_RW = 0x0200 /* read/write mode */
337 TTR_RWM = 0x0100 /* read/write mask */
338 TTR_FCB2 = 0x0040 /* function code base bit 2 */
339 TTR_FCB1 = 0x0020 /* function code base bit 1 */
340 TTR_FCB0 = 0x0010 /* function code base bit 0 */
341 TTR_FCM2 = 0x0004 /* function code mask bit 2 */
342 TTR_FCM1 = 0x0002 /* function code mask bit 1 */
343 TTR_FCM0 = 0x0001 /* function code mask bit 0 */
345 /* Cache Control registers */
346 CC6_ENABLE_D = 0x80000000 /* enable data cache (680[46]0) */
347 CC6_FREEZE_D = 0x40000000 /* freeze data cache (68060) */
348 CC6_ENABLE_SB = 0x20000000 /* enable store buffer (68060) */
349 CC6_PUSH_DPI = 0x10000000 /* disable CPUSH invalidation (68060) */
350 CC6_HALF_D = 0x08000000 /* half-cache mode for data cache (68060) */
351 CC6_ENABLE_B = 0x00800000 /* enable branch cache (68060) */
352 CC6_CLRA_B = 0x00400000 /* clear all entries in branch cache (68060) */
353 CC6_CLRU_B = 0x00200000 /* clear user entries in branch cache (68060) */
354 CC6_ENABLE_I = 0x00008000 /* enable instruction cache (680[46]0) */
355 CC6_FREEZE_I = 0x00004000 /* freeze instruction cache (68060) */
356 CC6_HALF_I = 0x00002000 /* half-cache mode for instruction cache (68060) */
357 CC3_ALLOC_WRITE = 0x00002000 /* write allocate mode(68030) */
358 CC3_ENABLE_DB = 0x00001000 /* enable data burst (68030) */
359 CC3_CLR_D = 0x00000800 /* clear data cache (68030) */
360 CC3_CLRE_D = 0x00000400 /* clear entry in data cache (68030) */
361 CC3_FREEZE_D = 0x00000200 /* freeze data cache (68030) */
362 CC3_ENABLE_D = 0x00000100 /* enable data cache (68030) */
363 CC3_ENABLE_IB = 0x00000010 /* enable instruction burst (68030) */
364 CC3_CLR_I = 0x00000008 /* clear instruction cache (68030) */
365 CC3_CLRE_I = 0x00000004 /* clear entry in instruction cache (68030) */
366 CC3_FREEZE_I = 0x00000002 /* freeze instruction cache (68030) */
367 CC3_ENABLE_I = 0x00000001 /* enable instruction cache (68030) */
369 /* Miscellaneous definitions */
373 ROOT_TABLE_SIZE = 128
376 ROOT_INDEX_SHIFT = 25
378 PAGE_INDEX_SHIFT = 12
381 /* When debugging use readable names for labels */
383 #define L(name) .head.S.##name
385 #define L(name) .head.S./**/name
389 #define L(name) .L##name
391 #define L(name) .L/**/name
395 /* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
397 #define __INITDATA .data
398 #define __FINIT .previous
401 /* Several macros to make the writing of subroutines easier:
402 * - func_start marks the beginning of the routine which setups the frame
403 * register and saves the registers, it also defines another macro
404 * to automatically restore the registers again.
405 * - func_return marks the end of the routine and simply calls the prepared
406 * macro to restore registers and jump back to the caller.
407 * - func_define generates another macro to automatically put arguments
408 * onto the stack call the subroutine and cleanup the stack again.
411 /* Within subroutines these macros can be used to access the arguments
412 * on the stack. With STACK some allocated memory on the stack can be
413 * accessed and ARG0 points to the return address (used by mmu_engage).
415 #define STACK %a6@(stackstart)
418 #define ARG2 %a6@(12)
419 #define ARG3 %a6@(16)
420 #define ARG4 %a6@(20)
422 .macro func_start name,saveregs,stack=0
425 moveml \saveregs,%sp@-
426 .set stackstart,-\stack
428 .macro func_return_\name
429 moveml %sp@+,\saveregs
435 .macro func_return name
439 .macro func_call name
443 .macro move_stack nr,arg1,arg2,arg3,arg4
445 move_stack "(\nr-1)",\arg2,\arg3,\arg4
450 .macro func_define name,nr=0
451 .macro \name arg1,arg2,arg3,arg4
452 move_stack \nr,\arg1,\arg2,\arg3,\arg4
460 func_define mmu_map,4
461 func_define mmu_map_tt,4
462 func_define mmu_fixup_page_mmu_cache,1
463 func_define mmu_temp_map,2
464 func_define mmu_engage
465 func_define mmu_get_root_table_entry,1
466 func_define mmu_get_ptr_table_entry,2
467 func_define mmu_get_page_table_entry,2
468 func_define mmu_print
469 func_define get_new_page
470 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
474 .macro mmu_map_eq arg1,arg2,arg3
475 mmu_map \arg1,\arg1,\arg2,\arg3
478 .macro get_bi_record record
480 func_call get_bi_record
484 func_define serial_putc,1
485 func_define console_putc,1
487 func_define console_init
488 func_define console_put_stats
489 func_define console_put_penguin
490 func_define console_plot_pixel,3
491 func_define console_scroll
494 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
498 func_call console_putc
501 func_call serial_putc
503 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
523 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
540 #define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
541 #define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
542 #define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
543 #define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab
544 #define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
545 #define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
546 #define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab
547 #define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab
548 #define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab
549 #define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
550 #define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
551 #define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
552 #define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab
554 #define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
556 cmpl &MACH_APOLLO,%pc@(m68k_machtype); \
560 #define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab
561 #define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab
562 #define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab
563 #define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab
564 #define is_not_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab
565 #define is_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab
566 #define is_not_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab
568 /* On the HP300 we use the on-board LEDs for debug output before
569 the console is running. Writing a 1 bit turns the corresponding LED
570 _off_ - on the 340 bit 7 is towards the back panel of the machine. */
572 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
584 * Version numbers of the bootinfo interface
585 * The area from _stext to _start will later be used as kernel pointer table
587 bras 1f /* Jump over bootinfo version numbers */
589 .long BOOTINFOV_MAGIC
590 .long MACH_AMIGA, AMIGA_BOOTI_VERSION
591 .long MACH_ATARI, ATARI_BOOTI_VERSION
592 .long MACH_MVME147, MVME147_BOOTI_VERSION
593 .long MACH_MVME16x, MVME16x_BOOTI_VERSION
594 .long MACH_BVME6000, BVME6000_BOOTI_VERSION
595 .long MACH_MAC, MAC_BOOTI_VERSION
596 .long MACH_Q40, Q40_BOOTI_VERSION
597 .long MACH_HP300, HP300_BOOTI_VERSION
601 .equ kernel_pg_dir,_stext
603 .equ .,_stext+PAGESIZE
610 * Setup initial stack pointer
615 * Record the CPU and machine type.
617 get_bi_record BI_MACHTYPE
618 lea %pc@(m68k_machtype),%a1
621 get_bi_record BI_FPUTYPE
622 lea %pc@(m68k_fputype),%a1
625 get_bi_record BI_MMUTYPE
626 lea %pc@(m68k_mmutype),%a1
629 get_bi_record BI_CPUTYPE
630 lea %pc@(m68k_cputype),%a1
637 * For Macintosh, we need to determine the display parameters early (at least
638 * while debugging it).
641 is_not_mac(L(test_notmac))
643 get_bi_record BI_MAC_VADDR
644 lea %pc@(L(mac_videobase)),%a1
647 get_bi_record BI_MAC_VDEPTH
648 lea %pc@(L(mac_videodepth)),%a1
651 get_bi_record BI_MAC_VDIM
652 lea %pc@(L(mac_dimensions)),%a1
655 get_bi_record BI_MAC_VROW
656 lea %pc@(L(mac_rowbytes)),%a1
659 #ifdef MAC_SERIAL_DEBUG
660 get_bi_record BI_MAC_SCCBASE
661 lea %pc@(L(mac_sccbase)),%a1
663 #endif /* MAC_SERIAL_DEBUG */
669 lea %pc@(L(mac_videobase)),%a0
671 lea %pc@(L(mac_dimensions)),%a0
673 swap %d1 /* #rows is high bytes */
674 andl #0xFFFF,%d1 /* rows */
676 lea %pc@(L(mac_rowbytes)),%a0
687 #endif /* CONFIG_MAC */
691 * There are ultimately two pieces of information we want for all kinds of
692 * processors CpuType and CacheBits. The CPUTYPE was passed in from booter
693 * and is converted here from a booter type definition to a separate bit
694 * number which allows for the standard is_0x0 macro tests.
696 movel %pc@(m68k_cputype),%d0
703 * Test the BootInfo cputype for 060
707 bset #CPUTYPE_060,%d1
708 bset #CPUTYPE_0460,%d1
712 * Test the BootInfo cputype for 040
716 bset #CPUTYPE_040,%d1
717 bset #CPUTYPE_0460,%d1
721 * Test the BootInfo cputype for 020
725 bset #CPUTYPE_020,%d1
729 * Record the cpu type
731 lea %pc@(L(cputype)),%a0
737 * Now the macros are valid:
746 * Determine the cache mode for pages holding MMU tables
747 * and for supervisor mode, unused for '020 and '030
752 is_not_040_or_060(L(save_cachetype))
756 * d1 := cacheable write-through
757 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables,
758 * but we have been using write-through since at least 2.0.29 so I
761 #ifdef CONFIG_060_WRITETHROUGH
763 * If this is a 68060 board using drivers with cache coherency
764 * problems, then supervisor memory accesses need to be write-through
765 * also; otherwise, we want copyback.
769 movel #_PAGE_CACHE040W,%d0
770 jra L(save_cachetype)
771 #endif /* CONFIG_060_WRITETHROUGH */
773 movew #_PAGE_CACHE040,%d0
775 movel #_PAGE_CACHE040W,%d1
778 /* Save cache mode for supervisor mode and page tables
780 lea %pc@(m68k_supervisor_cachemode),%a0
782 lea %pc@(m68k_pgtable_cachemode),%a0
786 * raise interrupt level
791 If running on an Atari, determine the I/O base of the
792 serial port and test if we are running on a Medusa or Hades.
793 This test is necessary here, because on the Hades the serial
794 port is only accessible in the high I/O memory area.
796 The test whether it is a Medusa is done by writing to the byte at
797 phys. 0x0. This should result in a bus error on all other machines.
799 ...should, but doesn't. The Afterburner040 for the Falcon has the
800 same behaviour (0x0..0x7 are no ROM shadow). So we have to do
801 another test to distinguish Medusa and AB040. This is a
802 read attempt for 0x00ff82fe phys. that should bus error on a Falcon
803 (+AB040), but is in the range where the Medusa always asserts DTACK.
805 The test for the Hades is done by reading address 0xb0000000. This
806 should give a bus error on the Medusa.
810 is_not_atari(L(notypetest))
812 /* get special machine type (Medusa/Hades/AB40) */
813 moveq #0,%d3 /* default if tag doesn't exist */
814 get_bi_record BI_ATARI_MCH_TYPE
818 lea %pc@(atari_mch_type),%a0
821 /* On the Hades, the iobase must be set up before opening the
822 * serial port. There are no I/O regs at 0x00ffxxxx at all. */
824 cmpl #ATARI_MACH_HADES,%d3
826 movel #0xff000000,%d0 /* Hades I/O base addr: 0xff000000 */
827 1: lea %pc@(L(iobase)),%a0
834 is_mvme147(L(getvmetype))
835 is_bvme6000(L(getvmetype))
836 is_not_mvme16x(L(gvtdone))
838 /* See if the loader has specified the BI_VME_TYPE tag. Recent
839 * versions of VMELILO and TFTPLILO do this. We have to do this
840 * early so we know how to handle console output. If the tag
841 * doesn't exist then we use the Bug for output on MVME16x.
844 get_bi_record BI_VME_TYPE
848 lea %pc@(vme_brdtype),%a0
851 #ifdef CONFIG_MVME16x
852 is_not_mvme16x(L(gvtdone))
854 /* Need to get the BRD_ID info to differentiate between 162, 167,
855 * etc. This is available as a BI_VME_BRDINFO tag with later
856 * versions of VMELILO and TFTPLILO, otherwise we call the Bug.
858 get_bi_record BI_VME_BRDINFO
862 /* Get pointer to board ID data from Bug */
865 .word 0x70 /* trap 0x70 - .BRD_ID */
868 lea %pc@(mvme_bdid),%a1
869 /* Structure is 32 bytes long */
885 is_not_hp300(L(nothp))
887 /* Get the address of the UART for serial debugging */
888 get_bi_record BI_HP300_UART_ADDR
892 lea %pc@(L(uartbase)),%a0
894 get_bi_record BI_HP300_UART_SCODE
898 lea %pc@(L(uart_scode)),%a0
905 * Initialize serial port
916 #ifdef CONSOLE_PENGUIN
918 #endif /* CONSOLE_PENGUIN */
922 #endif /* CONFIG_MAC */
928 dputn %pc@(L(cputype))
929 dputn %pc@(m68k_supervisor_cachemode)
930 dputn %pc@(m68k_pgtable_cachemode)
934 * Save physical start address of kernel
936 lea %pc@(L(phys_kernel_start)),%a0
939 addl #PAGE_OFFSET,%a1
949 * This block of code does what's necessary to map in the various kinds
950 * of machines for execution of Linux.
951 * First map the first 4 MB of kernel code & data
954 mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),#4*1024*1024,\
955 %pc@(m68k_supervisor_cachemode)
963 is_not_amiga(L(mmu_init_not_amiga))
970 is_not_040_or_060(1f)
973 * 040: Map the 16Meg range physical 0x0 upto logical 0x8000.0000
975 mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S
977 * Map the Zorro III I/O space with transparent translation
978 * for frame buffer memory etc.
980 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S
982 jbra L(mmu_init_done)
986 * 030: Map the 32Meg range physical 0x0 upto logical 0x8000.0000
988 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
989 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030
991 jbra L(mmu_init_done)
993 L(mmu_init_not_amiga):
1000 is_not_atari(L(mmu_init_not_atari))
1004 /* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping
1005 the last 16 MB of virtual address space to the first 16 MB (i.e.
1006 0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is
1007 needed. I/O ranges are marked non-cachable.
1009 For the Medusa it is better to map the I/O region transparently
1010 (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are
1011 accessible only in the high area.
1013 On the Hades all I/O registers are only accessible in the high
1017 /* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
1019 movel %pc@(atari_mch_type),%d3
1020 cmpl #ATARI_MACH_MEDUSA,%d3
1022 cmpl #ATARI_MACH_HADES,%d3
1024 2: movel #0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */
1027 is_040_or_060(L(spata68040))
1029 /* Map everything non-cacheable, though not all parts really
1030 * need to disable caches (crucial only for 0xff8000..0xffffff
1031 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder
1032 * isn't really used, except for sometimes peeking into the
1033 * ROMs (mirror at phys. 0x0), so caching isn't necessary for
1035 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030
1037 jbra L(mmu_init_done)
1041 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S
1043 jbra L(mmu_init_done)
1045 L(mmu_init_not_atari):
1049 is_not_q40(L(notq40))
1051 * add transparent mapping for 0xff00 0000 - 0xffff ffff
1052 * non-cached serialized etc..
1053 * this includes master chip, DAC, RTC and ISA ports
1054 * 0xfe000000-0xfeffffff is for screen and ROM
1059 mmu_map_tt #0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W
1060 mmu_map_tt #1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S
1062 jbra L(mmu_init_done)
1068 is_not_hp300(L(nothp300))
1070 /* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx)
1071 * by mapping 32MB (on 020/030) or 16 MB (on 040) from 0xf0xxxxxx -> 0x00xxxxxx).
1072 * The ROM mapping is needed because the LEDs are mapped there too.
1078 * 030: Map the 32Meg range physical 0x0 upto logical 0xf000.0000
1080 mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030
1082 jbra L(mmu_init_done)
1086 * 040: Map the 16Meg range physical 0x0 upto logical 0xf000.0000
1088 mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S
1090 jbra L(mmu_init_done)
1093 #endif /* CONFIG_HP300 */
1095 #ifdef CONFIG_MVME147
1097 is_not_mvme147(L(not147))
1100 * On MVME147 we have already created kernel page tables for
1101 * 4MB of RAM at address 0, so now need to do a transparent
1102 * mapping of the top of memory space. Make it 0.5GByte for now,
1103 * so we can access on-board i/o areas.
1106 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030
1108 jbra L(mmu_init_done)
1111 #endif /* CONFIG_MVME147 */
1113 #ifdef CONFIG_MVME16x
1115 is_not_mvme16x(L(not16x))
1118 * On MVME16x we have already created kernel page tables for
1119 * 4MB of RAM at address 0, so now need to do a transparent
1120 * mapping of the top of memory space. Make it 0.5GByte for now.
1121 * Supervisor only access, so transparent mapping doesn't
1122 * clash with User code virtual address space.
1123 * this covers IO devices, PROM and SRAM. The PROM and SRAM
1124 * mapping is needed to allow 167Bug to run.
1125 * IO is in the range 0xfff00000 to 0xfffeffff.
1126 * PROM is 0xff800000->0xffbfffff and SRAM is
1127 * 0xffe00000->0xffe1ffff.
1130 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1132 jbra L(mmu_init_done)
1135 #endif /* CONFIG_MVME162 | CONFIG_MVME167 */
1137 #ifdef CONFIG_BVME6000
1139 is_not_bvme6000(L(not6000))
1142 * On BVME6000 we have already created kernel page tables for
1143 * 4MB of RAM at address 0, so now need to do a transparent
1144 * mapping of the top of memory space. Make it 0.5GByte for now,
1145 * so we can access on-board i/o areas.
1146 * Supervisor only access, so transparent mapping doesn't
1147 * clash with User code virtual address space.
1150 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1152 jbra L(mmu_init_done)
1155 #endif /* CONFIG_BVME6000 */
1160 * The Macintosh mappings are less clear.
1162 * Even as of this writing, it is unclear how the
1163 * Macintosh mappings will be done. However, as
1164 * the first author of this code I'm proposing the
1167 * Map the kernel (that's already done),
1168 * Map the I/O (on most machines that's the
1169 * 0x5000.0000 ... 0x5300.0000 range,
1170 * Map the video frame buffer using as few pages
1171 * as absolutely (this requirement mostly stems from
1172 * the fact that when the frame buffer is at
1173 * 0x0000.0000 then we know there is valid RAM just
1174 * above the screen that we don't want to waste!).
1176 * By the way, if the frame buffer is at 0x0000.0000
1177 * then the Macintosh is known as an RBV based Mac.
1179 * By the way 2, the code currently maps in a bunch of
1180 * regions. But I'd like to cut that out. (And move most
1181 * of the mappings up into the kernel proper ... or only
1182 * map what's necessary.)
1189 is_not_mac(L(mmu_init_not_mac))
1193 is_not_040_or_060(1f)
1195 moveq #_PAGE_NOCACHE_S,%d3
1198 moveq #_PAGE_NOCACHE030,%d3
1201 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical>
1202 * we simply map the 4MB that contains the videomem
1205 movel #VIDEOMEMMASK,%d0
1206 andl %pc@(L(mac_videobase)),%d0
1208 mmu_map #VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3
1209 /* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */
1210 mmu_map_eq #0x40000000,#0x02000000,%d3
1211 /* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */
1212 mmu_map_eq #0x50000000,#0x03000000,%d3
1213 /* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */
1214 mmu_map_tt #1,#0xf8000000,#0x08000000,%d3
1216 jbra L(mmu_init_done)
1218 L(mmu_init_not_mac):
1222 is_not_sun3x(L(notsun3x))
1224 /* oh, the pain.. We're gonna want the prom code after
1225 * starting the MMU, so we copy the mappings, translating
1226 * from 8k -> 4k pages as we go.
1229 /* copy maps from 0xfee00000 to 0xff000000 */
1230 movel #0xfee00000, %d0
1231 moveq #ROOT_INDEX_SHIFT, %d1
1233 mmu_get_root_table_entry %d0
1235 movel #0xfee00000, %d0
1236 moveq #PTR_INDEX_SHIFT, %d1
1238 andl #PTR_TABLE_SIZE-1, %d0
1239 mmu_get_ptr_table_entry %a0,%d0
1241 movel #0xfee00000, %d0
1242 moveq #PAGE_INDEX_SHIFT, %d1
1244 andl #PAGE_TABLE_SIZE-1, %d0
1245 mmu_get_page_table_entry %a0,%d0
1247 /* this is where the prom page table lives */
1248 movel 0xfefe00d4, %a1
1251 movel #((0x200000 >> 13)-1), %d1
1261 /* setup tt1 for I/O */
1262 mmu_map_tt #1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S
1263 jbra L(mmu_init_done)
1268 #ifdef CONFIG_APOLLO
1269 is_not_apollo(L(notapollo))
1272 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
1275 jbra L(mmu_init_done)
1286 * On the 040 class machines, all pages that are used for the
1287 * mmu have to be fixed up. According to Motorola, pages holding mmu
1288 * tables should be non-cacheable on a '040 and write-through on a
1289 * '060. But analysis of the reasons for this, and practical
1290 * experience, showed that write-through also works on a '040.
1292 * Allocated memory so far goes from kernel_end to memory_start that
1293 * is used for all kind of tables, for that the cache attributes
1298 is_not_040_or_060(L(mmu_fixup_done))
1300 #ifdef MMU_NOCACHE_KERNEL
1301 jbra L(mmu_fixup_done)
1304 /* first fix the page at the start of the kernel, that
1305 * contains also kernel_pg_dir.
1307 movel %pc@(L(phys_kernel_start)),%d0
1308 subl #PAGE_OFFSET,%d0
1309 lea %pc@(_stext),%a0
1311 mmu_fixup_page_mmu_cache %a0
1313 movel %pc@(L(kernel_end)),%a0
1315 movel %pc@(L(memory_start)),%a1
1319 mmu_fixup_page_mmu_cache %a0
1334 * This chunk of code performs the gruesome task of engaging the MMU.
1335 * The reason its gruesome is because when the MMU becomes engaged it
1336 * maps logical addresses to physical addresses. The Program Counter
1337 * register is then passed through the MMU before the next instruction
1338 * is fetched (the instruction following the engage MMU instruction).
1339 * This may mean one of two things:
1340 * 1. The Program Counter falls within the logical address space of
1341 * the kernel of which there are two sub-possibilities:
1342 * A. The PC maps to the correct instruction (logical PC == physical
1343 * code location), or
1344 * B. The PC does not map through and the processor will read some
1345 * data (or instruction) which is not the logically next instr.
1346 * As you can imagine, A is good and B is bad.
1348 * 2. The Program Counter does not map through the MMU. The processor
1349 * will take a Bus Error.
1350 * Clearly, 2 is bad.
1351 * It doesn't take a wiz kid to figure you want 1.A.
1352 * This code creates that possibility.
1353 * There are two possible 1.A. states (we now ignore the other above states):
1354 * A. The kernel is located at physical memory addressed the same as
1355 * the logical memory for the kernel, i.e., 0x01000.
1356 * B. The kernel is located some where else. e.g., 0x0400.0000
1358 * Under some conditions the Macintosh can look like A or B.
1359 * [A friend and I once noted that Apple hardware engineers should be
1360 * wacked twice each day: once when they show up at work (as in, Whack!,
1361 * "This is for the screwy hardware we know you're going to design today."),
1362 * and also at the end of the day (as in, Whack! "I don't know what
1363 * you designed today, but I'm sure it wasn't good."). -- rst]
1365 * This code works on the following premise:
1366 * If the kernel start (%d5) is within the first 16 Meg of RAM,
1367 * then create a mapping for the kernel at logical 0x8000.0000 to
1368 * the physical location of the pc. And, create a transparent
1369 * translation register for the first 16 Meg. Then, after the MMU
1370 * is engaged, the PC can be moved up into the 0x8000.0000 range
1371 * and then the transparent translation can be turned off and then
1372 * the PC can jump to the correct logical location and it will be
1373 * home (finally). This is essentially the code that the Amiga used
1374 * to use. Now, it's generalized for all processors. Which means
1375 * that a fresh (but temporary) mapping has to be created. The mapping
1376 * is made in page 0 (an as of yet unused location -- except for the
1377 * stack!). This temporary mapping will only require 1 pointer table
1378 * and a single page table (it can map 256K).
1380 * OK, alternatively, imagine that the Program Counter is not within
1381 * the first 16 Meg. Then, just use Transparent Translation registers
1382 * to do the right thing.
1384 * Last, if _start is already at 0x01000, then there's nothing special
1385 * to do (in other words, in a degenerate case of the first case above,
1398 * After this point no new memory is allocated and
1399 * the start of available memory is stored in availmem.
1400 * (The bootmem allocator requires now the physicall address.)
1403 movel L(memory_start),availmem
1407 /* fixup the Amiga custom register location before printing */
1414 /* fixup the Atari iobase register location before printing */
1415 movel #0xff000000,L(iobase)
1421 movel #~VIDEOMEMMASK,%d0
1422 andl L(mac_videobase),%d0
1423 addl #VIDEOMEMBASE,%d0
1424 movel %d0,L(mac_videobase)
1425 #if defined(CONSOLE)
1426 movel %pc@(L(phys_kernel_start)),%d0
1427 subl #PAGE_OFFSET,%d0
1428 subl %d0,L(console_font)
1429 subl %d0,L(console_font_data)
1431 #ifdef MAC_SERIAL_DEBUG
1432 orl #0x50000000,L(mac_sccbase)
1440 * Fix up the iobase register to point to the new location of the LEDs.
1442 movel #0xf0000000,L(iobase)
1445 * Energise the FPU and caches.
1448 movel #0x60,0xf05f400c
1452 * 040: slightly different, apparently.
1454 1: movew #0,0xf05f400e
1455 movew #0x64,0xf05f400e
1463 oriw #0x4000,0x61000000
1467 #ifdef CONFIG_APOLLO
1471 * Fix up the iobase before printing
1473 movel #0x80000000,L(iobase)
1484 is_not_040_or_060(L(cache_not_680460))
1492 is_060(L(cache68060))
1494 movel #CC6_ENABLE_D+CC6_ENABLE_I,%d0
1495 /* MMU stuff works in copyback mode now, so enable the cache */
1500 movel #CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0
1501 /* MMU stuff works in copyback mode now, so enable the cache */
1503 /* enable superscalar dispatch in PCR */
1509 L(cache_not_680460):
1512 movel #CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0
1522 * Setup initial stack pointer
1524 lea init_task,%curptr
1525 lea init_thread_union+THREAD_SIZE,%sp
1529 subl %a6,%a6 /* clear a6 for gdb */
1532 * The new 64bit printf support requires an early exception initialization.
1536 /* jump to the kernel start */
1544 * Find a tag record in the bootinfo structure
1545 * The bootinfo structure is located right after the kernel bss
1546 * Returns: d0: size (-1 if not found)
1547 * a0: data pointer (end-of-records if not found)
1549 func_start get_bi_record,%d1
1553 1: tstw %a0@(BIR_TAG)
1555 cmpw %a0@(BIR_TAG),%d0
1557 addw %a0@(BIR_SIZE),%a0
1560 movew %a0@(BIR_SIZE),%d0
1561 lea %a0@(BIR_DATA),%a0
1564 lea %a0@(BIR_SIZE),%a0
1566 func_return get_bi_record
1570 * MMU Initialization Begins Here
1572 * The structure of the MMU tables on the 68k machines
1575 * Logical addresses are translated through
1576 * a hierarchical translation mechanism where the high-order
1577 * seven bits of the logical address (LA) are used as an
1578 * index into the "root table." Each entry in the root
1579 * table has a bit which specifies if it's a valid pointer to a
1580 * pointer table. Each entry defines a 32KMeg range of memory.
1581 * If an entry is invalid then that logical range of 32M is
1582 * invalid and references to that range of memory (when the MMU
1583 * is enabled) will fault. If the entry is valid, then it does
1584 * one of two things. On 040/060 class machines, it points to
1585 * a pointer table which then describes more finely the memory
1586 * within that 32M range. On 020/030 class machines, a technique
1587 * called "early terminating descriptors" are used. This technique
1588 * allows an entire 32Meg to be described by a single entry in the
1589 * root table. Thus, this entry in the root table, contains the
1590 * physical address of the memory or I/O at the logical address
1591 * which the entry represents and it also contains the necessary
1592 * cache bits for this region.
1595 * Per the Root Table, there will be one or more
1596 * pointer tables. Each pointer table defines a 32M range.
1597 * Not all of the 32M range need be defined. Again, the next
1598 * seven bits of the logical address are used an index into
1599 * the pointer table to point to page tables (if the pointer
1600 * is valid). There will undoubtedly be more than one
1601 * pointer table for the kernel because each pointer table
1602 * defines a range of only 32M. Valid pointer table entries
1603 * point to page tables, or are early terminating entries
1607 * Per the Pointer Tables, each page table entry points
1608 * to the physical page in memory that supports the logical
1609 * address that translates to the particular index.
1611 * In short, the Logical Address gets translated as follows:
1612 * bits 31..26 - index into the Root Table
1613 * bits 25..18 - index into the Pointer Table
1614 * bits 17..12 - index into the Page Table
1615 * bits 11..0 - offset into a particular 4K page
1617 * The algorithms which follows do one thing: they abstract
1618 * the MMU hardware. For example, there are three kinds of
1619 * cache settings that are relevant. Either, memory is
1620 * being mapped in which case it is either Kernel Code (or
1621 * the RamDisk) or it is MMU data. On the 030, the MMU data
1622 * option also describes the kernel. Or, I/O is being mapped
1623 * in which case it has its own kind of cache bits. There
1624 * are constants which abstract these notions from the code that
1625 * actually makes the call to map some range of memory.
1635 * This algorithm will print out the current MMU mappings.
1638 * %a5 points to the root table. Everything else is calculated
1642 #define mmu_next_valid 0
1643 #define mmu_start_logical 4
1644 #define mmu_next_logical 8
1645 #define mmu_start_physical 12
1646 #define mmu_next_physical 16
1648 #define MMU_PRINT_INVALID -1
1649 #define MMU_PRINT_VALID 1
1650 #define MMU_PRINT_UNINITED 0
1652 #define putZc(z,n) jbne 1f; putc z; jbra 2f; 1: putc n; 2:
1654 func_start mmu_print,%a0-%a6/%d0-%d7
1656 movel %pc@(L(kernel_pgdir_ptr)),%a5
1657 lea %pc@(L(mmu_print_data)),%a0
1658 movel #MMU_PRINT_UNINITED,%a0@(mmu_next_valid)
1660 is_not_040_or_060(mmu_030_print)
1669 * The following #if/#endif block is a tight algorithm for dumping the 040
1670 * MMU Map in gory detail. It really isn't that practical unless the
1671 * MMU Map algorithm appears to go awry and you need to debug it at the
1672 * entry per entry level.
1674 movel #ROOT_TABLE_SIZE,%d5
1676 movel %a5@+,%d7 | Burn an entry to skip the kernel mappings,
1677 subql #1,%d5 | they (might) work
1687 andil #0xFFFFFE00,%d7
1689 movel #PTR_TABLE_SIZE,%d4
1699 andil #0xFFFFFF00,%d7
1701 movel #PAGE_TABLE_SIZE,%d3
1715 movel #8+1+8+1+1,%d2
1730 #endif /* MMU 040 Dumping code that's gory and detailed */
1732 lea %pc@(kernel_pg_dir),%a5
1733 movel %a5,%a0 /* a0 has the address of the root table ptr */
1734 movel #0x00000000,%a4 /* logical address */
1737 /* Increment the logical address and preserve in d5 */
1739 addil #PAGESIZE<<13,%d5
1743 jbsr mmu_print_tuple_invalidate
1747 andil #0xfffffe00,%d6
1751 addil #PAGESIZE<<6,%d5
1755 jbsr mmu_print_tuple_invalidate
1759 andil #0xffffff00,%d6
1767 jbsr mmu_print_tuple_invalidate
1770 moveml %d0-%d1,%sp@-
1773 andil #0xfffff4e0,%d1
1774 lea %pc@(mmu_040_print_flags),%a6
1775 jbsr mmu_print_tuple
1776 moveml %sp@+,%d0-%d1
1788 movel %d5,%a4 /* move to the next logical address */
1796 andiw #0x8000,%d1 /* is it valid ? */
1797 jbeq 1f /* No, bail out */
1800 andil #0xff000000,%d1 /* Get the address */
1806 jbsr mmu_040_print_flags_tt
1810 andiw #0x8000,%d1 /* is it valid ? */
1811 jbeq 1f /* No, bail out */
1814 andil #0xff000000,%d1 /* Get the address */
1820 jbsr mmu_040_print_flags_tt
1826 mmu_040_print_flags:
1828 putZc(' ','G') /* global bit */
1830 putZc(' ','S') /* supervisor bit */
1831 mmu_040_print_flags_tt:
1836 putZc('w','c') /* write through or copy-back */
1841 putZc('s',' ') /* serialized non-cacheable, or non-cacheable */
1845 mmu_030_print_flags:
1847 putZc('C','I') /* write through or copy-back */
1856 andil #0xfffffff0,%d0
1858 movel #0x00000000,%a4 /* logical address */
1862 addil #PAGESIZE<<13,%d5
1864 btst #1,%d6 /* is it a table ptr? */
1866 btst #0,%d6 /* is it early terminating? */
1868 jbsr mmu_030_print_helper
1871 jbsr mmu_print_tuple_invalidate
1875 andil #0xfffffff0,%d6
1879 addil #PAGESIZE<<6,%d5
1881 btst #1,%d6 /* is it a table ptr? */
1883 btst #0,%d6 /* is it a page descriptor? */
1885 jbsr mmu_030_print_helper
1888 jbsr mmu_print_tuple_invalidate
1892 andil #0xfffffff0,%d6
1900 jbsr mmu_print_tuple_invalidate
1903 jbsr mmu_030_print_helper
1915 movel %d5,%a4 /* move to the next logical address */
1923 func_return mmu_print
1926 mmu_030_print_helper:
1927 moveml %d0-%d1,%sp@-
1930 lea %pc@(mmu_030_print_flags),%a6
1931 jbsr mmu_print_tuple
1932 moveml %sp@+,%d0-%d1
1935 mmu_print_tuple_invalidate:
1936 moveml %a0/%d7,%sp@-
1938 lea %pc@(L(mmu_print_data)),%a0
1939 tstl %a0@(mmu_next_valid)
1940 jbmi mmu_print_tuple_invalidate_exit
1942 movel #MMU_PRINT_INVALID,%a0@(mmu_next_valid)
1948 mmu_print_tuple_invalidate_exit:
1949 moveml %sp@+,%a0/%d7
1954 moveml %d0-%d7/%a0,%sp@-
1956 lea %pc@(L(mmu_print_data)),%a0
1958 tstl %a0@(mmu_next_valid)
1959 jble mmu_print_tuple_print
1961 cmpl %a0@(mmu_next_physical),%d1
1962 jbeq mmu_print_tuple_increment
1964 mmu_print_tuple_print:
1972 mmu_print_tuple_record:
1973 movel #MMU_PRINT_VALID,%a0@(mmu_next_valid)
1975 movel %d1,%a0@(mmu_next_physical)
1977 mmu_print_tuple_increment:
1980 addl %d7,%a0@(mmu_next_physical)
1982 mmu_print_tuple_exit:
1983 moveml %sp@+,%d0-%d7/%a0
1986 mmu_print_machine_cpu_types:
2008 is_not_040_or_060(2f)
2016 #endif /* MMU_PRINT */
2021 * This is a specific function which works on all 680x0 machines.
2022 * On 030, 040 & 060 it will attempt to use Transparent Translation
2024 * On 020 it will call the standard mmu_map which will use early
2025 * terminating descriptors.
2027 func_start mmu_map_tt,%d0/%d1/%a0,4
2038 /* Extract the highest bit set
2040 bfffo ARG3{#0,#32},%d1
2056 /* Generate the upper 16bit of the tt register
2062 is_040_or_060(L(mmu_map_tt_040))
2064 /* set 030 specific bits (read/write access for supervisor mode
2065 * (highest function code set, lower two bits masked))
2067 orw #TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1
2083 jra L(mmu_map_tt_done)
2085 /* set 040 specific bits
2088 orw #TTR_ENABLE+TTR_KERNELMODE,%d1
2102 jra L(mmu_map_tt_done)
2105 mmu_map_eq ARG2,ARG3,ARG4
2109 func_return mmu_map_tt
2114 * This routine will map a range of memory using a pointer
2115 * table and allocating the pages on the fly from the kernel.
2116 * The pointer table does not have to be already linked into
2117 * the root table, this routine will do that if necessary.
2120 * This routine will assert failure and use the serial_putc
2121 * routines in the case of a run-time error. For example,
2122 * if the address is already mapped.
2125 * This routine will use early terminating descriptors
2126 * where possible for the 68020+68851 and 68030 type
2129 func_start mmu_map,%d0-%d4/%a0-%a4
2138 /* Get logical address and round it down to 256KB
2141 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2144 /* Get the end address
2150 /* Get physical address and round it down to 256KB
2153 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2156 /* Add page attributes to the physical address
2159 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2166 is_not_040_or_060(L(mmu_map_030))
2168 addw #_PAGE_GLOBAL040,%a2
2170 * MMU 040 & 060 Support
2172 * The MMU usage for the 040 and 060 is different enough from
2173 * the 030 and 68851 that there is separate code. This comment
2174 * block describes the data structures and algorithms built by
2177 * The 040 does not support early terminating descriptors, as
2178 * the 030 does. Therefore, a third level of table is needed
2179 * for the 040, and that would be the page table. In Linux,
2180 * page tables are allocated directly from the memory above the
2186 /* Calculate the offset into the root table
2189 moveq #ROOT_INDEX_SHIFT,%d1
2191 mmu_get_root_table_entry %d0
2193 /* Calculate the offset into the pointer table
2196 moveq #PTR_INDEX_SHIFT,%d1
2198 andl #PTR_TABLE_SIZE-1,%d0
2199 mmu_get_ptr_table_entry %a0,%d0
2201 /* Calculate the offset into the page table
2204 moveq #PAGE_INDEX_SHIFT,%d1
2206 andl #PAGE_TABLE_SIZE-1,%d0
2207 mmu_get_page_table_entry %a0,%d0
2209 /* The page table entry must not no be busy
2212 jne L(mmu_map_error)
2214 /* Do the mapping and advance the pointers
2221 /* Ready with mapping?
2229 /* Calculate the offset into the root table
2232 moveq #ROOT_INDEX_SHIFT,%d1
2234 mmu_get_root_table_entry %d0
2236 /* Check if logical address 32MB aligned,
2237 * so we can try to map it once
2240 andl #(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0
2243 /* Is there enough to map for 32MB at once
2245 lea %a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1
2251 /* The root table entry must not no be busy
2254 jne L(mmu_map_error)
2256 /* Do the mapping and advance the pointers
2266 lea %a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2
2267 jra L(mmu_mapnext_030)
2269 /* Calculate the offset into the pointer table
2272 moveq #PTR_INDEX_SHIFT,%d1
2274 andl #PTR_TABLE_SIZE-1,%d0
2275 mmu_get_ptr_table_entry %a0,%d0
2277 /* The pointer table entry must not no be busy
2280 jne L(mmu_map_error)
2282 /* Do the mapping and advance the pointers
2290 addl #PAGE_TABLE_SIZE*PAGESIZE,%a2
2291 addl #PAGE_TABLE_SIZE*PAGESIZE,%a3
2294 /* Ready with mapping?
2303 dputs "mmu_map error:"
2315 * On the 040 class machines, all pages that are used for the
2316 * mmu have to be fixed up.
2319 func_start mmu_fixup_page_mmu_cache,%d0/%a0
2321 dputs "mmu_fixup_page_mmu_cache"
2324 /* Calculate the offset into the root table
2327 moveq #ROOT_INDEX_SHIFT,%d1
2329 mmu_get_root_table_entry %d0
2331 /* Calculate the offset into the pointer table
2334 moveq #PTR_INDEX_SHIFT,%d1
2336 andl #PTR_TABLE_SIZE-1,%d0
2337 mmu_get_ptr_table_entry %a0,%d0
2339 /* Calculate the offset into the page table
2342 moveq #PAGE_INDEX_SHIFT,%d1
2344 andl #PAGE_TABLE_SIZE-1,%d0
2345 mmu_get_page_table_entry %a0,%d0
2348 andil #_CACHEMASK040,%d0
2349 orl %pc@(m68k_pgtable_cachemode),%d0
2354 func_return mmu_fixup_page_mmu_cache
2359 * create a temporary mapping to enable the mmu,
2360 * this we don't need any transparation translation tricks.
2363 func_start mmu_temp_map,%d0/%d1/%a0/%a1
2365 dputs "mmu_temp_map"
2370 lea %pc@(L(temp_mmap_mem)),%a1
2372 /* Calculate the offset in the root table
2375 moveq #ROOT_INDEX_SHIFT,%d1
2377 mmu_get_root_table_entry %d0
2379 /* Check if the table is temporary allocated, so we have to reuse it
2382 cmpl %pc@(L(memory_start)),%d0
2385 /* Temporary allocate a ptr table and insert it into the root table
2388 addl #PTR_TABLE_SIZE*4,%a1@
2389 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2394 /* Mask the root table entry for the ptr table
2396 andw #-ROOT_TABLE_SIZE,%d0
2399 /* Calculate the offset into the pointer table
2402 moveq #PTR_INDEX_SHIFT,%d1
2404 andl #PTR_TABLE_SIZE-1,%d0
2408 /* Check if a temporary page table is already allocated
2413 /* Temporary allocate a page table and insert it into the ptr table
2416 /* The 512 should be PAGE_TABLE_SIZE*4, but that violates the
2417 alignment restriction for pointer tables on the '0[46]0. */
2419 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2424 /* Mask the ptr table entry for the page table
2426 andw #-PTR_TABLE_SIZE,%d0
2429 /* Calculate the offset into the page table
2432 moveq #PAGE_INDEX_SHIFT,%d1
2434 andl #PAGE_TABLE_SIZE-1,%d0
2438 /* Insert the address into the page table
2442 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2448 func_return mmu_temp_map
2450 func_start mmu_engage,%d0-%d2/%a0-%a3
2452 moveq #ROOT_TABLE_SIZE-1,%d0
2453 /* Temporarily use a different root table. */
2454 lea %pc@(L(kernel_pgdir_ptr)),%a0
2456 movel %pc@(L(memory_start)),%a1
2463 lea %pc@(L(temp_mmap_mem)),%a0
2466 movew #PAGESIZE-1,%d0
2473 /* Skip temp mappings if phys == virt */
2477 mmu_temp_map %a0,%a0
2478 mmu_temp_map %a0,%a1
2482 mmu_temp_map %a0,%a0
2483 mmu_temp_map %a0,%a1
2485 movel %pc@(L(memory_start)),%a3
2486 movel %pc@(L(phys_kernel_start)),%d2
2488 is_not_040_or_060(L(mmu_engage_030))
2498 movel #TC_ENABLE+TC_PAGE4K,%d0
2499 movec %d0,%tc /* enable the MMU */
2508 jra L(mmu_engage_cleanup)
2510 L(mmu_engage_030_temp):
2514 lea %pc@(L(mmu_engage_030_temp)),%a0
2515 movel #0x80000002,%a0@
2522 * enable,super root enable,4096 byte pages,7 bit root index,
2523 * 7 bit pointer index, 6 bit page table index.
2525 movel #0x82c07760,%a0@(8)
2526 pmove %a0@(8),%tc /* enable the MMU */
2528 1: movel %a2,%a0@(4)
2535 L(mmu_engage_cleanup):
2536 subl #PAGE_OFFSET,%d2
2538 movel %a2,L(kernel_pgdir_ptr)
2543 func_return mmu_engage
2545 func_start mmu_get_root_table_entry,%d0/%a1
2548 dputs "mmu_get_root_table_entry:"
2553 movel %pc@(L(kernel_pgdir_ptr)),%a0
2559 /* Find the start of free memory, get_bi_record does this for us,
2560 * as the bootinfo structure is located directly behind the kernel
2561 * and and we simply search for the last entry.
2563 get_bi_record BI_LAST
2564 addw #PAGESIZE-1,%a0
2570 lea %pc@(L(memory_start)),%a0
2572 lea %pc@(L(kernel_end)),%a0
2575 /* we have to return the first page at _stext since the init code
2576 * in mm/init.c simply expects kernel_pg_dir there, the rest of
2577 * page is used for further ptr tables in get_ptr_table.
2579 lea %pc@(_stext),%a0
2580 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2582 addl #ROOT_TABLE_SIZE*4,%a1@
2584 lea %pc@(L(mmu_num_pointer_tables)),%a1
2590 movew #PAGESIZE/4-1,%d0
2595 lea %pc@(L(kernel_pgdir_ptr)),%a1
2609 func_return mmu_get_root_table_entry
2613 func_start mmu_get_ptr_table_entry,%d0/%a1
2616 dputs "mmu_get_ptr_table_entry:"
2626 /* Keep track of the number of pointer tables we use
2628 dputs "\nmmu_get_new_ptr_table:"
2629 lea %pc@(L(mmu_num_pointer_tables)),%a0
2633 /* See if there is a free pointer table in our cache of pointer tables
2635 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2639 /* Get a new pointer table page from above the kernel memory
2644 /* There is an unused pointer table in our cache... use it
2647 addl #PTR_TABLE_SIZE*4,%a1@
2652 /* Insert the new pointer table into the root table
2655 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2658 /* Extract the pointer table entry
2660 andw #-PTR_TABLE_SIZE,%d0
2670 func_return mmu_get_ptr_table_entry
2673 func_start mmu_get_page_table_entry,%d0/%a1
2676 dputs "mmu_get_page_table_entry:"
2686 /* If the page table entry doesn't exist, we allocate a complete new
2687 * page and use it as one continues big page table which can cover
2688 * 4MB of memory, nearly almost all mappings have that alignment.
2691 addw #_PAGE_TABLE+_PAGE_ACCESSED,%a0
2693 /* align pointer table entry for a page of page tables
2696 andw #-(PAGESIZE/PAGE_TABLE_SIZE),%d0
2699 /* Insert the page tables into the pointer entries
2701 moveq #PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0
2704 lea %a0@(PAGE_TABLE_SIZE*4),%a0
2707 /* Now we can get the initialized pointer table entry
2712 /* Extract the page table entry
2714 andw #-PAGE_TABLE_SIZE,%d0
2724 func_return mmu_get_page_table_entry
2729 * Return a new page from the memory start and clear it.
2731 func_start get_new_page,%d0/%a1
2733 dputs "\nget_new_page:"
2735 /* allocate the page and adjust memory_start
2737 lea %pc@(L(memory_start)),%a0
2741 /* clear the new page
2744 movew #PAGESIZE/4-1,%d0
2752 func_return get_new_page
2757 * Debug output support
2758 * Atarians have a choice between the parallel port, the serial port
2759 * from the MFP or a serial port of the SCC
2764 L(scc_initable_mac):
2765 .byte 9,12 /* Reset */
2766 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2767 .byte 3,0xc0 /* receiver: 8 bpc */
2768 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2769 .byte 9,0 /* no interrupts */
2770 .byte 10,0 /* NRZ */
2771 .byte 11,0x50 /* use baud rate generator */
2772 .byte 12,10,13,0 /* 9600 baud */
2773 .byte 14,1 /* Baud rate generator enable */
2774 .byte 3,0xc1 /* enable receiver */
2775 .byte 5,0xea /* enable transmitter */
2781 /* #define USE_PRINTER */
2782 /* #define USE_SCC_B */
2783 /* #define USE_SCC_A */
2786 #if defined(USE_SCC_A) || defined(USE_SCC_B)
2788 /* Initialisation table for SCC */
2790 .byte 9,12 /* Reset */
2791 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2792 .byte 3,0xc0 /* receiver: 8 bpc */
2793 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2794 .byte 9,0 /* no interrupts */
2795 .byte 10,0 /* NRZ */
2796 .byte 11,0x50 /* use baud rate generator */
2797 .byte 12,24,13,0 /* 9600 baud */
2798 .byte 14,2,14,3 /* use master clock for BRG, enable */
2799 .byte 3,0xc1 /* enable receiver */
2800 .byte 5,0xea /* enable transmitter */
2807 LPSG_SELECT = 0xff8800
2808 LPSG_READ = 0xff8800
2809 LPSG_WRITE = 0xff8802
2813 LSTMFP_GPIP = 0xfffa01
2814 LSTMFP_DDR = 0xfffa05
2815 LSTMFP_IERB = 0xfffa09
2817 #elif defined(USE_SCC_B)
2819 LSCC_CTRL = 0xff8c85
2820 LSCC_DATA = 0xff8c87
2822 #elif defined(USE_SCC_A)
2824 LSCC_CTRL = 0xff8c81
2825 LSCC_DATA = 0xff8c83
2827 #elif defined(USE_MFP)
2830 LMFP_TDCDR = 0xfffa1d
2831 LMFP_TDDR = 0xfffa25
2836 #endif /* CONFIG_ATARI */
2839 * Serial port output support.
2843 * Initialize serial port hardware for 9600/8/1
2845 func_start serial_init,%d0/%d1/%a0/%a1
2847 * Some of the register usage that follows
2849 * a0 = pointer to boot info record
2850 * d0 = boot info offset
2852 * a0 = address of SCC
2853 * a1 = Liobase address/address of scc_initable
2854 * d0 = init data for serial port
2856 * a0 = address of SCC
2857 * a1 = address of scc_initable_mac
2858 * d0 = init data for serial port
2862 #define SERIAL_DTR 7
2863 #define SERIAL_CNTRL CIABBASE+C_PRA
2866 lea %pc@(L(custom)),%a0
2867 movel #-ZTWOBASE,%a0@
2868 bclr #SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE
2869 get_bi_record BI_AMIGA_SERPER
2870 movew %a0@,CUSTOMBASE+C_SERPER-ZTWOBASE
2871 | movew #61,CUSTOMBASE+C_SERPER-ZTWOBASE
2876 movel %pc@(L(iobase)),%a1
2877 #if defined(USE_PRINTER)
2878 bclr #0,%a1@(LSTMFP_IERB)
2879 bclr #0,%a1@(LSTMFP_DDR)
2880 moveb #LPSG_CONTROL,%a1@(LPSG_SELECT)
2881 moveb #0xff,%a1@(LPSG_WRITE)
2882 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
2883 clrb %a1@(LPSG_WRITE)
2884 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
2885 moveb %a1@(LPSG_READ),%d0
2887 moveb %d0,%a1@(LPSG_WRITE)
2888 #elif defined(USE_SCC)
2889 lea %a1@(LSCC_CTRL),%a0
2890 lea %pc@(L(scc_initable)),%a1
2897 #elif defined(USE_MFP)
2898 bclr #1,%a1@(LMFP_TSR)
2899 moveb #0x88,%a1@(LMFP_UCR)
2900 andb #0x70,%a1@(LMFP_TDCDR)
2901 moveb #2,%a1@(LMFP_TDDR)
2902 orb #1,%a1@(LMFP_TDCDR)
2903 bset #1,%a1@(LMFP_TSR)
2905 jra L(serial_init_done)
2909 is_not_mac(L(serial_init_not_mac))
2910 #ifdef MAC_SERIAL_DEBUG
2911 #if !defined(MAC_USE_SCC_A) && !defined(MAC_USE_SCC_B)
2912 #define MAC_USE_SCC_B
2914 #define mac_scc_cha_b_ctrl_offset 0x0
2915 #define mac_scc_cha_a_ctrl_offset 0x2
2916 #define mac_scc_cha_b_data_offset 0x4
2917 #define mac_scc_cha_a_data_offset 0x6
2919 #ifdef MAC_USE_SCC_A
2920 /* Initialize channel A */
2921 movel %pc@(L(mac_sccbase)),%a0
2922 lea %pc@(L(scc_initable_mac)),%a1
2925 moveb %d0,%a0@(mac_scc_cha_a_ctrl_offset)
2926 moveb %a1@+,%a0@(mac_scc_cha_a_ctrl_offset)
2929 #endif /* MAC_USE_SCC_A */
2931 #ifdef MAC_USE_SCC_B
2932 /* Initialize channel B */
2933 #ifndef MAC_USE_SCC_A /* Load mac_sccbase only if needed */
2934 movel %pc@(L(mac_sccbase)),%a0
2935 #endif /* MAC_USE_SCC_A */
2936 lea %pc@(L(scc_initable_mac)),%a1
2939 moveb %d0,%a0@(mac_scc_cha_b_ctrl_offset)
2940 moveb %a1@+,%a0@(mac_scc_cha_b_ctrl_offset)
2943 #endif /* MAC_USE_SCC_B */
2944 #endif /* MAC_SERIAL_DEBUG */
2946 jra L(serial_init_done)
2947 L(serial_init_not_mac):
2948 #endif /* CONFIG_MAC */
2952 /* debug output goes into SRAM, so we don't do it unless requested
2953 - check for '%LX$' signature in SRAM */
2954 lea %pc@(q40_mem_cptr),%a1
2955 move.l #0xff020010,%a1@ /* must be inited - also used by debug=mem */
2956 move.l #0xff020000,%a1
2969 lea %pc@(L(q40_do_debug)),%a1
2971 /*nodbg: q40_do_debug is 0 by default*/
2975 #ifdef CONFIG_APOLLO
2976 /* We count on the PROM initializing SIO1 */
2980 /* We count on the boot loader initialising the UART */
2983 L(serial_init_done):
2984 func_return serial_init
2987 * Output character on serial port.
2989 func_start serial_putc,%d0/%d1/%a0/%a1
2995 /* A little safe recursion is good for the soul */
3003 movel %pc@(L(custom)),%a0
3004 movew %d0,%a0@(CUSTOMBASE+C_SERDAT)
3005 1: movew %a0@(CUSTOMBASE+C_SERDATR),%d0
3008 jra L(serial_putc_done)
3015 #ifdef MAC_SERIAL_DEBUG
3017 #ifdef MAC_USE_SCC_A
3018 movel %pc@(L(mac_sccbase)),%a1
3019 3: btst #2,%a1@(mac_scc_cha_a_ctrl_offset)
3021 moveb %d0,%a1@(mac_scc_cha_a_data_offset)
3022 #endif /* MAC_USE_SCC_A */
3024 #ifdef MAC_USE_SCC_B
3025 #ifndef MAC_USE_SCC_A /* Load mac_sccbase only if needed */
3026 movel %pc@(L(mac_sccbase)),%a1
3027 #endif /* MAC_USE_SCC_A */
3028 4: btst #2,%a1@(mac_scc_cha_b_ctrl_offset)
3030 moveb %d0,%a1@(mac_scc_cha_b_data_offset)
3031 #endif /* MAC_USE_SCC_B */
3033 #endif /* MAC_SERIAL_DEBUG */
3035 jra L(serial_putc_done)
3037 #endif /* CONFIG_MAC */
3041 movel %pc@(L(iobase)),%a1
3042 #if defined(USE_PRINTER)
3043 3: btst #0,%a1@(LSTMFP_GPIP)
3045 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
3046 moveb %d0,%a1@(LPSG_WRITE)
3047 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
3048 moveb %a1@(LPSG_READ),%d0
3050 moveb %d0,%a1@(LPSG_WRITE)
3054 moveb %d0,%a1@(LPSG_WRITE)
3055 #elif defined(USE_SCC)
3056 3: btst #2,%a1@(LSCC_CTRL)
3058 moveb %d0,%a1@(LSCC_DATA)
3059 #elif defined(USE_MFP)
3060 3: btst #7,%a1@(LMFP_TSR)
3062 moveb %d0,%a1@(LMFP_UDR)
3064 jra L(serial_putc_done)
3066 #endif /* CONFIG_ATARI */
3068 #ifdef CONFIG_MVME147
3070 1: btst #2,M147_SCC_CTRL_A
3072 moveb %d0,M147_SCC_DATA_A
3073 jbra L(serial_putc_done)
3077 #ifdef CONFIG_MVME16x
3080 * If the loader gave us a board type then we can use that to
3081 * select an appropriate output routine; otherwise we just use
3082 * the Bug code. If we haev to use the Bug that means the Bug
3083 * workspace has to be valid, which means the Bug has to use
3084 * the SRAM, which is non-standard.
3086 moveml %d0-%d7/%a2-%a6,%sp@-
3087 movel vme_brdtype,%d1
3088 jeq 1f | No tag - use the Bug
3089 cmpi #VME_TYPE_MVME162,%d1
3091 cmpi #VME_TYPE_MVME172,%d1
3093 /* 162/172; it's an SCC */
3094 6: btst #2,M162_SCC_CTRL_A
3099 moveb #8,M162_SCC_CTRL_A
3103 moveb %d0,M162_SCC_CTRL_A
3106 /* 166/167/177; it's a CD2401 */
3108 moveb M167_CYIER,%d2
3109 moveb #0x02,M167_CYIER
3111 btst #5,M167_PCSCCTICR
3113 moveb M167_PCTPIACKR,%d1
3114 moveb M167_CYLICR,%d1
3116 moveb #0x08,M167_CYTEOIR
3119 moveb %d0,M167_CYTDR
3120 moveb #0,M167_CYTEOIR
3121 moveb %d2,M167_CYIER
3126 .word 0x0020 /* TRAP 0x020 */
3128 moveml %sp@+,%d0-%d7/%a2-%a6
3129 jbra L(serial_putc_done)
3131 #endif /* CONFIG_MVME16x */
3133 #ifdef CONFIG_BVME6000
3136 * The BVME6000 machine has a serial port ...
3138 1: btst #2,BVME_SCC_CTRL_A
3140 moveb %d0,BVME_SCC_DATA_A
3141 jbra L(serial_putc_done)
3148 movel 0xFEFE0018,%a1
3151 jbra L(serial_putc_done)
3157 tst.l %pc@(L(q40_do_debug)) /* only debug if requested */
3159 lea %pc@(q40_mem_cptr),%a1
3164 jbra L(serial_putc_done)
3168 #ifdef CONFIG_APOLLO
3170 movl %pc@(L(iobase)),%a1
3171 moveb %d0,%a1@(LTHRB0)
3172 1: moveb %a1@(LSRB0),%d0
3175 jbra L(serial_putc_done)
3181 movl %pc@(L(iobase)),%a1
3182 addl %pc@(L(uartbase)),%a1
3183 movel %pc@(L(uart_scode)),%d1 /* Check the scode */
3184 jmi 3f /* Unset? Exit */
3185 cmpi #256,%d1 /* APCI scode? */
3187 1: moveb %a1@(DCALSR),%d1 /* Output to DCA */
3190 moveb %d0,%a1@(DCADATA)
3191 jbra L(serial_putc_done)
3192 2: moveb %a1@(APCILSR),%d1 /* Output to APCI */
3195 moveb %d0,%a1@(APCIDATA)
3196 jbra L(serial_putc_done)
3200 L(serial_putc_done):
3201 func_return serial_putc
3206 func_start puts,%d0/%a0
3223 * Output number in hex notation.
3226 func_start putn,%d0-%d2
3238 addb #'A'-('9'+1),%d2
3254 * This routine takes its parameters on the stack. It then
3255 * turns around and calls the internal routine. This routine
3256 * is used until the Linux console driver initializes itself.
3258 * The calling parameters are:
3259 * void mac_serial_print(const char *str);
3261 * This routine does NOT understand variable arguments only
3264 ENTRY(mac_serial_print)
3265 moveml %d0/%a0,%sp@-
3270 movel %sp@(10),%a0 /* fetch parameter */
3278 moveml %sp@+,%d0/%a0
3280 #endif /* CONFIG_MAC */
3282 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3283 func_start set_leds,%d0/%a0
3287 movel %pc@(L(iobase)),%a0
3288 moveb %d0,%a0@(0x1ffff)
3292 #ifdef CONFIG_APOLLO
3293 movel %pc@(L(iobase)),%a0
3296 moveb %d0,%a0@(LCPUCTRL)
3299 func_return set_leds
3304 * For continuity, see the data alignment
3305 * to which this structure is tied.
3307 #define Lconsole_struct_cur_column 0
3308 #define Lconsole_struct_cur_row 4
3309 #define Lconsole_struct_num_columns 8
3310 #define Lconsole_struct_num_rows 12
3311 #define Lconsole_struct_left_edge 16
3312 #define Lconsole_struct_penguin_putc 20
3314 func_start console_init,%a0-%a4/%d0-%d7
3316 * Some of the register usage that follows
3317 * a0 = pointer to boot_info
3318 * a1 = pointer to screen
3319 * a2 = pointer to Lconsole_globals
3320 * d3 = pixel width of screen
3321 * d4 = pixel height of screen
3322 * (d3,d4) ~= (x,y) of a point just below
3323 * and to the right of the screen
3324 * NOT on the screen!
3325 * d5 = number of bytes per scan line
3326 * d6 = number of bytes on the entire screen
3329 lea %pc@(L(console_globals)),%a2
3330 movel %pc@(L(mac_videobase)),%a1
3331 movel %pc@(L(mac_rowbytes)),%d5
3332 movel %pc@(L(mac_dimensions)),%d3 /* -> low byte */
3334 swap %d4 /* -> high byte */
3335 andl #0xffff,%d3 /* d3 = screen width in pixels */
3336 andl #0xffff,%d4 /* d4 = screen height in pixels */
3340 mulul %d4,%d6 /* scan line bytes x num scan lines */
3341 divul #8,%d6 /* we'll clear 8 bytes at a time */
3342 moveq #-1,%d0 /* Mac_black */
3345 L(console_clear_loop):
3348 dbra %d6,L(console_clear_loop)
3350 /* Calculate font size */
3352 #if defined(FONT_8x8) && defined(CONFIG_FONT_8x8)
3353 lea %pc@(font_vga_8x8),%a0
3354 #elif defined(FONT_8x16) && defined(CONFIG_FONT_8x16)
3355 lea %pc@(font_vga_8x16),%a0
3356 #elif defined(FONT_6x11) && defined(CONFIG_FONT_6x11)
3357 lea %pc@(font_vga_6x11),%a0
3358 #elif defined(CONFIG_FONT_8x8) /* default */
3359 lea %pc@(font_vga_8x8),%a0
3360 #else /* no compiled-in font */
3365 * At this point we make a shift in register usage
3366 * a1 = address of console_font pointer
3368 lea %pc@(L(console_font)),%a1
3369 movel %a0,%a1@ /* store pointer to struct fbcon_font_desc in console_font */
3372 lea %pc@(L(console_font_data)),%a4
3373 movel %a0@(FONT_DESC_DATA),%d0
3374 subl #L(console_font),%a1
3379 * Calculate global maxs
3380 * Note - we can use either an
3381 * 8 x 16 or 8 x 8 character font
3382 * 6 x 11 also supported
3384 /* ASSERT: a0 = contents of Lconsole_font */
3385 movel %d3,%d0 /* screen width in pixels */
3386 divul %a0@(FONT_DESC_WIDTH),%d0 /* d0 = max num chars per row */
3388 movel %d4,%d1 /* screen height in pixels */
3389 divul %a0@(FONT_DESC_HEIGHT),%d1 /* d1 = max num rows */
3391 movel %d0,%a2@(Lconsole_struct_num_columns)
3392 movel %d1,%a2@(Lconsole_struct_num_rows)
3395 * Clear the current row and column
3397 clrl %a2@(Lconsole_struct_cur_column)
3398 clrl %a2@(Lconsole_struct_cur_row)
3399 clrl %a2@(Lconsole_struct_left_edge)
3402 * Initialization is complete
3405 func_return console_init
3407 func_start console_put_stats,%a0/%d7
3409 * Some of the register usage that follows
3410 * a0 = pointer to boot_info
3411 * d7 = value of boot_info fields
3413 puts "\nMacLinux\n\n"
3417 putn %pc@(L(mac_videobase)) /* video addr. */
3420 lea %pc@(_stext),%a0
3428 putn %pc@(L(cputype))
3431 #ifdef MAC_SERIAL_DEBUG
3432 putn %pc@(L(mac_sccbase))
3435 # if defined(MMU_PRINT)
3436 jbsr mmu_print_machine_cpu_types
3437 # endif /* MMU_PRINT */
3438 #endif /* SERIAL_DEBUG */
3440 func_return console_put_stats
3442 #ifdef CONSOLE_PENGUIN
3443 func_start console_put_penguin,%a0-%a1/%d0-%d7
3445 * Get 'that_penguin' onto the screen in the upper right corner
3446 * penguin is 64 x 74 pixels, align against right edge of screen
3448 lea %pc@(L(mac_dimensions)),%a0
3451 subil #64,%d0 /* snug up against the right edge */
3452 clrl %d1 /* start at the top */
3454 lea %pc@(L(that_penguin)),%a1
3455 L(console_penguin_row):
3457 L(console_penguin_pixel_pair):
3460 console_plot_pixel %d0,%d1,%d2
3463 console_plot_pixel %d0,%d1,%d2
3465 dbra %d6,L(console_penguin_pixel_pair)
3469 dbra %d7,L(console_penguin_row)
3471 func_return console_put_penguin
3473 /* include penguin bitmap */
3475 #include "../mac/mac_penguin.S"
3479 * Calculate source and destination addresses
3484 func_start console_scroll,%a0-%a4/%d0-%d7
3485 lea %pc@(L(mac_videobase)),%a0
3488 lea %pc@(L(mac_rowbytes)),%a0
3490 movel %pc@(L(console_font)),%a0
3493 mulul %a0@(FONT_DESC_HEIGHT),%d5 /* account for # scan lines per character */
3499 lea %pc@(L(mac_dimensions)),%a0
3503 andl #0xffff,%d3 /* d3 = screen width in pixels */
3504 andl #0xffff,%d4 /* d4 = screen height in pixels */
3507 * Calculate number of bytes to move
3509 lea %pc@(L(mac_rowbytes)),%a0
3511 movel %pc@(L(console_font)),%a0
3512 subl %a0@(FONT_DESC_HEIGHT),%d4 /* we're not scrolling the top row! */
3513 mulul %d4,%d6 /* scan line bytes x num scan lines */
3514 divul #32,%d6 /* we'll move 8 longs at a time */
3517 L(console_scroll_loop):
3526 dbra %d6,L(console_scroll_loop)
3528 lea %pc@(L(mac_rowbytes)),%a0
3530 movel %pc@(L(console_font)),%a0
3531 mulul %a0@(FONT_DESC_HEIGHT),%d6 /* scan line bytes x font height */
3532 divul #32,%d6 /* we'll move 8 words at a time */
3536 L(console_scroll_clear_loop):
3545 dbra %d6,L(console_scroll_clear_loop)
3548 func_return console_scroll
3551 func_start console_putc,%a0/%a1/%d0-%d7
3553 is_not_mac(L(console_exit))
3554 tstl %pc@(L(console_font))
3557 /* Output character in d7 on console.
3563 /* A little safe recursion is good for the soul */
3566 lea %pc@(L(console_globals)),%a0
3569 jne L(console_not_lf)
3570 movel %a0@(Lconsole_struct_cur_row),%d0
3572 movel %d0,%a0@(Lconsole_struct_cur_row)
3573 movel %a0@(Lconsole_struct_num_rows),%d1
3577 movel %d0,%a0@(Lconsole_struct_cur_row)
3584 jne L(console_not_cr)
3585 clrl %a0@(Lconsole_struct_cur_column)
3590 jne L(console_not_home)
3591 clrl %a0@(Lconsole_struct_cur_row)
3592 clrl %a0@(Lconsole_struct_cur_column)
3596 * At this point we know that the %d7 character is going to be
3597 * rendered on the screen. Register usage is -
3598 * a0 = pointer to console globals
3600 * d0 = cursor column
3601 * d1 = cursor row to draw the character
3602 * d7 = character number
3604 L(console_not_home):
3605 movel %a0@(Lconsole_struct_cur_column),%d0
3606 addql #1,%a0@(Lconsole_struct_cur_column)
3607 movel %a0@(Lconsole_struct_num_columns),%d1
3610 console_putc #'\n' /* recursion is OK! */
3612 movel %a0@(Lconsole_struct_cur_row),%d1
3615 * At this point we make a shift in register usage
3616 * a0 = address of pointer to font data (fbcon_font_desc)
3618 movel %pc@(L(console_font)),%a0
3619 movel %pc@(L(console_font_data)),%a1 /* Load fbcon_font_desc.data into a1 */
3620 andl #0x000000ff,%d7
3621 /* ASSERT: a0 = contents of Lconsole_font */
3622 mulul %a0@(FONT_DESC_HEIGHT),%d7 /* d7 = index into font data */
3623 addl %d7,%a1 /* a1 = points to char image */
3626 * At this point we make a shift in register usage
3627 * d0 = pixel coordinate, x
3628 * d1 = pixel coordinate, y
3629 * d2 = (bit 0) 1/0 for white/black (!) pixel on screen
3630 * d3 = font scan line data (8 pixels)
3631 * d6 = count down for the font's pixel width (8)
3632 * d7 = count down for the font's pixel count in height
3634 /* ASSERT: a0 = contents of Lconsole_font */
3635 mulul %a0@(FONT_DESC_WIDTH),%d0
3636 mulul %a0@(FONT_DESC_HEIGHT),%d1
3637 movel %a0@(FONT_DESC_HEIGHT),%d7 /* Load fbcon_font_desc.height into d7 */
3639 L(console_read_char_scanline):
3642 /* ASSERT: a0 = contents of Lconsole_font */
3643 movel %a0@(FONT_DESC_WIDTH),%d6 /* Load fbcon_font_desc.width into d6 */
3646 L(console_do_font_scanline):
3648 scsb %d2 /* convert 1 bit into a byte */
3649 console_plot_pixel %d0,%d1,%d2
3651 dbra %d6,L(console_do_font_scanline)
3653 /* ASSERT: a0 = contents of Lconsole_font */
3654 subl %a0@(FONT_DESC_WIDTH),%d0
3656 dbra %d7,L(console_read_char_scanline)
3659 func_return console_putc
3665 * d2 = (bit 0) 1/0 for white/black (!)
3666 * All registers are preserved
3668 func_start console_plot_pixel,%a0-%a1/%d0-%d4
3670 movel %pc@(L(mac_videobase)),%a1
3671 movel %pc@(L(mac_videodepth)),%d3
3674 mulul %pc@(L(mac_rowbytes)),%d1
3679 * d0 = x coord becomes byte offset into frame buffer
3681 * d2 = black or white (0/1)
3683 * d4 = temp of x (d0) for many bit depths
3688 movel %d0,%d4 /* we need the low order 3 bits! */
3693 eorb #7,%d4 /* reverse the x-coordinate w/ screen-bit # */
3697 jbra L(console_plot_pixel_exit)
3700 jbra L(console_plot_pixel_exit)
3705 movel %d0,%d4 /* we need the low order 2 bits! */
3710 eorb #3,%d4 /* reverse the x-coordinate w/ screen-bit # */
3717 jbra L(console_plot_pixel_exit)
3722 jbra L(console_plot_pixel_exit)
3727 movel %d0,%d4 /* we need the low order bit! */
3743 jbra L(console_plot_pixel_exit)
3752 jbra L(console_plot_pixel_exit)
3762 jbra L(console_plot_pixel_exit)
3765 jbra L(console_plot_pixel_exit)
3769 jbne L(console_plot_pixel_exit)
3776 jbra L(console_plot_pixel_exit)
3779 jbra L(console_plot_pixel_exit)
3781 L(console_plot_pixel_exit):
3782 func_return console_plot_pixel
3783 #endif /* CONSOLE */
3787 * This is some old code lying around. I don't believe
3788 * it's used or important anymore. My guess is it contributed
3789 * to getting to this point, but it's done for now.
3790 * It was still in the 2.1.77 head.S, so it's still here.
3791 * (And still not used!)
3794 moveml %a0/%d7,%sp@-
3798 .long 0xf0119f15 | ptestr #5,%a1@,#7,%a0
3807 lea %pc@(L(mmu)),%a0
3808 .long 0xf0106200 | pmove %psr,%a0@
3814 moveml %sp@+,%a0/%d7
3821 #if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || \
3822 defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3828 #if defined(CONSOLE)
3830 .long 0 /* cursor column */
3831 .long 0 /* cursor row */
3832 .long 0 /* max num columns */
3833 .long 0 /* max num rows */
3834 .long 0 /* left edge */
3835 .long 0 /* mac putc */
3837 .long 0 /* pointer to console font (struct font_desc) */
3838 L(console_font_data):
3839 .long 0 /* pointer to console font data */
3840 #endif /* CONSOLE */
3842 #if defined(MMU_PRINT)
3844 .long 0 /* valid flag */
3845 .long 0 /* start logical */
3846 .long 0 /* next logical */
3847 .long 0 /* start physical */
3848 .long 0 /* next physical */
3849 #endif /* MMU_PRINT */
3853 L(mmu_cached_pointer_tables):
3855 L(mmu_num_pointer_tables):
3857 L(phys_kernel_start):
3863 L(kernel_pgdir_ptr):
3868 #if defined (CONFIG_MVME147)
3869 M147_SCC_CTRL_A = 0xfffe3002
3870 M147_SCC_DATA_A = 0xfffe3003
3873 #if defined (CONFIG_MVME16x)
3874 M162_SCC_CTRL_A = 0xfff45005
3875 M167_CYCAR = 0xfff450ee
3876 M167_CYIER = 0xfff45011
3877 M167_CYLICR = 0xfff45026
3878 M167_CYTEOIR = 0xfff45085
3879 M167_CYTDR = 0xfff450f8
3880 M167_PCSCCTICR = 0xfff4201e
3881 M167_PCTPIACKR = 0xfff42025
3884 #if defined (CONFIG_BVME6000)
3885 BVME_SCC_CTRL_A = 0xffb0000b
3886 BVME_SCC_DATA_A = 0xffb0000f
3889 #if defined(CONFIG_MAC)
3900 #ifdef MAC_SERIAL_DEBUG
3903 #endif /* MAC_SERIAL_DEBUG */
3906 #if defined (CONFIG_APOLLO)
3912 #if defined(CONFIG_HP300)
3929 m68k_pgtable_cachemode:
3931 m68k_supervisor_cachemode:
3933 #if defined(CONFIG_MVME16x)
3935 .long 0,0,0,0,0,0,0,0
3937 #if defined(CONFIG_Q40)