Merge branch 'atmel'
[linux-2.6] / drivers / media / video / cx88 / cx88-tvaudio.c
1 /*
2
3     cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
4
5      (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
6      (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
7      (c) 2003 Gerd Knorr <kraxel@bytesex.org>
8
9     -----------------------------------------------------------------------
10
11     Lot of voodoo here.  Even the data sheet doesn't help to
12     understand what is going on here, the documentation for the audio
13     part of the cx2388x chip is *very* bad.
14
15     Some of this comes from party done linux driver sources I got from
16     [undocumented].
17
18     Some comes from the dscaler sources, one of the dscaler driver guy works
19     for Conexant ...
20
21     -----------------------------------------------------------------------
22
23     This program is free software; you can redistribute it and/or modify
24     it under the terms of the GNU General Public License as published by
25     the Free Software Foundation; either version 2 of the License, or
26     (at your option) any later version.
27
28     This program is distributed in the hope that it will be useful,
29     but WITHOUT ANY WARRANTY; without even the implied warranty of
30     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
31     GNU General Public License for more details.
32
33     You should have received a copy of the GNU General Public License
34     along with this program; if not, write to the Free Software
35     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
36 */
37
38 #include <linux/module.h>
39 #include <linux/moduleparam.h>
40 #include <linux/errno.h>
41 #include <linux/kernel.h>
42 #include <linux/slab.h>
43 #include <linux/mm.h>
44 #include <linux/poll.h>
45 #include <linux/pci.h>
46 #include <linux/signal.h>
47 #include <linux/ioport.h>
48 #include <linux/sched.h>
49 #include <linux/types.h>
50 #include <linux/interrupt.h>
51 #include <linux/vmalloc.h>
52 #include <linux/init.h>
53 #include <linux/smp_lock.h>
54 #include <linux/delay.h>
55 #include <linux/kthread.h>
56
57 #include "cx88.h"
58
59 static unsigned int audio_debug = 0;
60 module_param(audio_debug, int, 0644);
61 MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
62
63 #define dprintk(fmt, arg...)    if (audio_debug) \
64         printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
65
66 /* ----------------------------------------------------------- */
67
68 static char *aud_ctl_names[64] = {
69         [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",
70         [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",
71         [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",
72         [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",
73         [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",
74         [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",
75         [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",
76         [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",
77         [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",
78         [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",
79         [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",
80         [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",
81         [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",
82         [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",
83         [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",
84         [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",
85         [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",
86         [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",
87         [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",
88         [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",
89         [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",
90         [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",
91         [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",
92 };
93
94 struct rlist {
95         u32 reg;
96         u32 val;
97 };
98
99 static void set_audio_registers(struct cx88_core *core, const struct rlist *l)
100 {
101         int i;
102
103         for (i = 0; l[i].reg; i++) {
104                 switch (l[i].reg) {
105                 case AUD_PDF_DDS_CNST_BYTE2:
106                 case AUD_PDF_DDS_CNST_BYTE1:
107                 case AUD_PDF_DDS_CNST_BYTE0:
108                 case AUD_QAM_MODE:
109                 case AUD_PHACC_FREQ_8MSB:
110                 case AUD_PHACC_FREQ_8LSB:
111                         cx_writeb(l[i].reg, l[i].val);
112                         break;
113                 default:
114                         cx_write(l[i].reg, l[i].val);
115                         break;
116                 }
117         }
118 }
119
120 static void set_audio_start(struct cx88_core *core, u32 mode)
121 {
122         // mute
123         cx_write(AUD_VOL_CTL, (1 << 6));
124
125         // start programming
126         cx_write(MO_AUD_DMACNTRL, 0x0000);
127         msleep(100);
128         //cx_write(AUD_CTL, 0x0000);
129         cx_write(AUD_INIT, mode);
130         cx_write(AUD_INIT_LD, 0x0001);
131         cx_write(AUD_SOFT_RESET, 0x0001);
132 }
133
134 static void set_audio_finish(struct cx88_core *core, u32 ctl)
135 {
136         u32 volume;
137
138         if (cx88_boards[core->board].blackbird) {
139                 // sets sound input from external adc
140                 cx_set(AUD_CTL, EN_I2SIN_ENABLE);
141                 //cx_write(AUD_I2SINPUTCNTL, 0);
142                 cx_write(AUD_I2SINPUTCNTL, 4);
143                 cx_write(AUD_BAUDRATE, 1);
144                 // 'pass-thru mode': this enables the i2s output to the mpeg encoder
145                 cx_set(AUD_CTL, EN_I2SOUT_ENABLE);
146                 cx_write(AUD_I2SOUTPUTCNTL, 1);
147                 cx_write(AUD_I2SCNTL, 0);
148                 //cx_write(AUD_APB_IN_RATE_ADJ, 0);
149         } else {
150                 ctl |= EN_DAC_ENABLE;
151                 cx_write(AUD_CTL, ctl);
152         }
153
154         /* finish programming */
155         cx_write(AUD_SOFT_RESET, 0x0000);
156         cx_write(MO_AUD_DMACNTRL, 0x0003);
157
158         /* unmute */
159         volume = cx_sread(SHADOW_AUD_VOL_CTL);
160         cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);
161 }
162
163 /* ----------------------------------------------------------- */
164
165 static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,
166                                     u32 mode)
167 {
168         static const struct rlist btsc[] = {
169                 {AUD_AFE_12DB_EN, 0x00000001},
170                 {AUD_OUT1_SEL, 0x00000013},
171                 {AUD_OUT1_SHIFT, 0x00000000},
172                 {AUD_POLY0_DDS_CONSTANT, 0x0012010c},
173                 {AUD_DMD_RA_DDS, 0x00c3e7aa},
174                 {AUD_DBX_IN_GAIN, 0x00004734},
175                 {AUD_DBX_WBE_GAIN, 0x00004640},
176                 {AUD_DBX_SE_GAIN, 0x00008d31},
177                 {AUD_DCOC_0_SRC, 0x0000001a},
178                 {AUD_IIR1_4_SEL, 0x00000021},
179                 {AUD_DCOC_PASS_IN, 0x00000003},
180                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
181                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
182                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
183                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
184                 {AUD_DN0_FREQ, 0x0000283b},
185                 {AUD_DN2_SRC_SEL, 0x00000008},
186                 {AUD_DN2_FREQ, 0x00003000},
187                 {AUD_DN2_AFC, 0x00000002},
188                 {AUD_DN2_SHFT, 0x00000000},
189                 {AUD_IIR2_2_SEL, 0x00000020},
190                 {AUD_IIR2_2_SHIFT, 0x00000000},
191                 {AUD_IIR2_3_SEL, 0x0000001f},
192                 {AUD_IIR2_3_SHIFT, 0x00000000},
193                 {AUD_CRDC1_SRC_SEL, 0x000003ce},
194                 {AUD_CRDC1_SHIFT, 0x00000000},
195                 {AUD_CORDIC_SHIFT_1, 0x00000007},
196                 {AUD_DCOC_1_SRC, 0x0000001b},
197                 {AUD_DCOC1_SHIFT, 0x00000000},
198                 {AUD_RDSI_SEL, 0x00000008},
199                 {AUD_RDSQ_SEL, 0x00000008},
200                 {AUD_RDSI_SHIFT, 0x00000000},
201                 {AUD_RDSQ_SHIFT, 0x00000000},
202                 {AUD_POLYPH80SCALEFAC, 0x00000003},
203                 { /* end of list */ },
204         };
205         static const struct rlist btsc_sap[] = {
206                 {AUD_AFE_12DB_EN, 0x00000001},
207                 {AUD_DBX_IN_GAIN, 0x00007200},
208                 {AUD_DBX_WBE_GAIN, 0x00006200},
209                 {AUD_DBX_SE_GAIN, 0x00006200},
210                 {AUD_IIR1_1_SEL, 0x00000000},
211                 {AUD_IIR1_3_SEL, 0x00000001},
212                 {AUD_DN1_SRC_SEL, 0x00000007},
213                 {AUD_IIR1_4_SHIFT, 0x00000006},
214                 {AUD_IIR2_1_SHIFT, 0x00000000},
215                 {AUD_IIR2_2_SHIFT, 0x00000000},
216                 {AUD_IIR3_0_SHIFT, 0x00000000},
217                 {AUD_IIR3_1_SHIFT, 0x00000000},
218                 {AUD_IIR3_0_SEL, 0x0000000d},
219                 {AUD_IIR3_1_SEL, 0x0000000e},
220                 {AUD_DEEMPH1_SRC_SEL, 0x00000014},
221                 {AUD_DEEMPH1_SHIFT, 0x00000000},
222                 {AUD_DEEMPH1_G0, 0x00004000},
223                 {AUD_DEEMPH1_A0, 0x00000000},
224                 {AUD_DEEMPH1_B0, 0x00000000},
225                 {AUD_DEEMPH1_A1, 0x00000000},
226                 {AUD_DEEMPH1_B1, 0x00000000},
227                 {AUD_OUT0_SEL, 0x0000003f},
228                 {AUD_OUT1_SEL, 0x0000003f},
229                 {AUD_DN1_AFC, 0x00000002},
230                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
231                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
232                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
233                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
234                 {AUD_IIR1_0_SEL, 0x0000001d},
235                 {AUD_IIR1_2_SEL, 0x0000001e},
236                 {AUD_IIR2_1_SEL, 0x00000002},
237                 {AUD_IIR2_2_SEL, 0x00000004},
238                 {AUD_IIR3_2_SEL, 0x0000000f},
239                 {AUD_DCOC2_SHIFT, 0x00000001},
240                 {AUD_IIR3_2_SHIFT, 0x00000001},
241                 {AUD_DEEMPH0_SRC_SEL, 0x00000014},
242                 {AUD_CORDIC_SHIFT_1, 0x00000006},
243                 {AUD_POLY0_DDS_CONSTANT, 0x000e4db2},
244                 {AUD_DMD_RA_DDS, 0x00f696e6},
245                 {AUD_IIR2_3_SEL, 0x00000025},
246                 {AUD_IIR1_4_SEL, 0x00000021},
247                 {AUD_DN1_FREQ, 0x0000c965},
248                 {AUD_DCOC_PASS_IN, 0x00000003},
249                 {AUD_DCOC_0_SRC, 0x0000001a},
250                 {AUD_DCOC_1_SRC, 0x0000001b},
251                 {AUD_DCOC1_SHIFT, 0x00000000},
252                 {AUD_RDSI_SEL, 0x00000009},
253                 {AUD_RDSQ_SEL, 0x00000009},
254                 {AUD_RDSI_SHIFT, 0x00000000},
255                 {AUD_RDSQ_SHIFT, 0x00000000},
256                 {AUD_POLYPH80SCALEFAC, 0x00000003},
257                 { /* end of list */ },
258         };
259
260         mode |= EN_FMRADIO_EN_RDS;
261
262         if (sap) {
263                 dprintk("%s SAP (status: unknown)\n", __FUNCTION__);
264                 set_audio_start(core, SEL_SAP);
265                 set_audio_registers(core, btsc_sap);
266                 set_audio_finish(core, mode);
267         } else {
268                 dprintk("%s (status: known-good)\n", __FUNCTION__);
269                 set_audio_start(core, SEL_BTSC);
270                 set_audio_registers(core, btsc);
271                 set_audio_finish(core, mode);
272         }
273 }
274
275 static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)
276 {
277         static const struct rlist nicam_l[] = {
278                 {AUD_AFE_12DB_EN, 0x00000001},
279                 {AUD_RATE_ADJ1, 0x00000060},
280                 {AUD_RATE_ADJ2, 0x000000F9},
281                 {AUD_RATE_ADJ3, 0x000001CC},
282                 {AUD_RATE_ADJ4, 0x000002B3},
283                 {AUD_RATE_ADJ5, 0x00000726},
284                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
285                 {AUD_DEEMPHDENOM2_R, 0x00000000},
286                 {AUD_ERRLOGPERIOD_R, 0x00000064},
287                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
288                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
289                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
290                 {AUD_POLYPH80SCALEFAC, 0x00000003},
291                 {AUD_DMD_RA_DDS, 0x00C00000},
292                 {AUD_PLL_INT, 0x0000001E},
293                 {AUD_PLL_DDS, 0x00000000},
294                 {AUD_PLL_FRAC, 0x0000E542},
295                 {AUD_START_TIMER, 0x00000000},
296                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
297                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
298                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
299                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
300                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
301                 {AUD_QAM_MODE, 0x05},
302                 {AUD_PHACC_FREQ_8MSB, 0x34},
303                 {AUD_PHACC_FREQ_8LSB, 0x4C},
304                 {AUD_DEEMPHGAIN_R, 0x00006680},
305                 {AUD_RATE_THRES_DMD, 0x000000C0},
306                 { /* end of list */ },
307         };
308
309         static const struct rlist nicam_bgdki_common[] = {
310                 {AUD_AFE_12DB_EN, 0x00000001},
311                 {AUD_RATE_ADJ1, 0x00000010},
312                 {AUD_RATE_ADJ2, 0x00000040},
313                 {AUD_RATE_ADJ3, 0x00000100},
314                 {AUD_RATE_ADJ4, 0x00000400},
315                 {AUD_RATE_ADJ5, 0x00001000},
316                 //{ AUD_DMD_RA_DDS,        0x00c0d5ce },
317                 {AUD_ERRLOGPERIOD_R, 0x00000fff},
318                 {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},
319                 {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},
320                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},
321                 {AUD_POLYPH80SCALEFAC, 0x00000003},
322                 {AUD_DEEMPHGAIN_R, 0x000023c2},
323                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
324                 {AUD_DEEMPHNUMER2_R, 0x0003023e},
325                 {AUD_DEEMPHDENOM1_R, 0x0000f3d0},
326                 {AUD_DEEMPHDENOM2_R, 0x00000000},
327                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
328                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
329                 {AUD_QAM_MODE, 0x05},
330                 { /* end of list */ },
331         };
332
333         static const struct rlist nicam_i[] = {
334                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
335                 {AUD_PHACC_FREQ_8MSB, 0x3a},
336                 {AUD_PHACC_FREQ_8LSB, 0x93},
337                 { /* end of list */ },
338         };
339
340         static const struct rlist nicam_default[] = {
341                 {AUD_PDF_DDS_CNST_BYTE0, 0x16},
342                 {AUD_PHACC_FREQ_8MSB, 0x34},
343                 {AUD_PHACC_FREQ_8LSB, 0x4c},
344                 { /* end of list */ },
345         };
346
347         set_audio_start(core,SEL_NICAM);
348         switch (core->tvaudio) {
349         case WW_L:
350                 dprintk("%s SECAM-L NICAM (status: devel)\n", __FUNCTION__);
351                 set_audio_registers(core, nicam_l);
352                 break;
353         case WW_I:
354                 dprintk("%s PAL-I NICAM (status: devel)\n", __FUNCTION__);
355                 set_audio_registers(core, nicam_bgdki_common);
356                 set_audio_registers(core, nicam_i);
357                 break;
358         default:
359                 dprintk("%s PAL-BGDK NICAM (status: unknown)\n", __FUNCTION__);
360                 set_audio_registers(core, nicam_bgdki_common);
361                 set_audio_registers(core, nicam_default);
362                 break;
363         };
364
365         mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;
366         set_audio_finish(core, mode);
367 }
368
369 static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
370 {
371         static const struct rlist a2_bgdk_common[] = {
372                 {AUD_ERRLOGPERIOD_R, 0x00000064},
373                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
374                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
375                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
376                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
377                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
378                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
379                 {AUD_QAM_MODE, 0x05},
380                 {AUD_PHACC_FREQ_8MSB, 0x34},
381                 {AUD_PHACC_FREQ_8LSB, 0x4c},
382                 {AUD_RATE_ADJ1, 0x00000100},
383                 {AUD_RATE_ADJ2, 0x00000200},
384                 {AUD_RATE_ADJ3, 0x00000300},
385                 {AUD_RATE_ADJ4, 0x00000400},
386                 {AUD_RATE_ADJ5, 0x00000500},
387                 {AUD_THR_FR, 0x00000000},
388                 {AAGC_HYST, 0x0000001a},
389                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
390                 {AUD_PILOT_BQD_1_K1, 0x00551340},
391                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
392                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
393                 {AUD_PILOT_BQD_1_K4, 0x00400000},
394                 {AUD_PILOT_BQD_2_K0, 0x00040000},
395                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
396                 {AUD_PILOT_BQD_2_K2, 0x00400000},
397                 {AUD_PILOT_BQD_2_K3, 0x00000000},
398                 {AUD_PILOT_BQD_2_K4, 0x00000000},
399                 {AUD_MODE_CHG_TIMER, 0x00000040},
400                 {AUD_AFE_12DB_EN, 0x00000001},
401                 {AUD_CORDIC_SHIFT_0, 0x00000007},
402                 {AUD_CORDIC_SHIFT_1, 0x00000007},
403                 {AUD_DEEMPH0_G0, 0x00000380},
404                 {AUD_DEEMPH1_G0, 0x00000380},
405                 {AUD_DCOC_0_SRC, 0x0000001a},
406                 {AUD_DCOC0_SHIFT, 0x00000000},
407                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
408                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
409                 {AUD_DCOC_PASS_IN, 0x00000003},
410                 {AUD_IIR3_0_SEL, 0x00000021},
411                 {AUD_DN2_AFC, 0x00000002},
412                 {AUD_DCOC_1_SRC, 0x0000001b},
413                 {AUD_DCOC1_SHIFT, 0x00000000},
414                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
415                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
416                 {AUD_IIR3_1_SEL, 0x00000023},
417                 {AUD_RDSI_SEL, 0x00000017},
418                 {AUD_RDSI_SHIFT, 0x00000000},
419                 {AUD_RDSQ_SEL, 0x00000017},
420                 {AUD_RDSQ_SHIFT, 0x00000000},
421                 {AUD_PLL_INT, 0x0000001e},
422                 {AUD_PLL_DDS, 0x00000000},
423                 {AUD_PLL_FRAC, 0x0000e542},
424                 {AUD_POLYPH80SCALEFAC, 0x00000001},
425                 {AUD_START_TIMER, 0x00000000},
426                 { /* end of list */ },
427         };
428
429         static const struct rlist a2_bg[] = {
430                 {AUD_DMD_RA_DDS, 0x002a4f2f},
431                 {AUD_C1_UP_THR, 0x00007000},
432                 {AUD_C1_LO_THR, 0x00005400},
433                 {AUD_C2_UP_THR, 0x00005400},
434                 {AUD_C2_LO_THR, 0x00003000},
435                 { /* end of list */ },
436         };
437
438         static const struct rlist a2_dk[] = {
439                 {AUD_DMD_RA_DDS, 0x002a4f2f},
440                 {AUD_C1_UP_THR, 0x00007000},
441                 {AUD_C1_LO_THR, 0x00005400},
442                 {AUD_C2_UP_THR, 0x00005400},
443                 {AUD_C2_LO_THR, 0x00003000},
444                 {AUD_DN0_FREQ, 0x00003a1c},
445                 {AUD_DN2_FREQ, 0x0000d2e0},
446                 { /* end of list */ },
447         };
448
449         static const struct rlist a1_i[] = {
450                 {AUD_ERRLOGPERIOD_R, 0x00000064},
451                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
452                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
453                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
454                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
455                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
456                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
457                 {AUD_QAM_MODE, 0x05},
458                 {AUD_PHACC_FREQ_8MSB, 0x3a},
459                 {AUD_PHACC_FREQ_8LSB, 0x93},
460                 {AUD_DMD_RA_DDS, 0x002a4f2f},
461                 {AUD_PLL_INT, 0x0000001e},
462                 {AUD_PLL_DDS, 0x00000004},
463                 {AUD_PLL_FRAC, 0x0000e542},
464                 {AUD_RATE_ADJ1, 0x00000100},
465                 {AUD_RATE_ADJ2, 0x00000200},
466                 {AUD_RATE_ADJ3, 0x00000300},
467                 {AUD_RATE_ADJ4, 0x00000400},
468                 {AUD_RATE_ADJ5, 0x00000500},
469                 {AUD_THR_FR, 0x00000000},
470                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
471                 {AUD_PILOT_BQD_1_K1, 0x00551340},
472                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
473                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
474                 {AUD_PILOT_BQD_1_K4, 0x00400000},
475                 {AUD_PILOT_BQD_2_K0, 0x00040000},
476                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
477                 {AUD_PILOT_BQD_2_K2, 0x00400000},
478                 {AUD_PILOT_BQD_2_K3, 0x00000000},
479                 {AUD_PILOT_BQD_2_K4, 0x00000000},
480                 {AUD_MODE_CHG_TIMER, 0x00000060},
481                 {AUD_AFE_12DB_EN, 0x00000001},
482                 {AAGC_HYST, 0x0000000a},
483                 {AUD_CORDIC_SHIFT_0, 0x00000007},
484                 {AUD_CORDIC_SHIFT_1, 0x00000007},
485                 {AUD_C1_UP_THR, 0x00007000},
486                 {AUD_C1_LO_THR, 0x00005400},
487                 {AUD_C2_UP_THR, 0x00005400},
488                 {AUD_C2_LO_THR, 0x00003000},
489                 {AUD_DCOC_0_SRC, 0x0000001a},
490                 {AUD_DCOC0_SHIFT, 0x00000000},
491                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
492                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
493                 {AUD_DCOC_PASS_IN, 0x00000003},
494                 {AUD_IIR3_0_SEL, 0x00000021},
495                 {AUD_DN2_AFC, 0x00000002},
496                 {AUD_DCOC_1_SRC, 0x0000001b},
497                 {AUD_DCOC1_SHIFT, 0x00000000},
498                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
499                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
500                 {AUD_IIR3_1_SEL, 0x00000023},
501                 {AUD_DN0_FREQ, 0x000035a3},
502                 {AUD_DN2_FREQ, 0x000029c7},
503                 {AUD_CRDC0_SRC_SEL, 0x00000511},
504                 {AUD_IIR1_0_SEL, 0x00000001},
505                 {AUD_IIR1_1_SEL, 0x00000000},
506                 {AUD_IIR3_2_SEL, 0x00000003},
507                 {AUD_IIR3_2_SHIFT, 0x00000000},
508                 {AUD_IIR3_0_SEL, 0x00000002},
509                 {AUD_IIR2_0_SEL, 0x00000021},
510                 {AUD_IIR2_0_SHIFT, 0x00000002},
511                 {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
512                 {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
513                 {AUD_POLYPH80SCALEFAC, 0x00000001},
514                 {AUD_START_TIMER, 0x00000000},
515                 { /* end of list */ },
516         };
517
518         static const struct rlist am_l[] = {
519                 {AUD_ERRLOGPERIOD_R, 0x00000064},
520                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
521                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
522                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
523                 {AUD_PDF_DDS_CNST_BYTE2, 0x48},
524                 {AUD_PDF_DDS_CNST_BYTE1, 0x3D},
525                 {AUD_QAM_MODE, 0x00},
526                 {AUD_PDF_DDS_CNST_BYTE0, 0xf5},
527                 {AUD_PHACC_FREQ_8MSB, 0x3a},
528                 {AUD_PHACC_FREQ_8LSB, 0x4a},
529                 {AUD_DEEMPHGAIN_R, 0x00006680},
530                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
531                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
532                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
533                 {AUD_DEEMPHDENOM2_R, 0x00000000},
534                 {AUD_FM_MODE_ENABLE, 0x00000007},
535                 {AUD_POLYPH80SCALEFAC, 0x00000003},
536                 {AUD_AFE_12DB_EN, 0x00000001},
537                 {AAGC_GAIN, 0x00000000},
538                 {AAGC_HYST, 0x00000018},
539                 {AAGC_DEF, 0x00000020},
540                 {AUD_DN0_FREQ, 0x00000000},
541                 {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
542                 {AUD_DCOC_0_SRC, 0x00000021},
543                 {AUD_IIR1_0_SEL, 0x00000000},
544                 {AUD_IIR1_0_SHIFT, 0x00000007},
545                 {AUD_IIR1_1_SEL, 0x00000002},
546                 {AUD_IIR1_1_SHIFT, 0x00000000},
547                 {AUD_DCOC_1_SRC, 0x00000003},
548                 {AUD_DCOC1_SHIFT, 0x00000000},
549                 {AUD_DCOC_PASS_IN, 0x00000000},
550                 {AUD_IIR1_2_SEL, 0x00000023},
551                 {AUD_IIR1_2_SHIFT, 0x00000000},
552                 {AUD_IIR1_3_SEL, 0x00000004},
553                 {AUD_IIR1_3_SHIFT, 0x00000007},
554                 {AUD_IIR1_4_SEL, 0x00000005},
555                 {AUD_IIR1_4_SHIFT, 0x00000007},
556                 {AUD_IIR3_0_SEL, 0x00000007},
557                 {AUD_IIR3_0_SHIFT, 0x00000000},
558                 {AUD_DEEMPH0_SRC_SEL, 0x00000011},
559                 {AUD_DEEMPH0_SHIFT, 0x00000000},
560                 {AUD_DEEMPH0_G0, 0x00007000},
561                 {AUD_DEEMPH0_A0, 0x00000000},
562                 {AUD_DEEMPH0_B0, 0x00000000},
563                 {AUD_DEEMPH0_A1, 0x00000000},
564                 {AUD_DEEMPH0_B1, 0x00000000},
565                 {AUD_DEEMPH1_SRC_SEL, 0x00000011},
566                 {AUD_DEEMPH1_SHIFT, 0x00000000},
567                 {AUD_DEEMPH1_G0, 0x00007000},
568                 {AUD_DEEMPH1_A0, 0x00000000},
569                 {AUD_DEEMPH1_B0, 0x00000000},
570                 {AUD_DEEMPH1_A1, 0x00000000},
571                 {AUD_DEEMPH1_B1, 0x00000000},
572                 {AUD_OUT0_SEL, 0x0000003F},
573                 {AUD_OUT1_SEL, 0x0000003F},
574                 {AUD_DMD_RA_DDS, 0x00F5C285},
575                 {AUD_PLL_INT, 0x0000001E},
576                 {AUD_PLL_DDS, 0x00000000},
577                 {AUD_PLL_FRAC, 0x0000E542},
578                 {AUD_RATE_ADJ1, 0x00000100},
579                 {AUD_RATE_ADJ2, 0x00000200},
580                 {AUD_RATE_ADJ3, 0x00000300},
581                 {AUD_RATE_ADJ4, 0x00000400},
582                 {AUD_RATE_ADJ5, 0x00000500},
583                 {AUD_RATE_THRES_DMD, 0x000000C0},
584                 { /* end of list */ },
585         };
586
587         static const struct rlist a2_deemph50[] = {
588                 {AUD_DEEMPH0_G0, 0x00000380},
589                 {AUD_DEEMPH1_G0, 0x00000380},
590                 {AUD_DEEMPHGAIN_R, 0x000011e1},
591                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
592                 {AUD_DEEMPHNUMER2_R, 0x0003023c},
593                 { /* end of list */ },
594         };
595
596         set_audio_start(core, SEL_A2);
597         switch (core->tvaudio) {
598         case WW_BG:
599                 dprintk("%s PAL-BG A1/2 (status: known-good)\n", __FUNCTION__);
600                 set_audio_registers(core, a2_bgdk_common);
601                 set_audio_registers(core, a2_bg);
602                 set_audio_registers(core, a2_deemph50);
603                 break;
604         case WW_DK:
605                 dprintk("%s PAL-DK A1/2 (status: known-good)\n", __FUNCTION__);
606                 set_audio_registers(core, a2_bgdk_common);
607                 set_audio_registers(core, a2_dk);
608                 set_audio_registers(core, a2_deemph50);
609                 break;
610         case WW_I:
611                 dprintk("%s PAL-I A1 (status: known-good)\n", __FUNCTION__);
612                 set_audio_registers(core, a1_i);
613                 set_audio_registers(core, a2_deemph50);
614                 break;
615         case WW_L:
616                 dprintk("%s AM-L (status: devel)\n", __FUNCTION__);
617                 set_audio_registers(core, am_l);
618                 break;
619         default:
620                 dprintk("%s Warning: wrong value\n", __FUNCTION__);
621                 return;
622                 break;
623         };
624
625         mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
626         set_audio_finish(core, mode);
627 }
628
629 static void set_audio_standard_EIAJ(struct cx88_core *core)
630 {
631         static const struct rlist eiaj[] = {
632                 /* TODO: eiaj register settings are not there yet ... */
633
634                 { /* end of list */ },
635         };
636         dprintk("%s (status: unknown)\n", __FUNCTION__);
637
638         set_audio_start(core, SEL_EIAJ);
639         set_audio_registers(core, eiaj);
640         set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
641 }
642
643 static void set_audio_standard_FM(struct cx88_core *core,
644                                   enum cx88_deemph_type deemph)
645 {
646         static const struct rlist fm_deemph_50[] = {
647                 {AUD_DEEMPH0_G0, 0x0C45},
648                 {AUD_DEEMPH0_A0, 0x6262},
649                 {AUD_DEEMPH0_B0, 0x1C29},
650                 {AUD_DEEMPH0_A1, 0x3FC66},
651                 {AUD_DEEMPH0_B1, 0x399A},
652
653                 {AUD_DEEMPH1_G0, 0x0D80},
654                 {AUD_DEEMPH1_A0, 0x6262},
655                 {AUD_DEEMPH1_B0, 0x1C29},
656                 {AUD_DEEMPH1_A1, 0x3FC66},
657                 {AUD_DEEMPH1_B1, 0x399A},
658
659                 {AUD_POLYPH80SCALEFAC, 0x0003},
660                 { /* end of list */ },
661         };
662         static const struct rlist fm_deemph_75[] = {
663                 {AUD_DEEMPH0_G0, 0x091B},
664                 {AUD_DEEMPH0_A0, 0x6B68},
665                 {AUD_DEEMPH0_B0, 0x11EC},
666                 {AUD_DEEMPH0_A1, 0x3FC66},
667                 {AUD_DEEMPH0_B1, 0x399A},
668
669                 {AUD_DEEMPH1_G0, 0x0AA0},
670                 {AUD_DEEMPH1_A0, 0x6B68},
671                 {AUD_DEEMPH1_B0, 0x11EC},
672                 {AUD_DEEMPH1_A1, 0x3FC66},
673                 {AUD_DEEMPH1_B1, 0x399A},
674
675                 {AUD_POLYPH80SCALEFAC, 0x0003},
676                 { /* end of list */ },
677         };
678
679         /* It is enough to leave default values? */
680         static const struct rlist fm_no_deemph[] = {
681
682                 {AUD_POLYPH80SCALEFAC, 0x0003},
683                 { /* end of list */ },
684         };
685
686         dprintk("%s (status: unknown)\n", __FUNCTION__);
687         set_audio_start(core, SEL_FMRADIO);
688
689         switch (deemph) {
690         case FM_NO_DEEMPH:
691                 set_audio_registers(core, fm_no_deemph);
692                 break;
693
694         case FM_DEEMPH_50:
695                 set_audio_registers(core, fm_deemph_50);
696                 break;
697
698         case FM_DEEMPH_75:
699                 set_audio_registers(core, fm_deemph_75);
700                 break;
701         }
702
703         set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
704 }
705
706 /* ----------------------------------------------------------- */
707
708 int cx88_detect_nicam(struct cx88_core *core)
709 {
710         int i, j = 0;
711
712         dprintk("start nicam autodetect.\n");
713
714         for (i = 0; i < 6; i++) {
715                 /* if bit1=1 then nicam is detected */
716                 j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);
717
718                 /* 3x detected: absolutly sure now */
719                 if (j == 3) {
720                         dprintk("nicam is detected.\n");
721                         return 1;
722                 }
723
724                 /* wait a little bit for next reading status */
725                 msleep(10);
726         }
727
728         dprintk("nicam is not detected.\n");
729         return 0;
730 }
731
732 void cx88_set_tvaudio(struct cx88_core *core)
733 {
734         switch (core->tvaudio) {
735         case WW_BTSC:
736                 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
737                 break;
738         case WW_BG:
739         case WW_DK:
740         case WW_I:
741         case WW_L:
742                 /* prepare all dsp registers */
743                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
744
745                 /* set nicam mode - otherwise
746                    AUD_NICAM_STATUS2 contains wrong values */
747                 set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO);
748                 if (0 == cx88_detect_nicam(core)) {
749                         /* fall back to fm / am mono */
750                         set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
751                         core->use_nicam = 0;
752                 } else {
753                         core->use_nicam = 1;
754                 }
755                 break;
756         case WW_EIAJ:
757                 set_audio_standard_EIAJ(core);
758                 break;
759         case WW_FM:
760                 set_audio_standard_FM(core, FM_NO_DEEMPH);
761                 break;
762         case WW_NONE:
763         default:
764                 printk("%s/0: unknown tv audio mode [%d]\n",
765                        core->name, core->tvaudio);
766                 break;
767         }
768         return;
769 }
770
771 void cx88_newstation(struct cx88_core *core)
772 {
773         core->audiomode_manual = UNSET;
774 }
775
776 void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
777 {
778         static char *m[] = { "stereo", "dual mono", "mono", "sap" };
779         static char *p[] = { "no pilot", "pilot c1", "pilot c2", "?" };
780         u32 reg, mode, pilot;
781
782         reg = cx_read(AUD_STATUS);
783         mode = reg & 0x03;
784         pilot = (reg >> 2) & 0x03;
785
786         if (core->astat != reg)
787                 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
788                         reg, m[mode], p[pilot],
789                         aud_ctl_names[cx_read(AUD_CTL) & 63]);
790         core->astat = reg;
791
792 /* TODO
793        Reading from AUD_STATUS is not enough
794        for auto-detecting sap/dual-fm/nicam.
795        Add some code here later.
796 */
797
798 # if 0
799         t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP |
800             V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
801         t->rxsubchans = V4L2_TUNER_SUB_MONO;
802         t->audmode = V4L2_TUNER_MODE_MONO;
803
804         switch (core->tvaudio) {
805         case WW_BTSC:
806                 t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP;
807                 t->rxsubchans = V4L2_TUNER_SUB_STEREO;
808                 if (1 == pilot) {
809                         /* SAP */
810                         t->rxsubchans |= V4L2_TUNER_SUB_SAP;
811                 }
812                 break;
813         case WW_A2_BG:
814         case WW_A2_DK:
815         case WW_A2_M:
816                 if (1 == pilot) {
817                         /* stereo */
818                         t->rxsubchans =
819                             V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;
820                         if (0 == mode)
821                                 t->audmode = V4L2_TUNER_MODE_STEREO;
822                 }
823                 if (2 == pilot) {
824                         /* dual language -- FIXME */
825                         t->rxsubchans =
826                             V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
827                         t->audmode = V4L2_TUNER_MODE_LANG1;
828                 }
829                 break;
830         case WW_NICAM_BGDKL:
831                 if (0 == mode) {
832                         t->audmode = V4L2_TUNER_MODE_STEREO;
833                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
834                 }
835                 break;
836         case WW_SYSTEM_L_AM:
837                 if (0x0 == mode && !(cx_read(AUD_INIT) & 0x04)) {
838                         t->audmode = V4L2_TUNER_MODE_STEREO;
839                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
840                 }
841                 break;
842         default:
843                 /* nothing */
844                 break;
845         }
846 # endif
847         return;
848 }
849
850 void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
851 {
852         u32 ctl = UNSET;
853         u32 mask = UNSET;
854
855         if (manual) {
856                 core->audiomode_manual = mode;
857         } else {
858                 if (UNSET != core->audiomode_manual)
859                         return;
860         }
861         core->audiomode_current = mode;
862
863         switch (core->tvaudio) {
864         case WW_BTSC:
865                 switch (mode) {
866                 case V4L2_TUNER_MODE_MONO:
867                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);
868                         break;
869                 case V4L2_TUNER_MODE_LANG1:
870                         set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
871                         break;
872                 case V4L2_TUNER_MODE_LANG2:
873                         set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);
874                         break;
875                 case V4L2_TUNER_MODE_STEREO:
876                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);
877                         break;
878                 }
879                 break;
880         case WW_BG:
881         case WW_DK:
882         case WW_I:
883         case WW_L:
884                 if (1 == core->use_nicam) {
885                         switch (mode) {
886                         case V4L2_TUNER_MODE_MONO:
887                         case V4L2_TUNER_MODE_LANG1:
888                                 set_audio_standard_NICAM(core,
889                                                          EN_NICAM_FORCE_MONO1);
890                                 break;
891                         case V4L2_TUNER_MODE_LANG2:
892                                 set_audio_standard_NICAM(core,
893                                                          EN_NICAM_FORCE_MONO2);
894                                 break;
895                         case V4L2_TUNER_MODE_STEREO:
896                                 set_audio_standard_NICAM(core,
897                                                          EN_NICAM_FORCE_STEREO);
898                                 break;
899                         }
900                 } else {
901                         if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {
902                                 /* fall back to fm / am mono */
903                                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
904                         } else {
905                                 /* TODO: Add A2 autodection */
906                                 switch (mode) {
907                                 case V4L2_TUNER_MODE_MONO:
908                                 case V4L2_TUNER_MODE_LANG1:
909                                         set_audio_standard_A2(core,
910                                                               EN_A2_FORCE_MONO1);
911                                         break;
912                                 case V4L2_TUNER_MODE_LANG2:
913                                         set_audio_standard_A2(core,
914                                                               EN_A2_FORCE_MONO2);
915                                         break;
916                                 case V4L2_TUNER_MODE_STEREO:
917                                         set_audio_standard_A2(core,
918                                                               EN_A2_FORCE_STEREO);
919                                         break;
920                                 }
921                         }
922                 }
923                 break;
924         case WW_FM:
925                 switch (mode) {
926                 case V4L2_TUNER_MODE_MONO:
927                         ctl = EN_FMRADIO_FORCE_MONO;
928                         mask = 0x3f;
929                         break;
930                 case V4L2_TUNER_MODE_STEREO:
931                         ctl = EN_FMRADIO_AUTO_STEREO;
932                         mask = 0x3f;
933                         break;
934                 }
935                 break;
936         }
937
938         if (UNSET != ctl) {
939                 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "
940                         "[status=0x%x,ctl=0x%x,vol=0x%x]\n",
941                         mask, ctl, cx_read(AUD_STATUS),
942                         cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));
943                 cx_andor(AUD_CTL, mask, ctl);
944         }
945         return;
946 }
947
948 int cx88_audio_thread(void *data)
949 {
950         struct cx88_core *core = data;
951         struct v4l2_tuner t;
952         u32 mode = 0;
953
954         dprintk("cx88: tvaudio thread started\n");
955         for (;;) {
956                 msleep_interruptible(1000);
957                 if (kthread_should_stop())
958                         break;
959
960                 /* just monitor the audio status for now ... */
961                 memset(&t, 0, sizeof(t));
962                 cx88_get_stereo(core, &t);
963
964                 if (UNSET != core->audiomode_manual)
965                         /* manually set, don't do anything. */
966                         continue;
967
968                 /* monitor signal */
969                 if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)
970                         mode = V4L2_TUNER_MODE_STEREO;
971                 else
972                         mode = V4L2_TUNER_MODE_MONO;
973                 if (mode == core->audiomode_current)
974                         continue;
975
976                 /* automatically switch to best available mode */
977                 cx88_set_stereo(core, mode, 0);
978         }
979
980         dprintk("cx88: tvaudio thread exiting\n");
981         return 0;
982 }
983
984 /* ----------------------------------------------------------- */
985
986 EXPORT_SYMBOL(cx88_set_tvaudio);
987 EXPORT_SYMBOL(cx88_newstation);
988 EXPORT_SYMBOL(cx88_set_stereo);
989 EXPORT_SYMBOL(cx88_get_stereo);
990 EXPORT_SYMBOL(cx88_audio_thread);
991
992 /*
993  * Local variables:
994  * c-basic-offset: 8
995  * End:
996  * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
997  */