2 * Copyright (C) 2006-2007 PA Semi, Inc
4 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23 #include <linux/interrupt.h>
24 #include <linux/dmaengine.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <asm/dma-mapping.h>
30 #include <linux/skbuff.h>
33 #include <linux/tcp.h>
34 #include <net/checksum.h>
38 #include "pasemi_mac.h"
43 * - Get rid of pci_{read,write}_config(), map registers with ioremap
48 * - Other performance improvements
52 /* Must be a power of two */
53 #define RX_RING_SIZE 512
54 #define TX_RING_SIZE 512
56 #define DEFAULT_MSG_ENABLE \
66 #define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
67 #define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
68 #define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
69 #define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
70 #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
72 #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
74 MODULE_LICENSE("GPL");
75 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
76 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
78 static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
79 module_param(debug, int, 0);
80 MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
82 static struct pasdma_status *dma_status;
84 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
86 struct pci_dev *pdev = mac->pdev;
87 struct device_node *dn = pci_device_to_OF_node(pdev);
93 "No device node for mac, not configuring\n");
97 maddr = of_get_property(dn, "local-mac-address", NULL);
99 /* Fall back to mac-address for older firmware */
101 maddr = of_get_property(dn, "mac-address", NULL);
105 "no mac address in device tree, not configuring\n");
109 if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
110 &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
112 "can't parse mac address, not configuring\n");
116 memcpy(mac->mac_addr, addr, sizeof(addr));
120 static int pasemi_mac_setup_rx_resources(struct net_device *dev)
122 struct pasemi_mac_rxring *ring;
123 struct pasemi_mac *mac = netdev_priv(dev);
124 int chan_id = mac->dma_rxch;
126 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
131 spin_lock_init(&ring->lock);
133 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
134 RX_RING_SIZE, GFP_KERNEL);
136 if (!ring->desc_info)
139 /* Allocate descriptors */
140 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
142 sizeof(struct pas_dma_xct_descr),
143 &ring->dma, GFP_KERNEL);
148 memset(ring->desc, 0, RX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
150 ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
151 RX_RING_SIZE * sizeof(u64),
152 &ring->buf_dma, GFP_KERNEL);
156 memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
158 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_BASEL(chan_id),
159 PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
161 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_BASEU(chan_id),
162 PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
163 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
165 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_CFG(chan_id),
166 PAS_DMA_RXCHAN_CFG_HBU(1));
168 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXINT_BASEL(mac->dma_if),
169 PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
171 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXINT_BASEU(mac->dma_if),
172 PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
173 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
175 ring->next_to_fill = 0;
176 ring->next_to_clean = 0;
178 snprintf(ring->irq_name, sizeof(ring->irq_name),
185 dma_free_coherent(&mac->dma_pdev->dev,
186 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
187 mac->rx->desc, mac->rx->dma);
189 kfree(ring->desc_info);
197 static int pasemi_mac_setup_tx_resources(struct net_device *dev)
199 struct pasemi_mac *mac = netdev_priv(dev);
201 int chan_id = mac->dma_txch;
202 struct pasemi_mac_txring *ring;
204 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
208 spin_lock_init(&ring->lock);
210 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
211 TX_RING_SIZE, GFP_KERNEL);
212 if (!ring->desc_info)
215 /* Allocate descriptors */
216 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
218 sizeof(struct pas_dma_xct_descr),
219 &ring->dma, GFP_KERNEL);
223 memset(ring->desc, 0, TX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
225 pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_BASEL(chan_id),
226 PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
227 val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
228 val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
230 pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_BASEU(chan_id), val);
232 pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_CFG(chan_id),
233 PAS_DMA_TXCHAN_CFG_TY_IFACE |
234 PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
235 PAS_DMA_TXCHAN_CFG_UP |
236 PAS_DMA_TXCHAN_CFG_WT(2));
238 ring->next_to_use = 0;
239 ring->next_to_clean = 0;
241 snprintf(ring->irq_name, sizeof(ring->irq_name),
248 kfree(ring->desc_info);
255 static void pasemi_mac_free_tx_resources(struct net_device *dev)
257 struct pasemi_mac *mac = netdev_priv(dev);
259 struct pasemi_mac_buffer *info;
260 struct pas_dma_xct_descr *dp;
262 for (i = 0; i < TX_RING_SIZE; i++) {
263 info = &TX_DESC_INFO(mac, i);
264 dp = &TX_DESC(mac, i);
267 pci_unmap_single(mac->dma_pdev,
271 dev_kfree_skb_any(info->skb);
280 dma_free_coherent(&mac->dma_pdev->dev,
281 TX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
282 mac->tx->desc, mac->tx->dma);
284 kfree(mac->tx->desc_info);
289 static void pasemi_mac_free_rx_resources(struct net_device *dev)
291 struct pasemi_mac *mac = netdev_priv(dev);
293 struct pasemi_mac_buffer *info;
294 struct pas_dma_xct_descr *dp;
296 for (i = 0; i < RX_RING_SIZE; i++) {
297 info = &RX_DESC_INFO(mac, i);
298 dp = &RX_DESC(mac, i);
301 pci_unmap_single(mac->dma_pdev,
305 dev_kfree_skb_any(info->skb);
314 dma_free_coherent(&mac->dma_pdev->dev,
315 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
316 mac->rx->desc, mac->rx->dma);
318 dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
319 mac->rx->buffers, mac->rx->buf_dma);
321 kfree(mac->rx->desc_info);
326 static void pasemi_mac_replenish_rx_ring(struct net_device *dev)
328 struct pasemi_mac *mac = netdev_priv(dev);
330 int start = mac->rx->next_to_fill;
331 unsigned int limit, count;
333 limit = (mac->rx->next_to_clean + RX_RING_SIZE -
334 mac->rx->next_to_fill) & (RX_RING_SIZE - 1);
336 /* Check to see if we're doing first-time setup */
337 if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
338 limit = RX_RING_SIZE;
344 for (count = limit; count; count--) {
345 struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
346 u64 *buff = &RX_BUFF(mac, i);
350 /* skb might still be in there for recycle on short receives */
354 skb = dev_alloc_skb(BUF_SIZE);
359 dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
362 if (unlikely(dma_mapping_error(dma))) {
363 dev_kfree_skb_irq(info->skb);
369 *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
375 pci_write_config_dword(mac->dma_pdev,
376 PAS_DMA_RXCHAN_INCR(mac->dma_rxch),
378 pci_write_config_dword(mac->dma_pdev,
379 PAS_DMA_RXINT_INCR(mac->dma_if),
382 mac->rx->next_to_fill += limit - count;
385 static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
387 unsigned int reg, stat;
388 /* Re-enable packet count interrupts: finally
389 * ack the packet count interrupt we got in rx_intr.
392 pci_read_config_dword(mac->iob_pdev,
393 PAS_IOB_DMA_RXCH_STAT(mac->dma_rxch),
396 reg = PAS_IOB_DMA_RXCH_RESET_PCNT(stat & PAS_IOB_DMA_RXCH_STAT_CNTDEL_M)
397 | PAS_IOB_DMA_RXCH_RESET_PINTC;
399 pci_write_config_dword(mac->iob_pdev,
400 PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch),
404 static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
406 unsigned int reg, stat;
408 /* Re-enable packet count interrupts */
409 pci_read_config_dword(mac->iob_pdev,
410 PAS_IOB_DMA_TXCH_STAT(mac->dma_txch), &stat);
412 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(stat & PAS_IOB_DMA_TXCH_STAT_CNTDEL_M)
413 | PAS_IOB_DMA_TXCH_RESET_PINTC;
415 pci_write_config_dword(mac->iob_pdev,
416 PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
420 static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
424 struct pas_dma_xct_descr *dp;
425 struct pasemi_mac_buffer *info;
431 spin_lock(&mac->rx->lock);
433 n = mac->rx->next_to_clean;
435 for (count = limit; count; count--) {
439 dp = &RX_DESC(mac, n);
442 if (!(macrx & XCT_MACRX_O))
448 /* We have to scan for our skb since there's no way
449 * to back-map them from the descriptor, and if we
450 * have several receive channels then they might not
451 * show up in the same order as they were put on the
455 dma = (dp->ptr & XCT_PTR_ADDR_M);
456 for (i = n; i < (n + RX_RING_SIZE); i++) {
457 info = &RX_DESC_INFO(mac, i);
458 if (info->dma == dma)
465 pci_unmap_single(mac->dma_pdev, dma, skb->len,
468 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
471 struct sk_buff *new_skb =
472 netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
474 skb_reserve(new_skb, NET_IP_ALIGN);
475 memcpy(new_skb->data - NET_IP_ALIGN,
476 skb->data - NET_IP_ALIGN,
478 /* save the skb in buffer_info as good */
481 /* else just continue with the old one */
487 skb->protocol = eth_type_trans(skb, mac->netdev);
489 if ((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK) {
490 skb->ip_summed = CHECKSUM_COMPLETE;
491 skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
494 skb->ip_summed = CHECKSUM_NONE;
496 mac->stats.rx_bytes += len;
497 mac->stats.rx_packets++;
499 netif_receive_skb(skb);
507 mac->rx->next_to_clean += limit - count;
508 pasemi_mac_replenish_rx_ring(mac->netdev);
510 spin_unlock(&mac->rx->lock);
515 static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
518 struct pasemi_mac_buffer *info;
519 struct pas_dma_xct_descr *dp;
523 spin_lock_irqsave(&mac->tx->lock, flags);
525 start = mac->tx->next_to_clean;
528 for (i = start; i < mac->tx->next_to_use; i++) {
529 dp = &TX_DESC(mac, i);
530 if (!dp || (dp->mactx & XCT_MACTX_O))
535 info = &TX_DESC_INFO(mac, i);
537 pci_unmap_single(mac->dma_pdev, info->dma,
538 info->skb->len, PCI_DMA_TODEVICE);
539 dev_kfree_skb_irq(info->skb);
546 mac->tx->next_to_clean += count;
547 spin_unlock_irqrestore(&mac->tx->lock, flags);
549 netif_wake_queue(mac->netdev);
555 static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
557 struct net_device *dev = data;
558 struct pasemi_mac *mac = netdev_priv(dev);
561 if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
564 if (*mac->rx_status & PAS_STATUS_ERROR)
565 printk("rx_status reported error\n");
567 /* Don't reset packet count so it won't fire again but clear
571 pci_read_config_dword(mac->dma_pdev, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), ®);
574 if (*mac->rx_status & PAS_STATUS_SOFT)
575 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
576 if (*mac->rx_status & PAS_STATUS_ERROR)
577 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
578 if (*mac->rx_status & PAS_STATUS_TIMER)
579 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
581 netif_rx_schedule(dev);
583 pci_write_config_dword(mac->iob_pdev,
584 PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
590 static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
592 struct net_device *dev = data;
593 struct pasemi_mac *mac = netdev_priv(dev);
596 if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
599 pasemi_mac_clean_tx(mac);
601 reg = PAS_IOB_DMA_TXCH_RESET_PINTC;
603 if (*mac->tx_status & PAS_STATUS_SOFT)
604 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
605 if (*mac->tx_status & PAS_STATUS_ERROR)
606 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
608 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch),
614 static void pasemi_adjust_link(struct net_device *dev)
616 struct pasemi_mac *mac = netdev_priv(dev);
619 unsigned int new_flags;
621 if (!mac->phydev->link) {
622 /* If no link, MAC speed settings don't matter. Just report
623 * link down and return.
625 if (mac->link && netif_msg_link(mac))
626 printk(KERN_INFO "%s: Link is down.\n", dev->name);
628 netif_carrier_off(dev);
633 netif_carrier_on(dev);
635 pci_read_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, &flags);
636 new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
637 PAS_MAC_CFG_PCFG_TSR_M);
639 if (!mac->phydev->duplex)
640 new_flags |= PAS_MAC_CFG_PCFG_HD;
642 switch (mac->phydev->speed) {
644 new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
645 PAS_MAC_CFG_PCFG_TSR_1G;
648 new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
649 PAS_MAC_CFG_PCFG_TSR_100M;
652 new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
653 PAS_MAC_CFG_PCFG_TSR_10M;
656 printk("Unsupported speed %d\n", mac->phydev->speed);
659 /* Print on link or speed/duplex change */
660 msg = mac->link != mac->phydev->link || flags != new_flags;
662 mac->duplex = mac->phydev->duplex;
663 mac->speed = mac->phydev->speed;
664 mac->link = mac->phydev->link;
666 if (new_flags != flags)
667 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, new_flags);
669 if (msg && netif_msg_link(mac))
670 printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
671 dev->name, mac->speed, mac->duplex ? "full" : "half");
674 static int pasemi_mac_phy_init(struct net_device *dev)
676 struct pasemi_mac *mac = netdev_priv(dev);
677 struct device_node *dn, *phy_dn;
678 struct phy_device *phydev;
681 const unsigned int *prop;
685 dn = pci_device_to_OF_node(mac->pdev);
686 ph = of_get_property(dn, "phy-handle", NULL);
689 phy_dn = of_find_node_by_phandle(*ph);
691 prop = of_get_property(phy_dn, "reg", NULL);
692 ret = of_address_to_resource(phy_dn->parent, 0, &r);
697 snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
705 phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
707 if (IS_ERR(phydev)) {
708 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
709 return PTR_ERR(phydev);
712 mac->phydev = phydev;
722 static int pasemi_mac_open(struct net_device *dev)
724 struct pasemi_mac *mac = netdev_priv(dev);
729 /* enable rx section */
730 pci_write_config_dword(mac->dma_pdev, PAS_DMA_COM_RXCMD,
731 PAS_DMA_COM_RXCMD_EN);
733 /* enable tx section */
734 pci_write_config_dword(mac->dma_pdev, PAS_DMA_COM_TXCMD,
735 PAS_DMA_COM_TXCMD_EN);
737 flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
738 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
739 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
741 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_TXP, flags);
743 flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
744 PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
746 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
748 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
749 PAS_IOB_DMA_RXCH_CFG_CNTTH(1));
751 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
752 PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
754 /* Clear out any residual packet count state from firmware */
755 pasemi_mac_restart_rx_intr(mac);
756 pasemi_mac_restart_tx_intr(mac);
758 /* 0xffffff is max value, about 16ms */
759 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_COM_TIMEOUTCFG,
760 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
762 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, flags);
764 ret = pasemi_mac_setup_rx_resources(dev);
766 goto out_rx_resources;
768 ret = pasemi_mac_setup_tx_resources(dev);
770 goto out_tx_resources;
772 pci_write_config_dword(mac->pdev, PAS_MAC_IPC_CHNL,
773 PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
774 PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
777 pci_write_config_dword(mac->dma_pdev,
778 PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
779 PAS_DMA_RXINT_RCMDSTA_EN);
781 /* enable rx channel */
782 pci_write_config_dword(mac->dma_pdev,
783 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
784 PAS_DMA_RXCHAN_CCMDSTA_EN |
785 PAS_DMA_RXCHAN_CCMDSTA_DU);
787 /* enable tx channel */
788 pci_write_config_dword(mac->dma_pdev,
789 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
790 PAS_DMA_TXCHAN_TCMDSTA_EN);
792 pasemi_mac_replenish_rx_ring(dev);
794 ret = pasemi_mac_phy_init(dev);
795 /* Some configs don't have PHYs (XAUI etc), so don't complain about
796 * failed init due to -ENODEV.
798 if (ret && ret != -ENODEV)
799 dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
801 netif_start_queue(dev);
802 netif_poll_enable(dev);
804 /* Interrupts are a bit different for our DMA controller: While
805 * it's got one a regular PCI device header, the interrupt there
806 * is really the base of the range it's using. Each tx and rx
807 * channel has it's own interrupt source.
810 base_irq = virq_to_hw(mac->dma_pdev->irq);
812 mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
813 mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
815 ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
816 mac->tx->irq_name, dev);
818 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
819 base_irq + mac->dma_txch, ret);
823 ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
824 mac->rx->irq_name, dev);
826 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
827 base_irq + 20 + mac->dma_rxch, ret);
832 phy_start(mac->phydev);
837 free_irq(mac->tx_irq, dev);
839 netif_poll_disable(dev);
840 netif_stop_queue(dev);
841 pasemi_mac_free_tx_resources(dev);
843 pasemi_mac_free_rx_resources(dev);
849 #define MAX_RETRIES 5000
851 static int pasemi_mac_close(struct net_device *dev)
853 struct pasemi_mac *mac = netdev_priv(dev);
858 phy_stop(mac->phydev);
859 phy_disconnect(mac->phydev);
862 netif_stop_queue(dev);
864 /* Clean out any pending buffers */
865 pasemi_mac_clean_tx(mac);
866 pasemi_mac_clean_rx(mac, RX_RING_SIZE);
868 /* Disable interface */
869 pci_write_config_dword(mac->dma_pdev,
870 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
871 PAS_DMA_TXCHAN_TCMDSTA_ST);
872 pci_write_config_dword(mac->dma_pdev,
873 PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
874 PAS_DMA_RXINT_RCMDSTA_ST);
875 pci_write_config_dword(mac->dma_pdev,
876 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
877 PAS_DMA_RXCHAN_CCMDSTA_ST);
879 for (retries = 0; retries < MAX_RETRIES; retries++) {
880 pci_read_config_dword(mac->dma_pdev,
881 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
883 if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
888 if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
889 dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
891 for (retries = 0; retries < MAX_RETRIES; retries++) {
892 pci_read_config_dword(mac->dma_pdev,
893 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
895 if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
900 if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
901 dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
903 for (retries = 0; retries < MAX_RETRIES; retries++) {
904 pci_read_config_dword(mac->dma_pdev,
905 PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
907 if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
912 if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
913 dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
915 /* Then, disable the channel. This must be done separately from
916 * stopping, since you can't disable when active.
919 pci_write_config_dword(mac->dma_pdev,
920 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
921 pci_write_config_dword(mac->dma_pdev,
922 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
923 pci_write_config_dword(mac->dma_pdev,
924 PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
926 free_irq(mac->tx_irq, dev);
927 free_irq(mac->rx_irq, dev);
930 pasemi_mac_free_rx_resources(dev);
931 pasemi_mac_free_tx_resources(dev);
936 static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
938 struct pasemi_mac *mac = netdev_priv(dev);
939 struct pasemi_mac_txring *txring;
940 struct pasemi_mac_buffer *info;
941 struct pas_dma_xct_descr *dp;
946 dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
948 if (skb->ip_summed == CHECKSUM_PARTIAL) {
949 const unsigned char *nh = skb_network_header(skb);
951 switch (ip_hdr(skb)->protocol) {
953 dflags |= XCT_MACTX_CSUM_TCP;
954 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
955 dflags |= XCT_MACTX_IPO(nh - skb->data);
958 dflags |= XCT_MACTX_CSUM_UDP;
959 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
960 dflags |= XCT_MACTX_IPO(nh - skb->data);
965 map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
967 if (dma_mapping_error(map))
968 return NETDEV_TX_BUSY;
972 spin_lock_irqsave(&txring->lock, flags);
974 if (txring->next_to_clean - txring->next_to_use == TX_RING_SIZE) {
975 spin_unlock_irqrestore(&txring->lock, flags);
976 pasemi_mac_clean_tx(mac);
977 spin_lock_irqsave(&txring->lock, flags);
979 if (txring->next_to_clean - txring->next_to_use ==
981 /* Still no room -- stop the queue and wait for tx
982 * intr when there's room.
984 netif_stop_queue(dev);
990 dp = &TX_DESC(mac, txring->next_to_use);
991 info = &TX_DESC_INFO(mac, txring->next_to_use);
993 dp->mactx = dflags | XCT_MACTX_LLEN(skb->len);
994 dp->ptr = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
998 txring->next_to_use++;
999 mac->stats.tx_packets++;
1000 mac->stats.tx_bytes += skb->len;
1002 spin_unlock_irqrestore(&txring->lock, flags);
1004 pci_write_config_dword(mac->dma_pdev,
1005 PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
1007 return NETDEV_TX_OK;
1010 spin_unlock_irqrestore(&txring->lock, flags);
1011 pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
1012 return NETDEV_TX_BUSY;
1015 static struct net_device_stats *pasemi_mac_get_stats(struct net_device *dev)
1017 struct pasemi_mac *mac = netdev_priv(dev);
1023 static void pasemi_mac_set_rx_mode(struct net_device *dev)
1025 struct pasemi_mac *mac = netdev_priv(dev);
1028 pci_read_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, &flags);
1030 /* Set promiscuous */
1031 if (dev->flags & IFF_PROMISC)
1032 flags |= PAS_MAC_CFG_PCFG_PR;
1034 flags &= ~PAS_MAC_CFG_PCFG_PR;
1036 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, flags);
1040 static int pasemi_mac_poll(struct net_device *dev, int *budget)
1042 int pkts, limit = min(*budget, dev->quota);
1043 struct pasemi_mac *mac = netdev_priv(dev);
1045 pkts = pasemi_mac_clean_rx(mac, limit);
1051 /* all done, no more packets present */
1052 netif_rx_complete(dev);
1054 pasemi_mac_restart_rx_intr(mac);
1057 /* used up our quantum, so reschedule */
1062 static int __devinit
1063 pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1065 static int index = 0;
1066 struct net_device *dev;
1067 struct pasemi_mac *mac;
1070 err = pci_enable_device(pdev);
1074 dev = alloc_etherdev(sizeof(struct pasemi_mac));
1077 "pasemi_mac: Could not allocate ethernet device.\n");
1079 goto out_disable_device;
1082 SET_MODULE_OWNER(dev);
1083 pci_set_drvdata(pdev, dev);
1084 SET_NETDEV_DEV(dev, &pdev->dev);
1086 mac = netdev_priv(dev);
1090 mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1092 if (!mac->dma_pdev) {
1093 dev_err(&pdev->dev, "Can't find DMA Controller\n");
1095 goto out_free_netdev;
1098 mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1100 if (!mac->iob_pdev) {
1101 dev_err(&pdev->dev, "Can't find I/O Bridge\n");
1103 goto out_put_dma_pdev;
1106 /* These should come out of the device tree eventually */
1107 mac->dma_txch = index;
1108 mac->dma_rxch = index;
1110 /* We probe GMAC before XAUI, but the DMA interfaces are
1111 * in XAUI, GMAC order.
1114 mac->dma_if = index + 2;
1116 mac->dma_if = index - 4;
1119 switch (pdev->device) {
1121 mac->type = MAC_TYPE_GMAC;
1124 mac->type = MAC_TYPE_XAUI;
1131 /* get mac addr from device tree */
1132 if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1136 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1138 dev->open = pasemi_mac_open;
1139 dev->stop = pasemi_mac_close;
1140 dev->hard_start_xmit = pasemi_mac_start_tx;
1141 dev->get_stats = pasemi_mac_get_stats;
1142 dev->set_multicast_list = pasemi_mac_set_rx_mode;
1144 dev->poll = pasemi_mac_poll;
1145 dev->features = NETIF_F_HW_CSUM;
1147 /* The dma status structure is located in the I/O bridge, and
1148 * is cache coherent.
1151 /* XXXOJN This should come from the device tree */
1152 dma_status = __ioremap(0xfd800000, 0x1000, 0);
1154 mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
1155 mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
1157 mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1159 /* Enable most messages by default */
1160 mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1162 err = register_netdev(dev);
1165 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1169 printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
1170 "hw addr %02x:%02x:%02x:%02x:%02x:%02x\n",
1171 dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1172 mac->dma_if, mac->dma_txch, mac->dma_rxch,
1173 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1174 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1179 pci_dev_put(mac->iob_pdev);
1181 pci_dev_put(mac->dma_pdev);
1185 pci_disable_device(pdev);
1190 static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1192 struct net_device *netdev = pci_get_drvdata(pdev);
1193 struct pasemi_mac *mac;
1198 mac = netdev_priv(netdev);
1200 unregister_netdev(netdev);
1202 pci_disable_device(pdev);
1203 pci_dev_put(mac->dma_pdev);
1204 pci_dev_put(mac->iob_pdev);
1206 pci_set_drvdata(pdev, NULL);
1207 free_netdev(netdev);
1210 static struct pci_device_id pasemi_mac_pci_tbl[] = {
1211 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1212 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
1215 MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1217 static struct pci_driver pasemi_mac_driver = {
1218 .name = "pasemi_mac",
1219 .id_table = pasemi_mac_pci_tbl,
1220 .probe = pasemi_mac_probe,
1221 .remove = __devexit_p(pasemi_mac_remove),
1224 static void __exit pasemi_mac_cleanup_module(void)
1226 pci_unregister_driver(&pasemi_mac_driver);
1227 __iounmap(dma_status);
1231 int pasemi_mac_init_module(void)
1233 return pci_register_driver(&pasemi_mac_driver);
1236 module_init(pasemi_mac_init_module);
1237 module_exit(pasemi_mac_cleanup_module);