Merge git://git.infradead.org/~dwmw2/rbtree-2.6
[linux-2.6] / drivers / infiniband / hw / mthca / mthca_srq.c
1 /*
2  * Copyright (c) 2005 Cisco Systems. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  *
32  * $Id: mthca_srq.c 3047 2005-08-10 03:59:35Z roland $
33  */
34
35 #include <linux/slab.h>
36 #include <linux/string.h>
37
38 #include "mthca_dev.h"
39 #include "mthca_cmd.h"
40 #include "mthca_memfree.h"
41 #include "mthca_wqe.h"
42
43 enum {
44         MTHCA_MAX_DIRECT_SRQ_SIZE = 4 * PAGE_SIZE
45 };
46
47 struct mthca_tavor_srq_context {
48         __be64 wqe_base_ds;     /* low 6 bits is descriptor size */
49         __be32 state_pd;
50         __be32 lkey;
51         __be32 uar;
52         __be16 limit_watermark;
53         __be16 wqe_cnt;
54         u32    reserved[2];
55 };
56
57 struct mthca_arbel_srq_context {
58         __be32 state_logsize_srqn;
59         __be32 lkey;
60         __be32 db_index;
61         __be32 logstride_usrpage;
62         __be64 wqe_base;
63         __be32 eq_pd;
64         __be16 limit_watermark;
65         __be16 wqe_cnt;
66         u16    reserved1;
67         __be16 wqe_counter;
68         u32    reserved2[3];
69 };
70
71 static void *get_wqe(struct mthca_srq *srq, int n)
72 {
73         if (srq->is_direct)
74                 return srq->queue.direct.buf + (n << srq->wqe_shift);
75         else
76                 return srq->queue.page_list[(n << srq->wqe_shift) >> PAGE_SHIFT].buf +
77                         ((n << srq->wqe_shift) & (PAGE_SIZE - 1));
78 }
79
80 /*
81  * Return a pointer to the location within a WQE that we're using as a
82  * link when the WQE is in the free list.  We use the imm field
83  * because in the Tavor case, posting a WQE may overwrite the next
84  * segment of the previous WQE, but a receive WQE will never touch the
85  * imm field.  This avoids corrupting our free list if the previous
86  * WQE has already completed and been put on the free list when we
87  * post the next WQE.
88  */
89 static inline int *wqe_to_link(void *wqe)
90 {
91         return (int *) (wqe + offsetof(struct mthca_next_seg, imm));
92 }
93
94 static void mthca_tavor_init_srq_context(struct mthca_dev *dev,
95                                          struct mthca_pd *pd,
96                                          struct mthca_srq *srq,
97                                          struct mthca_tavor_srq_context *context)
98 {
99         memset(context, 0, sizeof *context);
100
101         context->wqe_base_ds = cpu_to_be64(1 << (srq->wqe_shift - 4));
102         context->state_pd    = cpu_to_be32(pd->pd_num);
103         context->lkey        = cpu_to_be32(srq->mr.ibmr.lkey);
104
105         if (pd->ibpd.uobject)
106                 context->uar =
107                         cpu_to_be32(to_mucontext(pd->ibpd.uobject->context)->uar.index);
108         else
109                 context->uar = cpu_to_be32(dev->driver_uar.index);
110 }
111
112 static void mthca_arbel_init_srq_context(struct mthca_dev *dev,
113                                          struct mthca_pd *pd,
114                                          struct mthca_srq *srq,
115                                          struct mthca_arbel_srq_context *context)
116 {
117         int logsize;
118
119         memset(context, 0, sizeof *context);
120
121         logsize = long_log2(srq->max) + srq->wqe_shift;
122         context->state_logsize_srqn = cpu_to_be32(logsize << 24 | srq->srqn);
123         context->lkey = cpu_to_be32(srq->mr.ibmr.lkey);
124         context->db_index = cpu_to_be32(srq->db_index);
125         context->logstride_usrpage = cpu_to_be32((srq->wqe_shift - 4) << 29);
126         if (pd->ibpd.uobject)
127                 context->logstride_usrpage |=
128                         cpu_to_be32(to_mucontext(pd->ibpd.uobject->context)->uar.index);
129         else
130                 context->logstride_usrpage |= cpu_to_be32(dev->driver_uar.index);
131         context->eq_pd = cpu_to_be32(MTHCA_EQ_ASYNC << 24 | pd->pd_num);
132 }
133
134 static void mthca_free_srq_buf(struct mthca_dev *dev, struct mthca_srq *srq)
135 {
136         mthca_buf_free(dev, srq->max << srq->wqe_shift, &srq->queue,
137                        srq->is_direct, &srq->mr);
138         kfree(srq->wrid);
139 }
140
141 static int mthca_alloc_srq_buf(struct mthca_dev *dev, struct mthca_pd *pd,
142                                struct mthca_srq *srq)
143 {
144         struct mthca_data_seg *scatter;
145         void *wqe;
146         int err;
147         int i;
148
149         if (pd->ibpd.uobject)
150                 return 0;
151
152         srq->wrid = kmalloc(srq->max * sizeof (u64), GFP_KERNEL);
153         if (!srq->wrid)
154                 return -ENOMEM;
155
156         err = mthca_buf_alloc(dev, srq->max << srq->wqe_shift,
157                               MTHCA_MAX_DIRECT_SRQ_SIZE,
158                               &srq->queue, &srq->is_direct, pd, 1, &srq->mr);
159         if (err) {
160                 kfree(srq->wrid);
161                 return err;
162         }
163
164         /*
165          * Now initialize the SRQ buffer so that all of the WQEs are
166          * linked into the list of free WQEs.  In addition, set the
167          * scatter list L_Keys to the sentry value of 0x100.
168          */
169         for (i = 0; i < srq->max; ++i) {
170                 wqe = get_wqe(srq, i);
171
172                 *wqe_to_link(wqe) = i < srq->max - 1 ? i + 1 : -1;
173
174                 for (scatter = wqe + sizeof (struct mthca_next_seg);
175                      (void *) scatter < wqe + (1 << srq->wqe_shift);
176                      ++scatter)
177                         scatter->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
178         }
179
180         srq->last = get_wqe(srq, srq->max - 1);
181
182         return 0;
183 }
184
185 int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
186                     struct ib_srq_attr *attr, struct mthca_srq *srq)
187 {
188         struct mthca_mailbox *mailbox;
189         u8 status;
190         int ds;
191         int err;
192
193         /* Sanity check SRQ size before proceeding */
194         if (attr->max_wr  > dev->limits.max_srq_wqes ||
195             attr->max_sge > dev->limits.max_srq_sge)
196                 return -EINVAL;
197
198         srq->max      = attr->max_wr;
199         srq->max_gs   = attr->max_sge;
200         srq->counter  = 0;
201
202         if (mthca_is_memfree(dev))
203                 srq->max = roundup_pow_of_two(srq->max + 1);
204
205         ds = max(64UL,
206                  roundup_pow_of_two(sizeof (struct mthca_next_seg) +
207                                     srq->max_gs * sizeof (struct mthca_data_seg)));
208
209         if (!mthca_is_memfree(dev) && (ds > dev->limits.max_desc_sz))
210                 return -EINVAL;
211
212         srq->wqe_shift = long_log2(ds);
213
214         srq->srqn = mthca_alloc(&dev->srq_table.alloc);
215         if (srq->srqn == -1)
216                 return -ENOMEM;
217
218         if (mthca_is_memfree(dev)) {
219                 err = mthca_table_get(dev, dev->srq_table.table, srq->srqn);
220                 if (err)
221                         goto err_out;
222
223                 if (!pd->ibpd.uobject) {
224                         srq->db_index = mthca_alloc_db(dev, MTHCA_DB_TYPE_SRQ,
225                                                        srq->srqn, &srq->db);
226                         if (srq->db_index < 0) {
227                                 err = -ENOMEM;
228                                 goto err_out_icm;
229                         }
230                 }
231         }
232
233         mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
234         if (IS_ERR(mailbox)) {
235                 err = PTR_ERR(mailbox);
236                 goto err_out_db;
237         }
238
239         err = mthca_alloc_srq_buf(dev, pd, srq);
240         if (err)
241                 goto err_out_mailbox;
242
243         spin_lock_init(&srq->lock);
244         srq->refcount = 1;
245         init_waitqueue_head(&srq->wait);
246         mutex_init(&srq->mutex);
247
248         if (mthca_is_memfree(dev))
249                 mthca_arbel_init_srq_context(dev, pd, srq, mailbox->buf);
250         else
251                 mthca_tavor_init_srq_context(dev, pd, srq, mailbox->buf);
252
253         err = mthca_SW2HW_SRQ(dev, mailbox, srq->srqn, &status);
254
255         if (err) {
256                 mthca_warn(dev, "SW2HW_SRQ failed (%d)\n", err);
257                 goto err_out_free_buf;
258         }
259         if (status) {
260                 mthca_warn(dev, "SW2HW_SRQ returned status 0x%02x\n",
261                            status);
262                 err = -EINVAL;
263                 goto err_out_free_buf;
264         }
265
266         spin_lock_irq(&dev->srq_table.lock);
267         if (mthca_array_set(&dev->srq_table.srq,
268                             srq->srqn & (dev->limits.num_srqs - 1),
269                             srq)) {
270                 spin_unlock_irq(&dev->srq_table.lock);
271                 goto err_out_free_srq;
272         }
273         spin_unlock_irq(&dev->srq_table.lock);
274
275         mthca_free_mailbox(dev, mailbox);
276
277         srq->first_free = 0;
278         srq->last_free  = srq->max - 1;
279
280         attr->max_wr    = (mthca_is_memfree(dev)) ? srq->max - 1 : srq->max;
281         attr->max_sge   = srq->max_gs;
282
283         return 0;
284
285 err_out_free_srq:
286         err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn, &status);
287         if (err)
288                 mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err);
289         else if (status)
290                 mthca_warn(dev, "HW2SW_SRQ returned status 0x%02x\n", status);
291
292 err_out_free_buf:
293         if (!pd->ibpd.uobject)
294                 mthca_free_srq_buf(dev, srq);
295
296 err_out_mailbox:
297         mthca_free_mailbox(dev, mailbox);
298
299 err_out_db:
300         if (!pd->ibpd.uobject && mthca_is_memfree(dev))
301                 mthca_free_db(dev, MTHCA_DB_TYPE_SRQ, srq->db_index);
302
303 err_out_icm:
304         mthca_table_put(dev, dev->srq_table.table, srq->srqn);
305
306 err_out:
307         mthca_free(&dev->srq_table.alloc, srq->srqn);
308
309         return err;
310 }
311
312 static inline int get_srq_refcount(struct mthca_dev *dev, struct mthca_srq *srq)
313 {
314         int c;
315
316         spin_lock_irq(&dev->srq_table.lock);
317         c = srq->refcount;
318         spin_unlock_irq(&dev->srq_table.lock);
319
320         return c;
321 }
322
323 void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq)
324 {
325         struct mthca_mailbox *mailbox;
326         int err;
327         u8 status;
328
329         mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
330         if (IS_ERR(mailbox)) {
331                 mthca_warn(dev, "No memory for mailbox to free SRQ.\n");
332                 return;
333         }
334
335         err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn, &status);
336         if (err)
337                 mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err);
338         else if (status)
339                 mthca_warn(dev, "HW2SW_SRQ returned status 0x%02x\n", status);
340
341         spin_lock_irq(&dev->srq_table.lock);
342         mthca_array_clear(&dev->srq_table.srq,
343                           srq->srqn & (dev->limits.num_srqs - 1));
344         --srq->refcount;
345         spin_unlock_irq(&dev->srq_table.lock);
346
347         wait_event(srq->wait, !get_srq_refcount(dev, srq));
348
349         if (!srq->ibsrq.uobject) {
350                 mthca_free_srq_buf(dev, srq);
351                 if (mthca_is_memfree(dev))
352                         mthca_free_db(dev, MTHCA_DB_TYPE_SRQ, srq->db_index);
353         }
354
355         mthca_table_put(dev, dev->srq_table.table, srq->srqn);
356         mthca_free(&dev->srq_table.alloc, srq->srqn);
357         mthca_free_mailbox(dev, mailbox);
358 }
359
360 int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
361                      enum ib_srq_attr_mask attr_mask)
362 {
363         struct mthca_dev *dev = to_mdev(ibsrq->device);
364         struct mthca_srq *srq = to_msrq(ibsrq);
365         int ret;
366         u8 status;
367
368         /* We don't support resizing SRQs (yet?) */
369         if (attr_mask & IB_SRQ_MAX_WR)
370                 return -EINVAL;
371
372         if (attr_mask & IB_SRQ_LIMIT) {
373                 if (attr->srq_limit > srq->max)
374                         return -EINVAL;
375
376                 mutex_lock(&srq->mutex);
377                 ret = mthca_ARM_SRQ(dev, srq->srqn, attr->srq_limit, &status);
378                 mutex_unlock(&srq->mutex);
379
380                 if (ret)
381                         return ret;
382                 if (status)
383                         return -EINVAL;
384         }
385
386         return 0;
387 }
388
389 int mthca_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
390 {
391         struct mthca_dev *dev = to_mdev(ibsrq->device);
392         struct mthca_srq *srq = to_msrq(ibsrq);
393         struct mthca_mailbox *mailbox;
394         struct mthca_arbel_srq_context *arbel_ctx;
395         struct mthca_tavor_srq_context *tavor_ctx;
396         u8 status;
397         int err;
398
399         mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
400         if (IS_ERR(mailbox))
401                 return PTR_ERR(mailbox);
402
403         err = mthca_QUERY_SRQ(dev, srq->srqn, mailbox, &status);
404         if (err)
405                 goto out;
406
407         if (mthca_is_memfree(dev)) {
408                 arbel_ctx = mailbox->buf;
409                 srq_attr->srq_limit = be16_to_cpu(arbel_ctx->limit_watermark);
410         } else {
411                 tavor_ctx = mailbox->buf;
412                 srq_attr->srq_limit = be16_to_cpu(tavor_ctx->limit_watermark);
413         }
414
415         srq_attr->max_wr  = (mthca_is_memfree(dev)) ? srq->max - 1 : srq->max;
416         srq_attr->max_sge = srq->max_gs;
417
418 out:
419         mthca_free_mailbox(dev, mailbox);
420
421         return err;
422 }
423
424 void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
425                      enum ib_event_type event_type)
426 {
427         struct mthca_srq *srq;
428         struct ib_event event;
429
430         spin_lock(&dev->srq_table.lock);
431         srq = mthca_array_get(&dev->srq_table.srq, srqn & (dev->limits.num_srqs - 1));
432         if (srq)
433                 ++srq->refcount;
434         spin_unlock(&dev->srq_table.lock);
435
436         if (!srq) {
437                 mthca_warn(dev, "Async event for bogus SRQ %08x\n", srqn);
438                 return;
439         }
440
441         if (!srq->ibsrq.event_handler)
442                 goto out;
443
444         event.device      = &dev->ib_dev;
445         event.event       = event_type;
446         event.element.srq = &srq->ibsrq;
447         srq->ibsrq.event_handler(&event, srq->ibsrq.srq_context);
448
449 out:
450         spin_lock(&dev->srq_table.lock);
451         if (!--srq->refcount)
452                 wake_up(&srq->wait);
453         spin_unlock(&dev->srq_table.lock);
454 }
455
456 /*
457  * This function must be called with IRQs disabled.
458  */
459 void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr)
460 {
461         int ind;
462
463         ind = wqe_addr >> srq->wqe_shift;
464
465         spin_lock(&srq->lock);
466
467         if (likely(srq->first_free >= 0))
468                 *wqe_to_link(get_wqe(srq, srq->last_free)) = ind;
469         else
470                 srq->first_free = ind;
471
472         *wqe_to_link(get_wqe(srq, ind)) = -1;
473         srq->last_free = ind;
474
475         spin_unlock(&srq->lock);
476 }
477
478 int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
479                               struct ib_recv_wr **bad_wr)
480 {
481         struct mthca_dev *dev = to_mdev(ibsrq->device);
482         struct mthca_srq *srq = to_msrq(ibsrq);
483         __be32 doorbell[2];
484         unsigned long flags;
485         int err = 0;
486         int first_ind;
487         int ind;
488         int next_ind;
489         int nreq;
490         int i;
491         void *wqe;
492         void *prev_wqe;
493
494         spin_lock_irqsave(&srq->lock, flags);
495
496         first_ind = srq->first_free;
497
498         for (nreq = 0; wr; wr = wr->next) {
499                 ind = srq->first_free;
500
501                 if (ind < 0) {
502                         mthca_err(dev, "SRQ %06x full\n", srq->srqn);
503                         err = -ENOMEM;
504                         *bad_wr = wr;
505                         break;
506                 }
507
508                 wqe       = get_wqe(srq, ind);
509                 next_ind  = *wqe_to_link(wqe);
510
511                 if (next_ind < 0) {
512                         mthca_err(dev, "SRQ %06x full\n", srq->srqn);
513                         err = -ENOMEM;
514                         *bad_wr = wr;
515                         break;
516                 }
517
518                 prev_wqe  = srq->last;
519                 srq->last = wqe;
520
521                 ((struct mthca_next_seg *) wqe)->nda_op = 0;
522                 ((struct mthca_next_seg *) wqe)->ee_nds = 0;
523                 /* flags field will always remain 0 */
524
525                 wqe += sizeof (struct mthca_next_seg);
526
527                 if (unlikely(wr->num_sge > srq->max_gs)) {
528                         err = -EINVAL;
529                         *bad_wr = wr;
530                         srq->last = prev_wqe;
531                         break;
532                 }
533
534                 for (i = 0; i < wr->num_sge; ++i) {
535                         ((struct mthca_data_seg *) wqe)->byte_count =
536                                 cpu_to_be32(wr->sg_list[i].length);
537                         ((struct mthca_data_seg *) wqe)->lkey =
538                                 cpu_to_be32(wr->sg_list[i].lkey);
539                         ((struct mthca_data_seg *) wqe)->addr =
540                                 cpu_to_be64(wr->sg_list[i].addr);
541                         wqe += sizeof (struct mthca_data_seg);
542                 }
543
544                 if (i < srq->max_gs) {
545                         ((struct mthca_data_seg *) wqe)->byte_count = 0;
546                         ((struct mthca_data_seg *) wqe)->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
547                         ((struct mthca_data_seg *) wqe)->addr = 0;
548                 }
549
550                 ((struct mthca_next_seg *) prev_wqe)->nda_op =
551                         cpu_to_be32((ind << srq->wqe_shift) | 1);
552                 wmb();
553                 ((struct mthca_next_seg *) prev_wqe)->ee_nds =
554                         cpu_to_be32(MTHCA_NEXT_DBD);
555
556                 srq->wrid[ind]  = wr->wr_id;
557                 srq->first_free = next_ind;
558
559                 ++nreq;
560                 if (unlikely(nreq == MTHCA_TAVOR_MAX_WQES_PER_RECV_DB)) {
561                         nreq = 0;
562
563                         doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift);
564                         doorbell[1] = cpu_to_be32(srq->srqn << 8);
565
566                         /*
567                          * Make sure that descriptors are written
568                          * before doorbell is rung.
569                          */
570                         wmb();
571
572                         mthca_write64(doorbell,
573                                       dev->kar + MTHCA_RECEIVE_DOORBELL,
574                                       MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock));
575
576                         first_ind = srq->first_free;
577                 }
578         }
579
580         if (likely(nreq)) {
581                 doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift);
582                 doorbell[1] = cpu_to_be32((srq->srqn << 8) | nreq);
583
584                 /*
585                  * Make sure that descriptors are written before
586                  * doorbell is rung.
587                  */
588                 wmb();
589
590                 mthca_write64(doorbell,
591                               dev->kar + MTHCA_RECEIVE_DOORBELL,
592                               MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock));
593         }
594
595         spin_unlock_irqrestore(&srq->lock, flags);
596         return err;
597 }
598
599 int mthca_arbel_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
600                               struct ib_recv_wr **bad_wr)
601 {
602         struct mthca_dev *dev = to_mdev(ibsrq->device);
603         struct mthca_srq *srq = to_msrq(ibsrq);
604         unsigned long flags;
605         int err = 0;
606         int ind;
607         int next_ind;
608         int nreq;
609         int i;
610         void *wqe;
611
612         spin_lock_irqsave(&srq->lock, flags);
613
614         for (nreq = 0; wr; ++nreq, wr = wr->next) {
615                 ind = srq->first_free;
616
617                 if (ind < 0) {
618                         mthca_err(dev, "SRQ %06x full\n", srq->srqn);
619                         err = -ENOMEM;
620                         *bad_wr = wr;
621                         break;
622                 }
623
624                 wqe       = get_wqe(srq, ind);
625                 next_ind  = *wqe_to_link(wqe);
626
627                 if (next_ind < 0) {
628                         mthca_err(dev, "SRQ %06x full\n", srq->srqn);
629                         err = -ENOMEM;
630                         *bad_wr = wr;
631                         break;
632                 }
633
634                 ((struct mthca_next_seg *) wqe)->nda_op =
635                         cpu_to_be32((next_ind << srq->wqe_shift) | 1);
636                 ((struct mthca_next_seg *) wqe)->ee_nds = 0;
637                 /* flags field will always remain 0 */
638
639                 wqe += sizeof (struct mthca_next_seg);
640
641                 if (unlikely(wr->num_sge > srq->max_gs)) {
642                         err = -EINVAL;
643                         *bad_wr = wr;
644                         break;
645                 }
646
647                 for (i = 0; i < wr->num_sge; ++i) {
648                         ((struct mthca_data_seg *) wqe)->byte_count =
649                                 cpu_to_be32(wr->sg_list[i].length);
650                         ((struct mthca_data_seg *) wqe)->lkey =
651                                 cpu_to_be32(wr->sg_list[i].lkey);
652                         ((struct mthca_data_seg *) wqe)->addr =
653                                 cpu_to_be64(wr->sg_list[i].addr);
654                         wqe += sizeof (struct mthca_data_seg);
655                 }
656
657                 if (i < srq->max_gs) {
658                         ((struct mthca_data_seg *) wqe)->byte_count = 0;
659                         ((struct mthca_data_seg *) wqe)->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
660                         ((struct mthca_data_seg *) wqe)->addr = 0;
661                 }
662
663                 srq->wrid[ind]  = wr->wr_id;
664                 srq->first_free = next_ind;
665         }
666
667         if (likely(nreq)) {
668                 srq->counter += nreq;
669
670                 /*
671                  * Make sure that descriptors are written before
672                  * we write doorbell record.
673                  */
674                 wmb();
675                 *srq->db = cpu_to_be32(srq->counter);
676         }
677
678         spin_unlock_irqrestore(&srq->lock, flags);
679         return err;
680 }
681
682 int mthca_max_srq_sge(struct mthca_dev *dev)
683 {
684         if (mthca_is_memfree(dev))
685                 return dev->limits.max_sg;
686
687         /*
688          * SRQ allocations are based on powers of 2 for Tavor,
689          * (although they only need to be multiples of 16 bytes).
690          *
691          * Therefore, we need to base the max number of sg entries on
692          * the largest power of 2 descriptor size that is <= to the
693          * actual max WQE descriptor size, rather than return the
694          * max_sg value given by the firmware (which is based on WQE
695          * sizes as multiples of 16, not powers of 2).
696          *
697          * If SRQ implementation is changed for Tavor to be based on
698          * multiples of 16, the calculation below can be deleted and
699          * the FW max_sg value returned.
700          */
701         return min_t(int, dev->limits.max_sg,
702                      ((1 << (fls(dev->limits.max_desc_sz) - 1)) -
703                       sizeof (struct mthca_next_seg)) /
704                      sizeof (struct mthca_data_seg));
705 }
706
707 int __devinit mthca_init_srq_table(struct mthca_dev *dev)
708 {
709         int err;
710
711         if (!(dev->mthca_flags & MTHCA_FLAG_SRQ))
712                 return 0;
713
714         spin_lock_init(&dev->srq_table.lock);
715
716         err = mthca_alloc_init(&dev->srq_table.alloc,
717                                dev->limits.num_srqs,
718                                dev->limits.num_srqs - 1,
719                                dev->limits.reserved_srqs);
720         if (err)
721                 return err;
722
723         err = mthca_array_init(&dev->srq_table.srq,
724                                dev->limits.num_srqs);
725         if (err)
726                 mthca_alloc_cleanup(&dev->srq_table.alloc);
727
728         return err;
729 }
730
731 void mthca_cleanup_srq_table(struct mthca_dev *dev)
732 {
733         if (!(dev->mthca_flags & MTHCA_FLAG_SRQ))
734                 return;
735
736         mthca_array_cleanup(&dev->srq_table.srq, dev->limits.num_srqs);
737         mthca_alloc_cleanup(&dev->srq_table.alloc);
738 }