Merge /spare/repo/linux-2.6/
[linux-2.6] / drivers / media / dvb / frontends / tda80xx.c
1 /*
2  * tda80xx.c
3  *
4  * Philips TDA8044 / TDA8083 QPSK demodulator driver
5  *
6  * Copyright (C) 2001 Felix Domke <tmbinc@elitedvb.net>
7  * Copyright (C) 2002-2004 Andreas Oberritter <obi@linuxtv.org>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License, or
12  * (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  */
23
24 #include <linux/config.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/spinlock.h>
28 #include <linux/threads.h>
29 #include <linux/interrupt.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/slab.h>
33 #include <asm/div64.h>
34
35 #include "dvb_frontend.h"
36 #include "tda80xx.h"
37
38 enum {
39         ID_TDA8044 = 0x04,
40         ID_TDA8083 = 0x05,
41 };
42
43
44 struct tda80xx_state {
45
46         struct i2c_adapter* i2c;
47
48         struct dvb_frontend_ops ops;
49
50         /* configuration settings */
51         const struct tda80xx_config* config;
52
53         struct dvb_frontend frontend;
54
55         u32 clk;
56         int afc_loop;
57         struct work_struct worklet;
58         fe_code_rate_t code_rate;
59         fe_spectral_inversion_t spectral_inversion;
60         fe_status_t status;
61         u8 id;
62 };
63
64 static int debug = 1;
65 #define dprintk if (debug) printk
66
67 static u8 tda8044_inittab_pre[] = {
68         0x02, 0x00, 0x6f, 0xb5, 0x86, 0x22, 0x00, 0xea,
69         0x30, 0x42, 0x98, 0x68, 0x70, 0x42, 0x99, 0x58,
70         0x95, 0x10, 0xf5, 0xe7, 0x93, 0x0b, 0x15, 0x68,
71         0x9a, 0x90, 0x61, 0x80, 0x00, 0xe0, 0x40, 0x00,
72         0x0f, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
73         0x00, 0x00
74 };
75
76 static u8 tda8044_inittab_post[] = {
77         0x04, 0x00, 0x6f, 0xb5, 0x86, 0x22, 0x00, 0xea,
78         0x30, 0x42, 0x98, 0x68, 0x70, 0x42, 0x99, 0x50,
79         0x95, 0x10, 0xf5, 0xe7, 0x93, 0x0b, 0x15, 0x68,
80         0x9a, 0x90, 0x61, 0x80, 0x00, 0xe0, 0x40, 0x6c,
81         0x0f, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
82         0x00, 0x00
83 };
84
85 static u8 tda8083_inittab[] = {
86         0x04, 0x00, 0x4a, 0x79, 0x04, 0x00, 0xff, 0xea,
87         0x48, 0x42, 0x79, 0x60, 0x70, 0x52, 0x9a, 0x10,
88         0x0e, 0x10, 0xf2, 0xa7, 0x93, 0x0b, 0x05, 0xc8,
89         0x9d, 0x00, 0x42, 0x80, 0x00, 0x60, 0x40, 0x00,
90         0x00, 0x75, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00,
91         0x00, 0x00, 0x00, 0x00
92 };
93
94 static __inline__ u32 tda80xx_div(u32 a, u32 b)
95 {
96         return (a + (b / 2)) / b;
97 }
98
99 static __inline__ u32 tda80xx_gcd(u32 a, u32 b)
100 {
101         u32 r;
102
103         while ((r = a % b)) {
104                 a = b;
105                 b = r;
106         }
107
108         return b;
109 }
110
111 static int tda80xx_read(struct tda80xx_state* state, u8 reg, u8 *buf, u8 len)
112 {
113         int ret;
114         struct i2c_msg msg[] = { { .addr = state->config->demod_address, .flags = 0, .buf = &reg, .len = 1 },
115                           { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
116
117         ret = i2c_transfer(state->i2c, msg, 2);
118
119         if (ret != 2)
120                 dprintk("%s: readreg error (reg %02x, ret == %i)\n",
121                                 __FUNCTION__, reg, ret);
122
123         mdelay(10);
124
125         return (ret == 2) ? 0 : -EREMOTEIO;
126 }
127
128 static int tda80xx_write(struct tda80xx_state* state, u8 reg, const u8 *buf, u8 len)
129 {
130         int ret;
131         u8 wbuf[len + 1];
132         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = wbuf, .len = len + 1 };
133
134         wbuf[0] = reg;
135         memcpy(&wbuf[1], buf, len);
136
137         ret = i2c_transfer(state->i2c, &msg, 1);
138
139         if (ret != 1)
140                 dprintk("%s: i2c xfer error (ret == %i)\n", __FUNCTION__, ret);
141
142         mdelay(10);
143
144         return (ret == 1) ? 0 : -EREMOTEIO;
145 }
146
147 static __inline__ u8 tda80xx_readreg(struct tda80xx_state* state, u8 reg)
148 {
149         u8 val;
150
151         tda80xx_read(state, reg, &val, 1);
152
153         return val;
154 }
155
156 static __inline__ int tda80xx_writereg(struct tda80xx_state* state, u8 reg, u8 data)
157 {
158         return tda80xx_write(state, reg, &data, 1);
159 }
160
161 static int tda80xx_set_parameters(struct tda80xx_state* state,
162                                   fe_spectral_inversion_t inversion,
163                                   u32 symbol_rate,
164                                   fe_code_rate_t fec_inner)
165 {
166         u8 buf[15];
167         u64 ratio;
168         u32 clk;
169         u32 k;
170         u32 sr = symbol_rate;
171         u32 gcd;
172         u8 scd;
173
174         if (symbol_rate > (state->clk * 3) / 16)
175                 scd = 0;
176         else if (symbol_rate > (state->clk * 3) / 32)
177                 scd = 1;
178         else if (symbol_rate > (state->clk * 3) / 64)
179                 scd = 2;
180         else
181                 scd = 3;
182
183         clk = scd ? (state->clk / (scd * 2)) : state->clk;
184
185         /*
186          * Viterbi decoder:
187          * Differential decoding off
188          * Spectral inversion unknown
189          * QPSK modulation
190          */
191         if (inversion == INVERSION_ON)
192                 buf[0] = 0x60;
193         else if (inversion == INVERSION_OFF)
194                 buf[0] = 0x20;
195         else
196                 buf[0] = 0x00;
197
198         /*
199          * CLK ratio:
200          * system clock frequency is up to 64 or 96 MHz
201          *
202          * formula:
203          * r = k * clk / symbol_rate
204          *
205          * k:   2^21 for caa 0..3,
206          *      2^20 for caa 4..5,
207          *      2^19 for caa 6..7
208          */
209         if (symbol_rate <= (clk * 3) / 32)
210                 k = (1 << 19);
211         else if (symbol_rate <= (clk * 3) / 16)
212                 k = (1 << 20);
213         else
214                 k = (1 << 21);
215
216         gcd = tda80xx_gcd(clk, sr);
217         clk /= gcd;
218         sr /= gcd;
219
220         gcd = tda80xx_gcd(k, sr);
221         k /= gcd;
222         sr /= gcd;
223
224         ratio = (u64)k * (u64)clk;
225         do_div(ratio, sr);
226
227         buf[1] = ratio >> 16;
228         buf[2] = ratio >> 8;
229         buf[3] = ratio;
230
231         /* nyquist filter roll-off factor 35% */
232         buf[4] = 0x20;
233
234         clk = scd ? (state->clk / (scd * 2)) : state->clk;
235
236         /* Anti Alias Filter */
237         if (symbol_rate < (clk * 3) / 64)
238                 printk("tda80xx: unsupported symbol rate: %u\n", symbol_rate);
239         else if (symbol_rate <= clk / 16)
240                 buf[4] |= 0x07;
241         else if (symbol_rate <= (clk * 3) / 32)
242                 buf[4] |= 0x06;
243         else if (symbol_rate <= clk / 8)
244                 buf[4] |= 0x05;
245         else if (symbol_rate <= (clk * 3) / 16)
246                 buf[4] |= 0x04;
247         else if (symbol_rate <= clk / 4)
248                 buf[4] |= 0x03;
249         else if (symbol_rate <= (clk * 3) / 8)
250                 buf[4] |= 0x02;
251         else if (symbol_rate <= clk / 2)
252                 buf[4] |= 0x01;
253         else
254                 buf[4] |= 0x00;
255
256         /* Sigma Delta converter */
257         buf[5] = 0x00;
258
259         /* FEC: Possible puncturing rates */
260         if (fec_inner == FEC_NONE)
261                 buf[6] = 0x00;
262         else if ((fec_inner >= FEC_1_2) && (fec_inner <= FEC_8_9))
263                 buf[6] = (1 << (8 - fec_inner));
264         else if (fec_inner == FEC_AUTO)
265                 buf[6] = 0xff;
266         else
267                 return -EINVAL;
268
269         /* carrier lock detector threshold value */
270         buf[7] = 0x30;
271         /* AFC1: proportional part settings */
272         buf[8] = 0x42;
273         /* AFC1: integral part settings */
274         buf[9] = 0x98;
275         /* PD: Leaky integrator SCPC mode */
276         buf[10] = 0x28;
277         /* AFC2, AFC1 controls */
278         buf[11] = 0x30;
279         /* PD: proportional part settings */
280         buf[12] = 0x42;
281         /* PD: integral part settings */
282         buf[13] = 0x99;
283         /* AGC */
284         buf[14] = 0x50 | scd;
285
286         printk("symbol_rate=%u clk=%u\n", symbol_rate, clk);
287
288         return tda80xx_write(state, 0x01, buf, sizeof(buf));
289 }
290
291 static int tda80xx_set_clk(struct tda80xx_state* state)
292 {
293         u8 buf[2];
294
295         /* CLK proportional part */
296         buf[0] = (0x06 << 5) | 0x08;    /* CMP[2:0], CSP[4:0] */
297         /* CLK integral part */
298         buf[1] = (0x04 << 5) | 0x1a;    /* CMI[2:0], CSI[4:0] */
299
300         return tda80xx_write(state, 0x17, buf, sizeof(buf));
301 }
302
303 #if 0
304 static int tda80xx_set_scpc_freq_offset(struct tda80xx_state* state)
305 {
306         /* a constant value is nonsense here imho */
307         return tda80xx_writereg(state, 0x22, 0xf9);
308 }
309 #endif
310
311 static int tda80xx_close_loop(struct tda80xx_state* state)
312 {
313         u8 buf[2];
314
315         /* PD: Loop closed, LD: lock detect enable, SCPC: Sweep mode - AFC1 loop closed */
316         buf[0] = 0x68;
317         /* AFC1: Loop closed, CAR Feedback: 8192 */
318         buf[1] = 0x70;
319
320         return tda80xx_write(state, 0x0b, buf, sizeof(buf));
321 }
322
323 static irqreturn_t tda80xx_irq(int irq, void *priv, struct pt_regs *pt)
324 {
325         schedule_work(priv);
326
327         return IRQ_HANDLED;
328 }
329
330 static void tda80xx_read_status_int(struct tda80xx_state* state)
331 {
332         u8 val;
333
334         static const fe_spectral_inversion_t inv_tab[] = {
335                 INVERSION_OFF, INVERSION_ON
336         };
337
338         static const fe_code_rate_t fec_tab[] = {
339                 FEC_8_9, FEC_1_2, FEC_2_3, FEC_3_4,
340                 FEC_4_5, FEC_5_6, FEC_6_7, FEC_7_8,
341         };
342
343         val = tda80xx_readreg(state, 0x02);
344
345         state->status = 0;
346
347         if (val & 0x01) /* demodulator lock */
348                 state->status |= FE_HAS_SIGNAL;
349         if (val & 0x02) /* clock recovery lock */
350                 state->status |= FE_HAS_CARRIER;
351         if (val & 0x04) /* viterbi lock */
352                 state->status |= FE_HAS_VITERBI;
353         if (val & 0x08) /* deinterleaver lock (packet sync) */
354                 state->status |= FE_HAS_SYNC;
355         if (val & 0x10) /* derandomizer lock (frame sync) */
356                 state->status |= FE_HAS_LOCK;
357         if (val & 0x20) /* frontend can not lock */
358                 state->status |= FE_TIMEDOUT;
359
360         if ((state->status & (FE_HAS_CARRIER)) && (state->afc_loop)) {
361                 printk("tda80xx: closing loop\n");
362                 tda80xx_close_loop(state);
363                 state->afc_loop = 0;
364         }
365
366         if (state->status & (FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK)) {
367                 val = tda80xx_readreg(state, 0x0e);
368                 state->code_rate = fec_tab[val & 0x07];
369                 if (state->status & (FE_HAS_SYNC | FE_HAS_LOCK))
370                         state->spectral_inversion = inv_tab[(val >> 7) & 0x01];
371                 else
372                         state->spectral_inversion = INVERSION_AUTO;
373         }
374         else {
375                 state->code_rate = FEC_AUTO;
376         }
377 }
378
379 static void tda80xx_worklet(void *priv)
380 {
381         struct tda80xx_state *state = priv;
382
383         tda80xx_writereg(state, 0x00, 0x04);
384         enable_irq(state->config->irq);
385
386         tda80xx_read_status_int(state);
387 }
388
389 static void tda80xx_wait_diseqc_fifo(struct tda80xx_state* state)
390 {
391         size_t i;
392
393         for (i = 0; i < 100; i++) {
394                 if (tda80xx_readreg(state, 0x02) & 0x80)
395                         break;
396                 msleep(10);
397         }
398 }
399
400 static int tda8044_init(struct dvb_frontend* fe)
401 {
402         struct tda80xx_state* state = fe->demodulator_priv;
403         int ret;
404
405         /*
406          * this function is a mess...
407          */
408
409         if ((ret = tda80xx_write(state, 0x00, tda8044_inittab_pre, sizeof(tda8044_inittab_pre))))
410                 return ret;
411
412         tda80xx_writereg(state, 0x0f, 0x50);
413 #if 1
414         tda80xx_writereg(state, 0x20, 0x8F);            /* FIXME */
415         tda80xx_writereg(state, 0x20, state->config->volt18setting);    /* FIXME */
416         //tda80xx_writereg(state, 0x00, 0x04);
417         tda80xx_writereg(state, 0x00, 0x0C);
418 #endif
419         //tda80xx_writereg(state, 0x00, 0x08); /* Reset AFC1 loop filter */
420
421         tda80xx_write(state, 0x00, tda8044_inittab_post, sizeof(tda8044_inittab_post));
422
423         if (state->config->pll_init) {
424                 tda80xx_writereg(state, 0x1c, 0x80);
425                 state->config->pll_init(fe);
426                 tda80xx_writereg(state, 0x1c, 0x00);
427         }
428
429         return 0;
430 }
431
432 static int tda8083_init(struct dvb_frontend* fe)
433 {
434         struct tda80xx_state* state = fe->demodulator_priv;
435
436         tda80xx_write(state, 0x00, tda8083_inittab, sizeof(tda8083_inittab));
437
438         if (state->config->pll_init) {
439                 tda80xx_writereg(state, 0x1c, 0x80);
440                 state->config->pll_init(fe);
441                 tda80xx_writereg(state, 0x1c, 0x00);
442         }
443
444         return 0;
445 }
446
447 static int tda80xx_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
448 {
449         struct tda80xx_state* state = fe->demodulator_priv;
450
451         switch (voltage) {
452         case SEC_VOLTAGE_13:
453                 return tda80xx_writereg(state, 0x20, state->config->volt13setting);
454         case SEC_VOLTAGE_18:
455                 return tda80xx_writereg(state, 0x20, state->config->volt18setting);
456         case SEC_VOLTAGE_OFF:
457                 return tda80xx_writereg(state, 0x20, 0);
458         default:
459                 return -EINVAL;
460         }
461 }
462
463 static int tda80xx_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
464 {
465         struct tda80xx_state* state = fe->demodulator_priv;
466
467         switch (tone) {
468         case SEC_TONE_OFF:
469                 return tda80xx_writereg(state, 0x29, 0x00);
470         case SEC_TONE_ON:
471                 return tda80xx_writereg(state, 0x29, 0x80);
472         default:
473                 return -EINVAL;
474         }
475 }
476
477 static int tda80xx_send_diseqc_msg(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd *cmd)
478 {
479         struct tda80xx_state* state = fe->demodulator_priv;
480
481         if (cmd->msg_len > 6)
482                 return -EINVAL;
483
484         tda80xx_writereg(state, 0x29, 0x08 | (cmd->msg_len - 3));
485         tda80xx_write(state, 0x23, cmd->msg, cmd->msg_len);
486         tda80xx_writereg(state, 0x29, 0x0c | (cmd->msg_len - 3));
487         tda80xx_wait_diseqc_fifo(state);
488
489         return 0;
490 }
491
492 static int tda80xx_send_diseqc_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t cmd)
493 {
494         struct tda80xx_state* state = fe->demodulator_priv;
495
496         switch (cmd) {
497         case SEC_MINI_A:
498                 tda80xx_writereg(state, 0x29, 0x14);
499                 break;
500         case SEC_MINI_B:
501                 tda80xx_writereg(state, 0x29, 0x1c);
502                 break;
503         default:
504                 return -EINVAL;
505         }
506
507         tda80xx_wait_diseqc_fifo(state);
508
509         return 0;
510 }
511
512 static int tda80xx_sleep(struct dvb_frontend* fe)
513 {
514         struct tda80xx_state* state = fe->demodulator_priv;
515
516         tda80xx_writereg(state, 0x00, 0x02);    /* enter standby */
517
518         return 0;
519 }
520
521 static int tda80xx_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
522 {
523         struct tda80xx_state* state = fe->demodulator_priv;
524
525         tda80xx_writereg(state, 0x1c, 0x80);
526         state->config->pll_set(fe, p);
527         tda80xx_writereg(state, 0x1c, 0x00);
528
529         tda80xx_set_parameters(state, p->inversion, p->u.qpsk.symbol_rate, p->u.qpsk.fec_inner);
530         tda80xx_set_clk(state);
531         //tda80xx_set_scpc_freq_offset(state);
532         state->afc_loop = 1;
533
534         return 0;
535 }
536
537 static int tda80xx_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
538 {
539         struct tda80xx_state* state = fe->demodulator_priv;
540
541         if (!state->config->irq)
542                 tda80xx_read_status_int(state);
543
544         p->inversion = state->spectral_inversion;
545         p->u.qpsk.fec_inner = state->code_rate;
546
547         return 0;
548 }
549
550 static int tda80xx_read_status(struct dvb_frontend* fe, fe_status_t* status)
551 {
552         struct tda80xx_state* state = fe->demodulator_priv;
553
554         if (!state->config->irq)
555                 tda80xx_read_status_int(state);
556         *status = state->status;
557
558         return 0;
559 }
560
561 static int tda80xx_read_ber(struct dvb_frontend* fe, u32* ber)
562 {
563         struct tda80xx_state* state = fe->demodulator_priv;
564         int ret;
565         u8 buf[3];
566
567         if ((ret = tda80xx_read(state, 0x0b, buf, sizeof(buf))))
568                 return ret;
569
570         *ber = ((buf[0] & 0x1f) << 16) | (buf[1] << 8) | buf[2];
571
572         return 0;
573 }
574
575 static int tda80xx_read_signal_strength(struct dvb_frontend* fe, u16* strength)
576 {
577         struct tda80xx_state* state = fe->demodulator_priv;
578
579         u8 gain = ~tda80xx_readreg(state, 0x01);
580         *strength = (gain << 8) | gain;
581
582         return 0;
583 }
584
585 static int tda80xx_read_snr(struct dvb_frontend* fe, u16* snr)
586 {
587         struct tda80xx_state* state = fe->demodulator_priv;
588
589         u8 quality = tda80xx_readreg(state, 0x08);
590         *snr = (quality << 8) | quality;
591
592         return 0;
593 }
594
595 static int tda80xx_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
596 {
597         struct tda80xx_state* state = fe->demodulator_priv;
598
599         *ucblocks = tda80xx_readreg(state, 0x0f);
600         if (*ucblocks == 0xff)
601                 *ucblocks = 0xffffffff;
602
603         return 0;
604 }
605
606 static int tda80xx_init(struct dvb_frontend* fe)
607 {
608         struct tda80xx_state* state = fe->demodulator_priv;
609
610         switch(state->id) {
611         case ID_TDA8044:
612                 return tda8044_init(fe);
613
614         case ID_TDA8083:
615                 return tda8083_init(fe);
616         }
617         return 0;
618 }
619
620 static void tda80xx_release(struct dvb_frontend* fe)
621 {
622         struct tda80xx_state* state = fe->demodulator_priv;
623
624         if (state->config->irq)
625                 free_irq(state->config->irq, &state->worklet);
626
627         kfree(state);
628 }
629
630 static struct dvb_frontend_ops tda80xx_ops;
631
632 struct dvb_frontend* tda80xx_attach(const struct tda80xx_config* config,
633                                     struct i2c_adapter* i2c)
634 {
635         struct tda80xx_state* state = NULL;
636         int ret;
637
638         /* allocate memory for the internal state */
639         state = kmalloc(sizeof(struct tda80xx_state), GFP_KERNEL);
640         if (state == NULL) goto error;
641
642         /* setup the state */
643         state->config = config;
644         state->i2c = i2c;
645         memcpy(&state->ops, &tda80xx_ops, sizeof(struct dvb_frontend_ops));
646         state->spectral_inversion = INVERSION_AUTO;
647         state->code_rate = FEC_AUTO;
648         state->status = 0;
649         state->afc_loop = 0;
650
651         /* check if the demod is there */
652         if (tda80xx_writereg(state, 0x89, 0x00) < 0) goto error;
653         state->id = tda80xx_readreg(state, 0x00);
654
655         switch (state->id) {
656         case ID_TDA8044:
657                 state->clk = 96000000;
658                 printk("tda80xx: Detected tda8044\n");
659                 break;
660
661         case ID_TDA8083:
662                 state->clk = 64000000;
663                 printk("tda80xx: Detected tda8083\n");
664                 break;
665
666         default:
667                 goto error;
668         }
669
670         /* setup IRQ */
671         if (state->config->irq) {
672                 INIT_WORK(&state->worklet, tda80xx_worklet, state);
673                 if ((ret = request_irq(state->config->irq, tda80xx_irq, SA_ONESHOT, "tda80xx", &state->worklet)) < 0) {
674                         printk(KERN_ERR "tda80xx: request_irq failed (%d)\n", ret);
675                         goto error;
676                 }
677         }
678
679         /* create dvb_frontend */
680         state->frontend.ops = &state->ops;
681         state->frontend.demodulator_priv = state;
682         return &state->frontend;
683
684 error:
685         kfree(state);
686         return NULL;
687 }
688
689 static struct dvb_frontend_ops tda80xx_ops = {
690
691         .info = {
692                 .name = "Philips TDA80xx DVB-S",
693                 .type = FE_QPSK,
694                 .frequency_min = 500000,
695                 .frequency_max = 2700000,
696                 .frequency_stepsize = 125,
697                 .symbol_rate_min = 4500000,
698                 .symbol_rate_max = 45000000,
699                 .caps = FE_CAN_INVERSION_AUTO |
700                         FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
701                         FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
702                         FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO |
703                         FE_CAN_QPSK |
704                         FE_CAN_MUTE_TS
705         },
706
707         .release = tda80xx_release,
708
709         .init = tda80xx_init,
710         .sleep = tda80xx_sleep,
711
712         .set_frontend = tda80xx_set_frontend,
713         .get_frontend = tda80xx_get_frontend,
714
715         .read_status = tda80xx_read_status,
716         .read_ber = tda80xx_read_ber,
717         .read_signal_strength = tda80xx_read_signal_strength,
718         .read_snr = tda80xx_read_snr,
719         .read_ucblocks = tda80xx_read_ucblocks,
720
721         .diseqc_send_master_cmd = tda80xx_send_diseqc_msg,
722         .diseqc_send_burst = tda80xx_send_diseqc_burst,
723         .set_tone = tda80xx_set_tone,
724         .set_voltage = tda80xx_set_voltage,
725 };
726
727 module_param(debug, int, 0644);
728
729 MODULE_DESCRIPTION("Philips TDA8044 / TDA8083 DVB-S Demodulator driver");
730 MODULE_AUTHOR("Felix Domke, Andreas Oberritter");
731 MODULE_LICENSE("GPL");
732
733 EXPORT_SYMBOL(tda80xx_attach);