4 #include <linux/config.h>
5 #include <linux/string.h>
6 #include <linux/compiler.h>
9 * This file contains the definitions for the x86 IO instructions
10 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
11 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
12 * versions of the single-IO instructions (inb_p/inw_p/..).
14 * This file is not meant to be obfuscating: it's just complicated
15 * to (a) handle it all in a way that makes gcc able to optimize it
16 * as well as possible and (b) trying to avoid writing the same thing
17 * over and over again with slight variations and possibly making a
22 * Thanks to James van Artsdalen for a better timing-fix than
23 * the two short jumps: using outb's to a nonexistent port seems
24 * to guarantee better timings even on fast machines.
26 * On the other hand, I'd like to be sure of a non-existent port:
27 * I feel a bit unsafe about using 0x80 (should be safe, though)
33 * Bit simplified and optimized by Jan Hubicka
34 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
36 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
37 * isa_read[wl] and isa_write[wl] fixed
38 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
41 #define IO_SPACE_LIMIT 0xffff
43 #define XQUAD_PORTIO_BASE 0xfe400000
44 #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
48 #include <asm-generic/iomap.h>
50 #include <linux/vmalloc.h>
53 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
56 #define xlate_dev_mem_ptr(p) __va(p)
59 * Convert a virtual cached pointer to an uncached pointer
61 #define xlate_dev_kmem_ptr(p) p
64 * virt_to_phys - map virtual addresses to physical
65 * @address: address to remap
67 * The returned physical address is the physical (CPU) mapping for
68 * the memory address given. It is only valid to use this function on
69 * addresses directly mapped or allocated via kmalloc.
71 * This function does not give bus mappings for DMA transfers. In
72 * almost all conceivable cases a device driver should not be using
76 static inline unsigned long virt_to_phys(volatile void * address)
82 * phys_to_virt - map physical address to virtual
83 * @address: address to remap
85 * The returned virtual address is a current CPU mapping for
86 * the memory address given. It is only valid to use this function on
87 * addresses that have a kernel mapping
89 * This function does not handle bus mappings for DMA transfers. In
90 * almost all conceivable cases a device driver should not be using
94 static inline void * phys_to_virt(unsigned long address)
100 * Change "struct page" to physical address.
102 #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
104 extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
107 * ioremap - map bus memory into CPU space
108 * @offset: bus address of the memory
109 * @size: size of the resource to map
111 * ioremap performs a platform specific sequence of operations to
112 * make bus memory CPU accessible via the readb/readw/readl/writeb/
113 * writew/writel functions and the other mmio helpers. The returned
114 * address is not guaranteed to be usable directly as a virtual
118 static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
120 return __ioremap(offset, size, 0);
123 extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
124 extern void iounmap(volatile void __iomem *addr);
127 * bt_ioremap() and bt_iounmap() are for temporary early boot-time
128 * mappings, before the real ioremap() is functional.
129 * A boot-time mapping is currently limited to at most 16 pages.
131 extern void *bt_ioremap(unsigned long offset, unsigned long size);
132 extern void bt_iounmap(void *addr, unsigned long size);
134 /* Use early IO mappings for DMI because it's initialized early */
135 #define dmi_ioremap bt_ioremap
136 #define dmi_iounmap bt_iounmap
137 #define dmi_alloc alloc_bootmem
140 * ISA I/O bus memory addresses are 1:1 with the physical address.
142 #define isa_virt_to_bus virt_to_phys
143 #define isa_page_to_bus page_to_phys
144 #define isa_bus_to_virt phys_to_virt
147 * However PCI ones are not necessarily 1:1 and therefore these interfaces
148 * are forbidden in portable PCI drivers.
150 * Allow them on x86 for legacy drivers, though.
152 #define virt_to_bus virt_to_phys
153 #define bus_to_virt phys_to_virt
156 * readX/writeX() are used to access memory mapped devices. On some
157 * architectures the memory mapped IO stuff needs to be accessed
158 * differently. On the x86 architecture, we just read/write the
159 * memory location directly.
162 static inline unsigned char readb(const volatile void __iomem *addr)
164 return *(volatile unsigned char __force *) addr;
166 static inline unsigned short readw(const volatile void __iomem *addr)
168 return *(volatile unsigned short __force *) addr;
170 static inline unsigned int readl(const volatile void __iomem *addr)
172 return *(volatile unsigned int __force *) addr;
174 #define readb_relaxed(addr) readb(addr)
175 #define readw_relaxed(addr) readw(addr)
176 #define readl_relaxed(addr) readl(addr)
177 #define __raw_readb readb
178 #define __raw_readw readw
179 #define __raw_readl readl
181 static inline void writeb(unsigned char b, volatile void __iomem *addr)
183 *(volatile unsigned char __force *) addr = b;
185 static inline void writew(unsigned short b, volatile void __iomem *addr)
187 *(volatile unsigned short __force *) addr = b;
189 static inline void writel(unsigned int b, volatile void __iomem *addr)
191 *(volatile unsigned int __force *) addr = b;
193 #define __raw_writeb writeb
194 #define __raw_writew writew
195 #define __raw_writel writel
199 static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
201 memset((void __force *) addr, val, count);
203 static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
205 __memcpy(dst, (void __force *) src, count);
207 static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
209 __memcpy((void __force *) dst, src, count);
213 * ISA space is 'always mapped' on a typical x86 system, no need to
214 * explicitly ioremap() it. The fact that the ISA IO space is mapped
215 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
216 * are physical addresses. The following constant pointer can be
217 * used as the IO-area pointer (it can be iounmapped as well, so the
218 * analogy with PCI is quite large):
220 #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
223 * Again, i386 does not require mem IO specific function.
226 #define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(b),(c),(d))
229 * check_signature - find BIOS signatures
230 * @io_addr: mmio address to check
231 * @signature: signature block
232 * @length: length of signature
234 * Perform a signature comparison with the mmio address io_addr. This
235 * address should have been obtained by ioremap.
236 * Returns 1 on a match.
239 static inline int check_signature(volatile void __iomem * io_addr,
240 const unsigned char *signature, int length)
244 if (readb(io_addr) != *signature)
258 * This needed for two cases
259 * 1. Out of order aware processors
260 * 2. Accidentally out of order processors (PPro errata #51)
263 #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
265 static inline void flush_write_buffers(void)
267 __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
270 #define dma_cache_inv(_start,_size) flush_write_buffers()
271 #define dma_cache_wback(_start,_size) flush_write_buffers()
272 #define dma_cache_wback_inv(_start,_size) flush_write_buffers()
278 #define dma_cache_inv(_start,_size) do { } while (0)
279 #define dma_cache_wback(_start,_size) do { } while (0)
280 #define dma_cache_wback_inv(_start,_size) do { } while (0)
281 #define flush_write_buffers()
285 #endif /* __KERNEL__ */
287 #ifdef SLOW_IO_BY_JUMPING
288 #define __SLOW_DOWN_IO "jmp 1f; 1: jmp 1f; 1:"
290 #define __SLOW_DOWN_IO "outb %%al,$0x80;"
293 static inline void slow_down_io(void) {
294 __asm__ __volatile__(
296 #ifdef REALLY_SLOW_IO
297 __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
302 #ifdef CONFIG_X86_NUMAQ
303 extern void *xquad_portio; /* Where the IO area was mapped */
304 #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
305 #define __BUILDIO(bwl,bw,type) \
306 static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \
308 write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \
310 out##bwl##_local(value, port); \
312 static inline void out##bwl(unsigned type value, int port) { \
313 out##bwl##_quad(value, port, 0); \
315 static inline unsigned type in##bwl##_quad(int port, int quad) { \
317 return read##bwl(XQUAD_PORT_ADDR(port, quad)); \
319 return in##bwl##_local(port); \
321 static inline unsigned type in##bwl(int port) { \
322 return in##bwl##_quad(port, 0); \
325 #define __BUILDIO(bwl,bw,type) \
326 static inline void out##bwl(unsigned type value, int port) { \
327 out##bwl##_local(value, port); \
329 static inline unsigned type in##bwl(int port) { \
330 return in##bwl##_local(port); \
335 #define BUILDIO(bwl,bw,type) \
336 static inline void out##bwl##_local(unsigned type value, int port) { \
337 __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
339 static inline unsigned type in##bwl##_local(int port) { \
340 unsigned type value; \
341 __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
344 static inline void out##bwl##_local_p(unsigned type value, int port) { \
345 out##bwl##_local(value, port); \
348 static inline unsigned type in##bwl##_local_p(int port) { \
349 unsigned type value = in##bwl##_local(port); \
353 __BUILDIO(bwl,bw,type) \
354 static inline void out##bwl##_p(unsigned type value, int port) { \
355 out##bwl(value, port); \
358 static inline unsigned type in##bwl##_p(int port) { \
359 unsigned type value = in##bwl(port); \
363 static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
364 __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
366 static inline void ins##bwl(int port, void *addr, unsigned long count) { \
367 __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \