2 * linux/drivers/mmc/pxa.c - PXA MMCI driver
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This hardware is really sick:
11 * - No way to clear interrupts.
12 * - Have to turn off the clock whenever we touch the device.
13 * - Doesn't tell you how many data blocks were transferred.
16 * 1 and 3 byte data transfers not supported
17 * max block length up to 1023
19 #include <linux/config.h>
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/ioport.h>
23 #include <linux/platform_device.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/mmc/host.h>
28 #include <linux/mmc/protocol.h>
32 #include <asm/scatterlist.h>
33 #include <asm/sizes.h>
35 #include <asm/arch/pxa-regs.h>
36 #include <asm/arch/mmc.h>
40 #define DRIVER_NAME "pxa2xx-mci"
54 unsigned int power_mode;
55 struct pxamci_platform_data *pdata;
57 struct mmc_request *mrq;
58 struct mmc_command *cmd;
59 struct mmc_data *data;
62 struct pxa_dma_desc *sg_cpu;
68 static void pxamci_stop_clock(struct pxamci_host *host)
70 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
71 unsigned long timeout = 10000;
74 writel(STOP_CLOCK, host->base + MMC_STRPCL);
77 v = readl(host->base + MMC_STAT);
78 if (!(v & STAT_CLK_EN))
84 dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
88 static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
92 spin_lock_irqsave(&host->lock, flags);
94 writel(host->imask, host->base + MMC_I_MASK);
95 spin_unlock_irqrestore(&host->lock, flags);
98 static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
102 spin_lock_irqsave(&host->lock, flags);
104 writel(host->imask, host->base + MMC_I_MASK);
105 spin_unlock_irqrestore(&host->lock, flags);
108 static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
110 unsigned int nob = data->blocks;
111 unsigned long long clks;
112 unsigned int timeout;
118 if (data->flags & MMC_DATA_STREAM)
121 writel(nob, host->base + MMC_NOB);
122 writel(data->blksz, host->base + MMC_BLKLEN);
124 clks = (unsigned long long)data->timeout_ns * CLOCKRATE;
125 do_div(clks, 1000000000UL);
126 timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
127 writel((timeout + 255) / 256, host->base + MMC_RDTO);
129 if (data->flags & MMC_DATA_READ) {
130 host->dma_dir = DMA_FROM_DEVICE;
131 dcmd = DCMD_INCTRGADDR | DCMD_FLOWTRG;
133 DRCMRRXMMC = host->dma | DRCMR_MAPVLD;
135 host->dma_dir = DMA_TO_DEVICE;
136 dcmd = DCMD_INCSRCADDR | DCMD_FLOWSRC;
138 DRCMRTXMMC = host->dma | DRCMR_MAPVLD;
141 dcmd |= DCMD_BURST32 | DCMD_WIDTH1;
143 host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
146 for (i = 0; i < host->dma_len; i++) {
147 if (data->flags & MMC_DATA_READ) {
148 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
149 host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]);
151 host->sg_cpu[i].dsadr = sg_dma_address(&data->sg[i]);
152 host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO;
154 host->sg_cpu[i].dcmd = dcmd | sg_dma_len(&data->sg[i]);
155 host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) *
156 sizeof(struct pxa_dma_desc);
158 host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP;
161 DDADR(host->dma) = host->sg_dma;
162 DCSR(host->dma) = DCSR_RUN;
165 static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
167 WARN_ON(host->cmd != NULL);
170 if (cmd->flags & MMC_RSP_BUSY)
173 #define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
174 switch (RSP_TYPE(mmc_resp_type(cmd))) {
175 case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6 */
176 cmdat |= CMDAT_RESP_SHORT;
178 case RSP_TYPE(MMC_RSP_R3):
179 cmdat |= CMDAT_RESP_R3;
181 case RSP_TYPE(MMC_RSP_R2):
182 cmdat |= CMDAT_RESP_R2;
188 writel(cmd->opcode, host->base + MMC_CMD);
189 writel(cmd->arg >> 16, host->base + MMC_ARGH);
190 writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
191 writel(cmdat, host->base + MMC_CMDAT);
192 writel(host->clkrt, host->base + MMC_CLKRT);
194 writel(START_CLOCK, host->base + MMC_STRPCL);
196 pxamci_enable_irq(host, END_CMD_RES);
199 static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
204 mmc_request_done(host->mmc, mrq);
207 static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
209 struct mmc_command *cmd = host->cmd;
219 * Did I mention this is Sick. We always need to
220 * discard the upper 8 bits of the first 16-bit word.
222 v = readl(host->base + MMC_RES) & 0xffff;
223 for (i = 0; i < 4; i++) {
224 u32 w1 = readl(host->base + MMC_RES) & 0xffff;
225 u32 w2 = readl(host->base + MMC_RES) & 0xffff;
226 cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8;
230 if (stat & STAT_TIME_OUT_RESPONSE) {
231 cmd->error = MMC_ERR_TIMEOUT;
232 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
235 * workaround for erratum #42:
236 * Intel PXA27x Family Processor Specification Update Rev 001
238 if (cmd->opcode == MMC_ALL_SEND_CID ||
239 cmd->opcode == MMC_SEND_CSD ||
240 cmd->opcode == MMC_SEND_CID) {
241 /* a bogus CRC error can appear if the msb of
242 the 15 byte response is a one */
243 if ((cmd->resp[0] & 0x80000000) == 0)
244 cmd->error = MMC_ERR_BADCRC;
246 pr_debug("ignoring CRC from command %d - *risky*\n",cmd->opcode);
249 cmd->error = MMC_ERR_BADCRC;
253 pxamci_disable_irq(host, END_CMD_RES);
254 if (host->data && cmd->error == MMC_ERR_NONE) {
255 pxamci_enable_irq(host, DATA_TRAN_DONE);
257 pxamci_finish_request(host, host->mrq);
263 static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
265 struct mmc_data *data = host->data;
271 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len,
274 if (stat & STAT_READ_TIME_OUT)
275 data->error = MMC_ERR_TIMEOUT;
276 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
277 data->error = MMC_ERR_BADCRC;
280 * There appears to be a hardware design bug here. There seems to
281 * be no way to find out how much data was transferred to the card.
282 * This means that if there was an error on any block, we mark all
283 * data blocks as being in error.
285 if (data->error == MMC_ERR_NONE)
286 data->bytes_xfered = data->blocks * data->blksz;
288 data->bytes_xfered = 0;
290 pxamci_disable_irq(host, DATA_TRAN_DONE);
293 if (host->mrq->stop) {
294 pxamci_stop_clock(host);
295 pxamci_start_cmd(host, host->mrq->stop, 0);
297 pxamci_finish_request(host, host->mrq);
303 static irqreturn_t pxamci_irq(int irq, void *devid, struct pt_regs *regs)
305 struct pxamci_host *host = devid;
309 ireg = readl(host->base + MMC_I_REG);
312 unsigned stat = readl(host->base + MMC_STAT);
314 pr_debug("PXAMCI: irq %08x stat %08x\n", ireg, stat);
316 if (ireg & END_CMD_RES)
317 handled |= pxamci_cmd_done(host, stat);
318 if (ireg & DATA_TRAN_DONE)
319 handled |= pxamci_data_done(host, stat);
322 return IRQ_RETVAL(handled);
325 static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq)
327 struct pxamci_host *host = mmc_priv(mmc);
330 WARN_ON(host->mrq != NULL);
334 pxamci_stop_clock(host);
337 host->cmdat &= ~CMDAT_INIT;
340 pxamci_setup_data(host, mrq->data);
342 cmdat &= ~CMDAT_BUSY;
343 cmdat |= CMDAT_DATAEN | CMDAT_DMAEN;
344 if (mrq->data->flags & MMC_DATA_WRITE)
345 cmdat |= CMDAT_WRITE;
347 if (mrq->data->flags & MMC_DATA_STREAM)
348 cmdat |= CMDAT_STREAM;
351 pxamci_start_cmd(host, mrq->cmd, cmdat);
354 static int pxamci_get_ro(struct mmc_host *mmc)
356 struct pxamci_host *host = mmc_priv(mmc);
358 if (host->pdata && host->pdata->get_ro)
359 return host->pdata->get_ro(mmc->dev);
360 /* Host doesn't support read only detection so assume writeable */
364 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
366 struct pxamci_host *host = mmc_priv(mmc);
369 unsigned int clk = CLOCKRATE / ios->clock;
370 if (CLOCKRATE / clk > ios->clock)
372 host->clkrt = fls(clk) - 1;
373 pxa_set_cken(CKEN12_MMC, 1);
376 * we write clkrt on the next command
379 pxamci_stop_clock(host);
380 pxa_set_cken(CKEN12_MMC, 0);
383 if (host->power_mode != ios->power_mode) {
384 host->power_mode = ios->power_mode;
386 if (host->pdata && host->pdata->setpower)
387 host->pdata->setpower(mmc->dev, ios->vdd);
389 if (ios->power_mode == MMC_POWER_ON)
390 host->cmdat |= CMDAT_INIT;
393 pr_debug("PXAMCI: clkrt = %x cmdat = %x\n",
394 host->clkrt, host->cmdat);
397 static struct mmc_host_ops pxamci_ops = {
398 .request = pxamci_request,
399 .get_ro = pxamci_get_ro,
400 .set_ios = pxamci_set_ios,
403 static void pxamci_dma_irq(int dma, void *devid, struct pt_regs *regs)
405 printk(KERN_ERR "DMA%d: IRQ???\n", dma);
406 DCSR(dma) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
409 static irqreturn_t pxamci_detect_irq(int irq, void *devid, struct pt_regs *regs)
411 struct pxamci_host *host = mmc_priv(devid);
413 mmc_detect_change(devid, host->pdata->detect_delay);
417 static int pxamci_probe(struct platform_device *pdev)
419 struct mmc_host *mmc;
420 struct pxamci_host *host = NULL;
424 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
425 irq = platform_get_irq(pdev, 0);
429 r = request_mem_region(r->start, SZ_4K, DRIVER_NAME);
433 mmc = mmc_alloc_host(sizeof(struct pxamci_host), &pdev->dev);
439 mmc->ops = &pxamci_ops;
440 mmc->f_min = CLOCKRATE_MIN;
441 mmc->f_max = CLOCKRATE_MAX;
444 * We can do SG-DMA, but we don't because we never know how much
445 * data we successfully wrote to the card.
447 mmc->max_phys_segs = NR_SG;
450 * Our hardware DMA can handle a maximum of one page per SG entry.
452 mmc->max_seg_size = PAGE_SIZE;
454 host = mmc_priv(mmc);
457 host->pdata = pdev->dev.platform_data;
458 mmc->ocr_avail = host->pdata ?
459 host->pdata->ocr_mask :
460 MMC_VDD_32_33|MMC_VDD_33_34;
462 host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
468 spin_lock_init(&host->lock);
471 host->imask = MMC_I_MASK_ALL;
473 host->base = ioremap(r->start, SZ_4K);
480 * Ensure that the host controller is shut down, and setup
483 pxamci_stop_clock(host);
484 writel(0, host->base + MMC_SPI);
485 writel(64, host->base + MMC_RESTO);
486 writel(host->imask, host->base + MMC_I_MASK);
488 host->dma = pxa_request_dma(DRIVER_NAME, DMA_PRIO_LOW,
489 pxamci_dma_irq, host);
495 ret = request_irq(host->irq, pxamci_irq, 0, DRIVER_NAME, host);
499 platform_set_drvdata(pdev, mmc);
501 if (host->pdata && host->pdata->init)
502 host->pdata->init(&pdev->dev, pxamci_detect_irq, mmc);
511 pxa_free_dma(host->dma);
515 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
523 static int pxamci_remove(struct platform_device *pdev)
525 struct mmc_host *mmc = platform_get_drvdata(pdev);
527 platform_set_drvdata(pdev, NULL);
530 struct pxamci_host *host = mmc_priv(mmc);
532 if (host->pdata && host->pdata->exit)
533 host->pdata->exit(&pdev->dev, mmc);
535 mmc_remove_host(mmc);
537 pxamci_stop_clock(host);
538 writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
539 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
540 host->base + MMC_I_MASK);
545 free_irq(host->irq, host);
546 pxa_free_dma(host->dma);
548 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
550 release_resource(host->res);
558 static int pxamci_suspend(struct platform_device *dev, pm_message_t state)
560 struct mmc_host *mmc = platform_get_drvdata(dev);
564 ret = mmc_suspend_host(mmc, state);
569 static int pxamci_resume(struct platform_device *dev)
571 struct mmc_host *mmc = platform_get_drvdata(dev);
575 ret = mmc_resume_host(mmc);
580 #define pxamci_suspend NULL
581 #define pxamci_resume NULL
584 static struct platform_driver pxamci_driver = {
585 .probe = pxamci_probe,
586 .remove = pxamci_remove,
587 .suspend = pxamci_suspend,
588 .resume = pxamci_resume,
594 static int __init pxamci_init(void)
596 return platform_driver_register(&pxamci_driver);
599 static void __exit pxamci_exit(void)
601 platform_driver_unregister(&pxamci_driver);
604 module_init(pxamci_init);
605 module_exit(pxamci_exit);
607 MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver");
608 MODULE_LICENSE("GPL");