3 * PCI address cache; allows the lookup of PCI devices based on I/O address
5 * Copyright IBM Corporation 2004
6 * Copyright Linas Vepstas <linas@austin.ibm.com> 2004
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/list.h>
24 #include <linux/pci.h>
25 #include <linux/rbtree.h>
26 #include <linux/spinlock.h>
27 #include <asm/atomic.h>
28 #include <asm/pci-bridge.h>
29 #include <asm/ppc-pci.h>
34 * The pci address cache subsystem. This subsystem places
35 * PCI device address resources into a red-black tree, sorted
36 * according to the address range, so that given only an i/o
37 * address, the corresponding PCI device can be **quickly**
38 * found. It is safe to perform an address lookup in an interrupt
39 * context; this ability is an important feature.
41 * Currently, the only customer of this code is the EEH subsystem;
42 * thus, this code has been somewhat tailored to suit EEH better.
43 * In particular, the cache does *not* hold the addresses of devices
44 * for which EEH is not enabled.
46 * (Implementation Note: The RB tree seems to be better/faster
47 * than any hash algo I could think of for this problem, even
48 * with the penalty of slow pointer chases for d-cache misses).
50 struct pci_io_addr_range
52 struct rb_node rb_node;
53 unsigned long addr_lo;
54 unsigned long addr_hi;
55 struct pci_dev *pcidev;
59 static struct pci_io_addr_cache
61 struct rb_root rb_root;
63 } pci_io_addr_cache_root;
65 static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr)
67 struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
70 struct pci_io_addr_range *piar;
71 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
73 if (addr < piar->addr_lo) {
76 if (addr > piar->addr_hi) {
79 pci_dev_get(piar->pcidev);
89 * pci_get_device_by_addr - Get device, given only address
90 * @addr: mmio (PIO) phys address or i/o port number
92 * Given an mmio phys address, or a port number, find a pci device
93 * that implements this address. Be sure to pci_dev_put the device
94 * when finished. I/O port numbers are assumed to be offset
95 * from zero (that is, they do *not* have pci_io_addr added in).
96 * It is safe to call this function within an interrupt.
98 struct pci_dev *pci_get_device_by_addr(unsigned long addr)
103 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
104 dev = __pci_get_device_by_addr(addr);
105 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
111 * Handy-dandy debug print routine, does nothing more
112 * than print out the contents of our addr cache.
114 static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
119 n = rb_first(&cache->rb_root);
121 struct pci_io_addr_range *piar;
122 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
123 printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n",
124 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
125 piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev));
132 /* Insert address range into the rb tree. */
133 static struct pci_io_addr_range *
134 pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
135 unsigned long ahi, unsigned int flags)
137 struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
138 struct rb_node *parent = NULL;
139 struct pci_io_addr_range *piar;
141 /* Walk tree, find a place to insert into tree */
144 piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
145 if (ahi < piar->addr_lo) {
146 p = &parent->rb_left;
147 } else if (alo > piar->addr_hi) {
148 p = &parent->rb_right;
150 if (dev != piar->pcidev ||
151 alo != piar->addr_lo || ahi != piar->addr_hi) {
152 printk(KERN_WARNING "PIAR: overlapping address range\n");
157 piar = kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
168 printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n",
169 alo, ahi, pci_name (dev));
172 rb_link_node(&piar->rb_node, parent, p);
173 rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
178 static void __pci_addr_cache_insert_device(struct pci_dev *dev)
180 struct device_node *dn;
184 dn = pci_device_to_OF_node(dev);
186 printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev));
190 /* Skip any devices for which EEH is not enabled. */
192 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
193 pdn->eeh_mode & EEH_MODE_NOCHECK) {
195 printk(KERN_INFO "PCI: skip building address cache for=%s - %s\n",
196 pci_name(dev), pdn->node->full_name);
201 /* Walk resources on this device, poke them into the tree */
202 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
203 unsigned long start = pci_resource_start(dev,i);
204 unsigned long end = pci_resource_end(dev,i);
205 unsigned int flags = pci_resource_flags(dev,i);
207 /* We are interested only bus addresses, not dma or other stuff */
208 if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
210 if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
212 pci_addr_cache_insert(dev, start, end, flags);
217 * pci_addr_cache_insert_device - Add a device to the address cache
218 * @dev: PCI device whose I/O addresses we are interested in.
220 * In order to support the fast lookup of devices based on addresses,
221 * we maintain a cache of devices that can be quickly searched.
222 * This routine adds a device to that cache.
224 void pci_addr_cache_insert_device(struct pci_dev *dev)
228 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
229 __pci_addr_cache_insert_device(dev);
230 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
233 static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
238 n = rb_first(&pci_io_addr_cache_root.rb_root);
240 struct pci_io_addr_range *piar;
241 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
243 if (piar->pcidev == dev) {
244 rb_erase(n, &pci_io_addr_cache_root.rb_root);
245 pci_dev_put(piar->pcidev);
254 * pci_addr_cache_remove_device - remove pci device from addr cache
255 * @dev: device to remove
257 * Remove a device from the addr-cache tree.
258 * This is potentially expensive, since it will walk
259 * the tree multiple times (once per resource).
260 * But so what; device removal doesn't need to be that fast.
262 void pci_addr_cache_remove_device(struct pci_dev *dev)
266 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
267 __pci_addr_cache_remove_device(dev);
268 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
272 * pci_addr_cache_build - Build a cache of I/O addresses
274 * Build a cache of pci i/o addresses. This cache will be used to
275 * find the pci device that corresponds to a given address.
276 * This routine scans all pci busses to build the cache.
277 * Must be run late in boot process, after the pci controllers
278 * have been scanned for devices (after all device resources are known).
280 void __init pci_addr_cache_build(void)
282 struct device_node *dn;
283 struct pci_dev *dev = NULL;
285 spin_lock_init(&pci_io_addr_cache_root.piar_lock);
287 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
288 /* Ignore PCI bridges */
289 if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE)
292 pci_addr_cache_insert_device(dev);
294 dn = pci_device_to_OF_node(dev);
297 pci_dev_get (dev); /* matching put is in eeh_remove_device() */
298 PCI_DN(dn)->pcidev = dev;
300 eeh_sysfs_add_device(dev);
304 /* Verify tree built up above, echo back the list of addrs. */
305 pci_addr_cache_print(&pci_io_addr_cache_root);