1 /***********************license start***************
2 * Author: Cavium Networks
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
7 * Copyright (c) 2003-2008 Cavium Networks
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
28 #ifndef __CVMX_PCIERCX_DEFS_H__
29 #define __CVMX_PCIERCX_DEFS_H__
31 #define CVMX_PCIERCX_CFG000(offset) \
32 (0x0000000000000000ull + (((offset) & 1) * 0))
33 #define CVMX_PCIERCX_CFG001(offset) \
34 (0x0000000000000004ull + (((offset) & 1) * 0))
35 #define CVMX_PCIERCX_CFG002(offset) \
36 (0x0000000000000008ull + (((offset) & 1) * 0))
37 #define CVMX_PCIERCX_CFG003(offset) \
38 (0x000000000000000Cull + (((offset) & 1) * 0))
39 #define CVMX_PCIERCX_CFG004(offset) \
40 (0x0000000000000010ull + (((offset) & 1) * 0))
41 #define CVMX_PCIERCX_CFG005(offset) \
42 (0x0000000000000014ull + (((offset) & 1) * 0))
43 #define CVMX_PCIERCX_CFG006(offset) \
44 (0x0000000000000018ull + (((offset) & 1) * 0))
45 #define CVMX_PCIERCX_CFG007(offset) \
46 (0x000000000000001Cull + (((offset) & 1) * 0))
47 #define CVMX_PCIERCX_CFG008(offset) \
48 (0x0000000000000020ull + (((offset) & 1) * 0))
49 #define CVMX_PCIERCX_CFG009(offset) \
50 (0x0000000000000024ull + (((offset) & 1) * 0))
51 #define CVMX_PCIERCX_CFG010(offset) \
52 (0x0000000000000028ull + (((offset) & 1) * 0))
53 #define CVMX_PCIERCX_CFG011(offset) \
54 (0x000000000000002Cull + (((offset) & 1) * 0))
55 #define CVMX_PCIERCX_CFG012(offset) \
56 (0x0000000000000030ull + (((offset) & 1) * 0))
57 #define CVMX_PCIERCX_CFG013(offset) \
58 (0x0000000000000034ull + (((offset) & 1) * 0))
59 #define CVMX_PCIERCX_CFG014(offset) \
60 (0x0000000000000038ull + (((offset) & 1) * 0))
61 #define CVMX_PCIERCX_CFG015(offset) \
62 (0x000000000000003Cull + (((offset) & 1) * 0))
63 #define CVMX_PCIERCX_CFG016(offset) \
64 (0x0000000000000040ull + (((offset) & 1) * 0))
65 #define CVMX_PCIERCX_CFG017(offset) \
66 (0x0000000000000044ull + (((offset) & 1) * 0))
67 #define CVMX_PCIERCX_CFG020(offset) \
68 (0x0000000000000050ull + (((offset) & 1) * 0))
69 #define CVMX_PCIERCX_CFG021(offset) \
70 (0x0000000000000054ull + (((offset) & 1) * 0))
71 #define CVMX_PCIERCX_CFG022(offset) \
72 (0x0000000000000058ull + (((offset) & 1) * 0))
73 #define CVMX_PCIERCX_CFG023(offset) \
74 (0x000000000000005Cull + (((offset) & 1) * 0))
75 #define CVMX_PCIERCX_CFG028(offset) \
76 (0x0000000000000070ull + (((offset) & 1) * 0))
77 #define CVMX_PCIERCX_CFG029(offset) \
78 (0x0000000000000074ull + (((offset) & 1) * 0))
79 #define CVMX_PCIERCX_CFG030(offset) \
80 (0x0000000000000078ull + (((offset) & 1) * 0))
81 #define CVMX_PCIERCX_CFG031(offset) \
82 (0x000000000000007Cull + (((offset) & 1) * 0))
83 #define CVMX_PCIERCX_CFG032(offset) \
84 (0x0000000000000080ull + (((offset) & 1) * 0))
85 #define CVMX_PCIERCX_CFG033(offset) \
86 (0x0000000000000084ull + (((offset) & 1) * 0))
87 #define CVMX_PCIERCX_CFG034(offset) \
88 (0x0000000000000088ull + (((offset) & 1) * 0))
89 #define CVMX_PCIERCX_CFG035(offset) \
90 (0x000000000000008Cull + (((offset) & 1) * 0))
91 #define CVMX_PCIERCX_CFG036(offset) \
92 (0x0000000000000090ull + (((offset) & 1) * 0))
93 #define CVMX_PCIERCX_CFG037(offset) \
94 (0x0000000000000094ull + (((offset) & 1) * 0))
95 #define CVMX_PCIERCX_CFG038(offset) \
96 (0x0000000000000098ull + (((offset) & 1) * 0))
97 #define CVMX_PCIERCX_CFG039(offset) \
98 (0x000000000000009Cull + (((offset) & 1) * 0))
99 #define CVMX_PCIERCX_CFG040(offset) \
100 (0x00000000000000A0ull + (((offset) & 1) * 0))
101 #define CVMX_PCIERCX_CFG041(offset) \
102 (0x00000000000000A4ull + (((offset) & 1) * 0))
103 #define CVMX_PCIERCX_CFG042(offset) \
104 (0x00000000000000A8ull + (((offset) & 1) * 0))
105 #define CVMX_PCIERCX_CFG064(offset) \
106 (0x0000000000000100ull + (((offset) & 1) * 0))
107 #define CVMX_PCIERCX_CFG065(offset) \
108 (0x0000000000000104ull + (((offset) & 1) * 0))
109 #define CVMX_PCIERCX_CFG066(offset) \
110 (0x0000000000000108ull + (((offset) & 1) * 0))
111 #define CVMX_PCIERCX_CFG067(offset) \
112 (0x000000000000010Cull + (((offset) & 1) * 0))
113 #define CVMX_PCIERCX_CFG068(offset) \
114 (0x0000000000000110ull + (((offset) & 1) * 0))
115 #define CVMX_PCIERCX_CFG069(offset) \
116 (0x0000000000000114ull + (((offset) & 1) * 0))
117 #define CVMX_PCIERCX_CFG070(offset) \
118 (0x0000000000000118ull + (((offset) & 1) * 0))
119 #define CVMX_PCIERCX_CFG071(offset) \
120 (0x000000000000011Cull + (((offset) & 1) * 0))
121 #define CVMX_PCIERCX_CFG072(offset) \
122 (0x0000000000000120ull + (((offset) & 1) * 0))
123 #define CVMX_PCIERCX_CFG073(offset) \
124 (0x0000000000000124ull + (((offset) & 1) * 0))
125 #define CVMX_PCIERCX_CFG074(offset) \
126 (0x0000000000000128ull + (((offset) & 1) * 0))
127 #define CVMX_PCIERCX_CFG075(offset) \
128 (0x000000000000012Cull + (((offset) & 1) * 0))
129 #define CVMX_PCIERCX_CFG076(offset) \
130 (0x0000000000000130ull + (((offset) & 1) * 0))
131 #define CVMX_PCIERCX_CFG077(offset) \
132 (0x0000000000000134ull + (((offset) & 1) * 0))
133 #define CVMX_PCIERCX_CFG448(offset) \
134 (0x0000000000000700ull + (((offset) & 1) * 0))
135 #define CVMX_PCIERCX_CFG449(offset) \
136 (0x0000000000000704ull + (((offset) & 1) * 0))
137 #define CVMX_PCIERCX_CFG450(offset) \
138 (0x0000000000000708ull + (((offset) & 1) * 0))
139 #define CVMX_PCIERCX_CFG451(offset) \
140 (0x000000000000070Cull + (((offset) & 1) * 0))
141 #define CVMX_PCIERCX_CFG452(offset) \
142 (0x0000000000000710ull + (((offset) & 1) * 0))
143 #define CVMX_PCIERCX_CFG453(offset) \
144 (0x0000000000000714ull + (((offset) & 1) * 0))
145 #define CVMX_PCIERCX_CFG454(offset) \
146 (0x0000000000000718ull + (((offset) & 1) * 0))
147 #define CVMX_PCIERCX_CFG455(offset) \
148 (0x000000000000071Cull + (((offset) & 1) * 0))
149 #define CVMX_PCIERCX_CFG456(offset) \
150 (0x0000000000000720ull + (((offset) & 1) * 0))
151 #define CVMX_PCIERCX_CFG458(offset) \
152 (0x0000000000000728ull + (((offset) & 1) * 0))
153 #define CVMX_PCIERCX_CFG459(offset) \
154 (0x000000000000072Cull + (((offset) & 1) * 0))
155 #define CVMX_PCIERCX_CFG460(offset) \
156 (0x0000000000000730ull + (((offset) & 1) * 0))
157 #define CVMX_PCIERCX_CFG461(offset) \
158 (0x0000000000000734ull + (((offset) & 1) * 0))
159 #define CVMX_PCIERCX_CFG462(offset) \
160 (0x0000000000000738ull + (((offset) & 1) * 0))
161 #define CVMX_PCIERCX_CFG463(offset) \
162 (0x000000000000073Cull + (((offset) & 1) * 0))
163 #define CVMX_PCIERCX_CFG464(offset) \
164 (0x0000000000000740ull + (((offset) & 1) * 0))
165 #define CVMX_PCIERCX_CFG465(offset) \
166 (0x0000000000000744ull + (((offset) & 1) * 0))
167 #define CVMX_PCIERCX_CFG466(offset) \
168 (0x0000000000000748ull + (((offset) & 1) * 0))
169 #define CVMX_PCIERCX_CFG467(offset) \
170 (0x000000000000074Cull + (((offset) & 1) * 0))
171 #define CVMX_PCIERCX_CFG468(offset) \
172 (0x0000000000000750ull + (((offset) & 1) * 0))
173 #define CVMX_PCIERCX_CFG490(offset) \
174 (0x00000000000007A8ull + (((offset) & 1) * 0))
175 #define CVMX_PCIERCX_CFG491(offset) \
176 (0x00000000000007ACull + (((offset) & 1) * 0))
177 #define CVMX_PCIERCX_CFG492(offset) \
178 (0x00000000000007B0ull + (((offset) & 1) * 0))
179 #define CVMX_PCIERCX_CFG516(offset) \
180 (0x0000000000000810ull + (((offset) & 1) * 0))
181 #define CVMX_PCIERCX_CFG517(offset) \
182 (0x0000000000000814ull + (((offset) & 1) * 0))
184 union cvmx_pciercx_cfg000 {
186 struct cvmx_pciercx_cfg000_s {
190 struct cvmx_pciercx_cfg000_s cn52xx;
191 struct cvmx_pciercx_cfg000_s cn52xxp1;
192 struct cvmx_pciercx_cfg000_s cn56xx;
193 struct cvmx_pciercx_cfg000_s cn56xxp1;
196 union cvmx_pciercx_cfg001 {
198 struct cvmx_pciercx_cfg001_s {
207 uint32_t reserved_22_22:1;
211 uint32_t reserved_11_18:8;
224 struct cvmx_pciercx_cfg001_s cn52xx;
225 struct cvmx_pciercx_cfg001_s cn52xxp1;
226 struct cvmx_pciercx_cfg001_s cn56xx;
227 struct cvmx_pciercx_cfg001_s cn56xxp1;
230 union cvmx_pciercx_cfg002 {
232 struct cvmx_pciercx_cfg002_s {
238 struct cvmx_pciercx_cfg002_s cn52xx;
239 struct cvmx_pciercx_cfg002_s cn52xxp1;
240 struct cvmx_pciercx_cfg002_s cn56xx;
241 struct cvmx_pciercx_cfg002_s cn56xxp1;
244 union cvmx_pciercx_cfg003 {
246 struct cvmx_pciercx_cfg003_s {
253 struct cvmx_pciercx_cfg003_s cn52xx;
254 struct cvmx_pciercx_cfg003_s cn52xxp1;
255 struct cvmx_pciercx_cfg003_s cn56xx;
256 struct cvmx_pciercx_cfg003_s cn56xxp1;
259 union cvmx_pciercx_cfg004 {
261 struct cvmx_pciercx_cfg004_s {
262 uint32_t reserved_0_31:32;
264 struct cvmx_pciercx_cfg004_s cn52xx;
265 struct cvmx_pciercx_cfg004_s cn52xxp1;
266 struct cvmx_pciercx_cfg004_s cn56xx;
267 struct cvmx_pciercx_cfg004_s cn56xxp1;
270 union cvmx_pciercx_cfg005 {
272 struct cvmx_pciercx_cfg005_s {
273 uint32_t reserved_0_31:32;
275 struct cvmx_pciercx_cfg005_s cn52xx;
276 struct cvmx_pciercx_cfg005_s cn52xxp1;
277 struct cvmx_pciercx_cfg005_s cn56xx;
278 struct cvmx_pciercx_cfg005_s cn56xxp1;
281 union cvmx_pciercx_cfg006 {
283 struct cvmx_pciercx_cfg006_s {
289 struct cvmx_pciercx_cfg006_s cn52xx;
290 struct cvmx_pciercx_cfg006_s cn52xxp1;
291 struct cvmx_pciercx_cfg006_s cn56xx;
292 struct cvmx_pciercx_cfg006_s cn56xxp1;
295 union cvmx_pciercx_cfg007 {
297 struct cvmx_pciercx_cfg007_s {
306 uint32_t reserved_22_22:1;
308 uint32_t reserved_16_20:5;
310 uint32_t reserved_9_11:3;
313 uint32_t reserved_1_3:3;
316 struct cvmx_pciercx_cfg007_s cn52xx;
317 struct cvmx_pciercx_cfg007_s cn52xxp1;
318 struct cvmx_pciercx_cfg007_s cn56xx;
319 struct cvmx_pciercx_cfg007_s cn56xxp1;
322 union cvmx_pciercx_cfg008 {
324 struct cvmx_pciercx_cfg008_s {
326 uint32_t reserved_16_19:4;
328 uint32_t reserved_0_3:4;
330 struct cvmx_pciercx_cfg008_s cn52xx;
331 struct cvmx_pciercx_cfg008_s cn52xxp1;
332 struct cvmx_pciercx_cfg008_s cn56xx;
333 struct cvmx_pciercx_cfg008_s cn56xxp1;
336 union cvmx_pciercx_cfg009 {
338 struct cvmx_pciercx_cfg009_s {
339 uint32_t lmem_limit:12;
340 uint32_t reserved_17_19:3;
342 uint32_t lmem_base:12;
343 uint32_t reserved_1_3:3;
346 struct cvmx_pciercx_cfg009_s cn52xx;
347 struct cvmx_pciercx_cfg009_s cn52xxp1;
348 struct cvmx_pciercx_cfg009_s cn56xx;
349 struct cvmx_pciercx_cfg009_s cn56xxp1;
352 union cvmx_pciercx_cfg010 {
354 struct cvmx_pciercx_cfg010_s {
355 uint32_t umem_base:32;
357 struct cvmx_pciercx_cfg010_s cn52xx;
358 struct cvmx_pciercx_cfg010_s cn52xxp1;
359 struct cvmx_pciercx_cfg010_s cn56xx;
360 struct cvmx_pciercx_cfg010_s cn56xxp1;
363 union cvmx_pciercx_cfg011 {
365 struct cvmx_pciercx_cfg011_s {
366 uint32_t umem_limit:32;
368 struct cvmx_pciercx_cfg011_s cn52xx;
369 struct cvmx_pciercx_cfg011_s cn52xxp1;
370 struct cvmx_pciercx_cfg011_s cn56xx;
371 struct cvmx_pciercx_cfg011_s cn56xxp1;
374 union cvmx_pciercx_cfg012 {
376 struct cvmx_pciercx_cfg012_s {
377 uint32_t uio_limit:16;
378 uint32_t uio_base:16;
380 struct cvmx_pciercx_cfg012_s cn52xx;
381 struct cvmx_pciercx_cfg012_s cn52xxp1;
382 struct cvmx_pciercx_cfg012_s cn56xx;
383 struct cvmx_pciercx_cfg012_s cn56xxp1;
386 union cvmx_pciercx_cfg013 {
388 struct cvmx_pciercx_cfg013_s {
389 uint32_t reserved_8_31:24;
392 struct cvmx_pciercx_cfg013_s cn52xx;
393 struct cvmx_pciercx_cfg013_s cn52xxp1;
394 struct cvmx_pciercx_cfg013_s cn56xx;
395 struct cvmx_pciercx_cfg013_s cn56xxp1;
398 union cvmx_pciercx_cfg014 {
400 struct cvmx_pciercx_cfg014_s {
401 uint32_t reserved_0_31:32;
403 struct cvmx_pciercx_cfg014_s cn52xx;
404 struct cvmx_pciercx_cfg014_s cn52xxp1;
405 struct cvmx_pciercx_cfg014_s cn56xx;
406 struct cvmx_pciercx_cfg014_s cn56xxp1;
409 union cvmx_pciercx_cfg015 {
411 struct cvmx_pciercx_cfg015_s {
412 uint32_t reserved_28_31:4;
428 struct cvmx_pciercx_cfg015_s cn52xx;
429 struct cvmx_pciercx_cfg015_s cn52xxp1;
430 struct cvmx_pciercx_cfg015_s cn56xx;
431 struct cvmx_pciercx_cfg015_s cn56xxp1;
434 union cvmx_pciercx_cfg016 {
436 struct cvmx_pciercx_cfg016_s {
442 uint32_t reserved_20_20:1;
443 uint32_t pme_clock:1;
448 struct cvmx_pciercx_cfg016_s cn52xx;
449 struct cvmx_pciercx_cfg016_s cn52xxp1;
450 struct cvmx_pciercx_cfg016_s cn56xx;
451 struct cvmx_pciercx_cfg016_s cn56xxp1;
454 union cvmx_pciercx_cfg017 {
456 struct cvmx_pciercx_cfg017_s {
460 uint32_t reserved_16_21:6;
465 uint32_t reserved_4_7:4;
467 uint32_t reserved_2_2:1;
470 struct cvmx_pciercx_cfg017_s cn52xx;
471 struct cvmx_pciercx_cfg017_s cn52xxp1;
472 struct cvmx_pciercx_cfg017_s cn56xx;
473 struct cvmx_pciercx_cfg017_s cn56xxp1;
476 union cvmx_pciercx_cfg020 {
478 struct cvmx_pciercx_cfg020_s {
479 uint32_t reserved_24_31:8;
487 struct cvmx_pciercx_cfg020_s cn52xx;
488 struct cvmx_pciercx_cfg020_s cn52xxp1;
489 struct cvmx_pciercx_cfg020_s cn56xx;
490 struct cvmx_pciercx_cfg020_s cn56xxp1;
493 union cvmx_pciercx_cfg021 {
495 struct cvmx_pciercx_cfg021_s {
497 uint32_t reserved_0_1:2;
499 struct cvmx_pciercx_cfg021_s cn52xx;
500 struct cvmx_pciercx_cfg021_s cn52xxp1;
501 struct cvmx_pciercx_cfg021_s cn56xx;
502 struct cvmx_pciercx_cfg021_s cn56xxp1;
505 union cvmx_pciercx_cfg022 {
507 struct cvmx_pciercx_cfg022_s {
510 struct cvmx_pciercx_cfg022_s cn52xx;
511 struct cvmx_pciercx_cfg022_s cn52xxp1;
512 struct cvmx_pciercx_cfg022_s cn56xx;
513 struct cvmx_pciercx_cfg022_s cn56xxp1;
516 union cvmx_pciercx_cfg023 {
518 struct cvmx_pciercx_cfg023_s {
519 uint32_t reserved_16_31:16;
522 struct cvmx_pciercx_cfg023_s cn52xx;
523 struct cvmx_pciercx_cfg023_s cn52xxp1;
524 struct cvmx_pciercx_cfg023_s cn56xx;
525 struct cvmx_pciercx_cfg023_s cn56xxp1;
528 union cvmx_pciercx_cfg028 {
530 struct cvmx_pciercx_cfg028_s {
531 uint32_t reserved_30_31:2;
539 struct cvmx_pciercx_cfg028_s cn52xx;
540 struct cvmx_pciercx_cfg028_s cn52xxp1;
541 struct cvmx_pciercx_cfg028_s cn56xx;
542 struct cvmx_pciercx_cfg028_s cn56xxp1;
545 union cvmx_pciercx_cfg029 {
547 struct cvmx_pciercx_cfg029_s {
548 uint32_t reserved_28_31:4;
551 uint32_t reserved_16_17:2;
553 uint32_t reserved_12_14:3;
560 struct cvmx_pciercx_cfg029_s cn52xx;
561 struct cvmx_pciercx_cfg029_s cn52xxp1;
562 struct cvmx_pciercx_cfg029_s cn56xx;
563 struct cvmx_pciercx_cfg029_s cn56xxp1;
566 union cvmx_pciercx_cfg030 {
568 struct cvmx_pciercx_cfg030_s {
569 uint32_t reserved_22_31:10;
576 uint32_t reserved_15_15:1;
589 struct cvmx_pciercx_cfg030_s cn52xx;
590 struct cvmx_pciercx_cfg030_s cn52xxp1;
591 struct cvmx_pciercx_cfg030_s cn56xx;
592 struct cvmx_pciercx_cfg030_s cn56xxp1;
595 union cvmx_pciercx_cfg031 {
597 struct cvmx_pciercx_cfg031_s {
599 uint32_t reserved_22_23:2;
610 struct cvmx_pciercx_cfg031_s cn52xx;
611 struct cvmx_pciercx_cfg031_s cn52xxp1;
612 struct cvmx_pciercx_cfg031_s cn56xx;
613 struct cvmx_pciercx_cfg031_s cn56xxp1;
616 union cvmx_pciercx_cfg032 {
618 struct cvmx_pciercx_cfg032_s {
624 uint32_t reserved_26_26:1;
627 uint32_t reserved_12_15:4;
628 uint32_t lab_int_enb:1;
629 uint32_t lbm_int_enb:1;
637 uint32_t reserved_2_2:1;
640 struct cvmx_pciercx_cfg032_s cn52xx;
641 struct cvmx_pciercx_cfg032_s cn52xxp1;
642 struct cvmx_pciercx_cfg032_s cn56xx;
643 struct cvmx_pciercx_cfg032_s cn56xxp1;
646 union cvmx_pciercx_cfg033 {
648 struct cvmx_pciercx_cfg033_s {
662 struct cvmx_pciercx_cfg033_s cn52xx;
663 struct cvmx_pciercx_cfg033_s cn52xxp1;
664 struct cvmx_pciercx_cfg033_s cn56xx;
665 struct cvmx_pciercx_cfg033_s cn56xxp1;
668 union cvmx_pciercx_cfg034 {
670 struct cvmx_pciercx_cfg034_s {
671 uint32_t reserved_25_31:7;
681 uint32_t reserved_13_15:3;
694 struct cvmx_pciercx_cfg034_s cn52xx;
695 struct cvmx_pciercx_cfg034_s cn52xxp1;
696 struct cvmx_pciercx_cfg034_s cn56xx;
697 struct cvmx_pciercx_cfg034_s cn56xxp1;
700 union cvmx_pciercx_cfg035 {
702 struct cvmx_pciercx_cfg035_s {
703 uint32_t reserved_17_31:15;
705 uint32_t reserved_5_15:11;
712 struct cvmx_pciercx_cfg035_s cn52xx;
713 struct cvmx_pciercx_cfg035_s cn52xxp1;
714 struct cvmx_pciercx_cfg035_s cn56xx;
715 struct cvmx_pciercx_cfg035_s cn56xxp1;
718 union cvmx_pciercx_cfg036 {
720 struct cvmx_pciercx_cfg036_s {
721 uint32_t reserved_18_31:14;
726 struct cvmx_pciercx_cfg036_s cn52xx;
727 struct cvmx_pciercx_cfg036_s cn52xxp1;
728 struct cvmx_pciercx_cfg036_s cn56xx;
729 struct cvmx_pciercx_cfg036_s cn56xxp1;
732 union cvmx_pciercx_cfg037 {
734 struct cvmx_pciercx_cfg037_s {
735 uint32_t reserved_5_31:27;
739 struct cvmx_pciercx_cfg037_s cn52xx;
740 struct cvmx_pciercx_cfg037_s cn52xxp1;
741 struct cvmx_pciercx_cfg037_s cn56xx;
742 struct cvmx_pciercx_cfg037_s cn56xxp1;
745 union cvmx_pciercx_cfg038 {
747 struct cvmx_pciercx_cfg038_s {
748 uint32_t reserved_5_31:27;
752 struct cvmx_pciercx_cfg038_s cn52xx;
753 struct cvmx_pciercx_cfg038_s cn52xxp1;
754 struct cvmx_pciercx_cfg038_s cn56xx;
755 struct cvmx_pciercx_cfg038_s cn56xxp1;
758 union cvmx_pciercx_cfg039 {
760 struct cvmx_pciercx_cfg039_s {
761 uint32_t reserved_0_31:32;
763 struct cvmx_pciercx_cfg039_s cn52xx;
764 struct cvmx_pciercx_cfg039_s cn52xxp1;
765 struct cvmx_pciercx_cfg039_s cn56xx;
766 struct cvmx_pciercx_cfg039_s cn56xxp1;
769 union cvmx_pciercx_cfg040 {
771 struct cvmx_pciercx_cfg040_s {
772 uint32_t reserved_0_31:32;
774 struct cvmx_pciercx_cfg040_s cn52xx;
775 struct cvmx_pciercx_cfg040_s cn52xxp1;
776 struct cvmx_pciercx_cfg040_s cn56xx;
777 struct cvmx_pciercx_cfg040_s cn56xxp1;
780 union cvmx_pciercx_cfg041 {
782 struct cvmx_pciercx_cfg041_s {
783 uint32_t reserved_0_31:32;
785 struct cvmx_pciercx_cfg041_s cn52xx;
786 struct cvmx_pciercx_cfg041_s cn52xxp1;
787 struct cvmx_pciercx_cfg041_s cn56xx;
788 struct cvmx_pciercx_cfg041_s cn56xxp1;
791 union cvmx_pciercx_cfg042 {
793 struct cvmx_pciercx_cfg042_s {
794 uint32_t reserved_0_31:32;
796 struct cvmx_pciercx_cfg042_s cn52xx;
797 struct cvmx_pciercx_cfg042_s cn52xxp1;
798 struct cvmx_pciercx_cfg042_s cn56xx;
799 struct cvmx_pciercx_cfg042_s cn56xxp1;
802 union cvmx_pciercx_cfg064 {
804 struct cvmx_pciercx_cfg064_s {
809 struct cvmx_pciercx_cfg064_s cn52xx;
810 struct cvmx_pciercx_cfg064_s cn52xxp1;
811 struct cvmx_pciercx_cfg064_s cn56xx;
812 struct cvmx_pciercx_cfg064_s cn56xxp1;
815 union cvmx_pciercx_cfg065 {
817 struct cvmx_pciercx_cfg065_s {
818 uint32_t reserved_21_31:11;
828 uint32_t reserved_6_11:6;
831 uint32_t reserved_0_3:4;
833 struct cvmx_pciercx_cfg065_s cn52xx;
834 struct cvmx_pciercx_cfg065_s cn52xxp1;
835 struct cvmx_pciercx_cfg065_s cn56xx;
836 struct cvmx_pciercx_cfg065_s cn56xxp1;
839 union cvmx_pciercx_cfg066 {
841 struct cvmx_pciercx_cfg066_s {
842 uint32_t reserved_21_31:11;
852 uint32_t reserved_6_11:6;
855 uint32_t reserved_0_3:4;
857 struct cvmx_pciercx_cfg066_s cn52xx;
858 struct cvmx_pciercx_cfg066_s cn52xxp1;
859 struct cvmx_pciercx_cfg066_s cn56xx;
860 struct cvmx_pciercx_cfg066_s cn56xxp1;
863 union cvmx_pciercx_cfg067 {
865 struct cvmx_pciercx_cfg067_s {
866 uint32_t reserved_21_31:11;
876 uint32_t reserved_6_11:6;
879 uint32_t reserved_0_3:4;
881 struct cvmx_pciercx_cfg067_s cn52xx;
882 struct cvmx_pciercx_cfg067_s cn52xxp1;
883 struct cvmx_pciercx_cfg067_s cn56xx;
884 struct cvmx_pciercx_cfg067_s cn56xxp1;
887 union cvmx_pciercx_cfg068 {
889 struct cvmx_pciercx_cfg068_s {
890 uint32_t reserved_14_31:18;
893 uint32_t reserved_9_11:3;
897 uint32_t reserved_1_5:5;
900 struct cvmx_pciercx_cfg068_s cn52xx;
901 struct cvmx_pciercx_cfg068_s cn52xxp1;
902 struct cvmx_pciercx_cfg068_s cn56xx;
903 struct cvmx_pciercx_cfg068_s cn56xxp1;
906 union cvmx_pciercx_cfg069 {
908 struct cvmx_pciercx_cfg069_s {
909 uint32_t reserved_14_31:18;
912 uint32_t reserved_9_11:3;
916 uint32_t reserved_1_5:5;
919 struct cvmx_pciercx_cfg069_s cn52xx;
920 struct cvmx_pciercx_cfg069_s cn52xxp1;
921 struct cvmx_pciercx_cfg069_s cn56xx;
922 struct cvmx_pciercx_cfg069_s cn56xxp1;
925 union cvmx_pciercx_cfg070 {
927 struct cvmx_pciercx_cfg070_s {
928 uint32_t reserved_9_31:23;
935 struct cvmx_pciercx_cfg070_s cn52xx;
936 struct cvmx_pciercx_cfg070_s cn52xxp1;
937 struct cvmx_pciercx_cfg070_s cn56xx;
938 struct cvmx_pciercx_cfg070_s cn56xxp1;
941 union cvmx_pciercx_cfg071 {
943 struct cvmx_pciercx_cfg071_s {
946 struct cvmx_pciercx_cfg071_s cn52xx;
947 struct cvmx_pciercx_cfg071_s cn52xxp1;
948 struct cvmx_pciercx_cfg071_s cn56xx;
949 struct cvmx_pciercx_cfg071_s cn56xxp1;
952 union cvmx_pciercx_cfg072 {
954 struct cvmx_pciercx_cfg072_s {
957 struct cvmx_pciercx_cfg072_s cn52xx;
958 struct cvmx_pciercx_cfg072_s cn52xxp1;
959 struct cvmx_pciercx_cfg072_s cn56xx;
960 struct cvmx_pciercx_cfg072_s cn56xxp1;
963 union cvmx_pciercx_cfg073 {
965 struct cvmx_pciercx_cfg073_s {
968 struct cvmx_pciercx_cfg073_s cn52xx;
969 struct cvmx_pciercx_cfg073_s cn52xxp1;
970 struct cvmx_pciercx_cfg073_s cn56xx;
971 struct cvmx_pciercx_cfg073_s cn56xxp1;
974 union cvmx_pciercx_cfg074 {
976 struct cvmx_pciercx_cfg074_s {
979 struct cvmx_pciercx_cfg074_s cn52xx;
980 struct cvmx_pciercx_cfg074_s cn52xxp1;
981 struct cvmx_pciercx_cfg074_s cn56xx;
982 struct cvmx_pciercx_cfg074_s cn56xxp1;
985 union cvmx_pciercx_cfg075 {
987 struct cvmx_pciercx_cfg075_s {
988 uint32_t reserved_3_31:29;
993 struct cvmx_pciercx_cfg075_s cn52xx;
994 struct cvmx_pciercx_cfg075_s cn52xxp1;
995 struct cvmx_pciercx_cfg075_s cn56xx;
996 struct cvmx_pciercx_cfg075_s cn56xxp1;
999 union cvmx_pciercx_cfg076 {
1001 struct cvmx_pciercx_cfg076_s {
1003 uint32_t reserved_7_26:20;
1007 uint32_t multi_efnfr:1;
1009 uint32_t multi_ecr:1;
1012 struct cvmx_pciercx_cfg076_s cn52xx;
1013 struct cvmx_pciercx_cfg076_s cn52xxp1;
1014 struct cvmx_pciercx_cfg076_s cn56xx;
1015 struct cvmx_pciercx_cfg076_s cn56xxp1;
1018 union cvmx_pciercx_cfg077 {
1020 struct cvmx_pciercx_cfg077_s {
1024 struct cvmx_pciercx_cfg077_s cn52xx;
1025 struct cvmx_pciercx_cfg077_s cn52xxp1;
1026 struct cvmx_pciercx_cfg077_s cn56xx;
1027 struct cvmx_pciercx_cfg077_s cn56xxp1;
1030 union cvmx_pciercx_cfg448 {
1032 struct cvmx_pciercx_cfg448_s {
1036 struct cvmx_pciercx_cfg448_s cn52xx;
1037 struct cvmx_pciercx_cfg448_s cn52xxp1;
1038 struct cvmx_pciercx_cfg448_s cn56xx;
1039 struct cvmx_pciercx_cfg448_s cn56xxp1;
1042 union cvmx_pciercx_cfg449 {
1044 struct cvmx_pciercx_cfg449_s {
1047 struct cvmx_pciercx_cfg449_s cn52xx;
1048 struct cvmx_pciercx_cfg449_s cn52xxp1;
1049 struct cvmx_pciercx_cfg449_s cn56xx;
1050 struct cvmx_pciercx_cfg449_s cn56xxp1;
1053 union cvmx_pciercx_cfg450 {
1055 struct cvmx_pciercx_cfg450_s {
1057 uint32_t reserved_22_23:2;
1058 uint32_t link_state:6;
1059 uint32_t force_link:1;
1060 uint32_t reserved_8_14:7;
1061 uint32_t link_num:8;
1063 struct cvmx_pciercx_cfg450_s cn52xx;
1064 struct cvmx_pciercx_cfg450_s cn52xxp1;
1065 struct cvmx_pciercx_cfg450_s cn56xx;
1066 struct cvmx_pciercx_cfg450_s cn56xxp1;
1069 union cvmx_pciercx_cfg451 {
1071 struct cvmx_pciercx_cfg451_s {
1072 uint32_t reserved_30_31:2;
1075 uint32_t n_fts_cc:8;
1077 uint32_t ack_freq:8;
1079 struct cvmx_pciercx_cfg451_s cn52xx;
1080 struct cvmx_pciercx_cfg451_s cn52xxp1;
1081 struct cvmx_pciercx_cfg451_s cn56xx;
1082 struct cvmx_pciercx_cfg451_s cn56xxp1;
1085 union cvmx_pciercx_cfg452 {
1087 struct cvmx_pciercx_cfg452_s {
1088 uint32_t reserved_26_31:6;
1090 uint32_t reserved_22_24:3;
1092 uint32_t reserved_8_15:8;
1094 uint32_t reserved_6_6:1;
1096 uint32_t reserved_4_4:1;
1102 struct cvmx_pciercx_cfg452_s cn52xx;
1103 struct cvmx_pciercx_cfg452_s cn52xxp1;
1104 struct cvmx_pciercx_cfg452_s cn56xx;
1105 struct cvmx_pciercx_cfg452_s cn56xxp1;
1108 union cvmx_pciercx_cfg453 {
1110 struct cvmx_pciercx_cfg453_s {
1112 uint32_t reserved_26_30:5;
1117 struct cvmx_pciercx_cfg453_s cn52xx;
1118 struct cvmx_pciercx_cfg453_s cn52xxp1;
1119 struct cvmx_pciercx_cfg453_s cn56xx;
1120 struct cvmx_pciercx_cfg453_s cn56xxp1;
1123 union cvmx_pciercx_cfg454 {
1125 struct cvmx_pciercx_cfg454_s {
1126 uint32_t reserved_29_31:3;
1130 uint32_t reserved_11_13:3;
1132 uint32_t reserved_4_7:4;
1135 struct cvmx_pciercx_cfg454_s cn52xx;
1136 struct cvmx_pciercx_cfg454_s cn52xxp1;
1137 struct cvmx_pciercx_cfg454_s cn56xx;
1138 struct cvmx_pciercx_cfg454_s cn56xxp1;
1141 union cvmx_pciercx_cfg455 {
1143 struct cvmx_pciercx_cfg455_s {
1144 uint32_t m_cfg0_filt:1;
1145 uint32_t m_io_filt:1;
1146 uint32_t msg_ctrl:1;
1147 uint32_t m_cpl_ecrc_filt:1;
1148 uint32_t m_ecrc_filt:1;
1149 uint32_t m_cpl_len_err:1;
1150 uint32_t m_cpl_attr_err:1;
1151 uint32_t m_cpl_tc_err:1;
1152 uint32_t m_cpl_fun_err:1;
1153 uint32_t m_cpl_rid_err:1;
1154 uint32_t m_cpl_tag_err:1;
1155 uint32_t m_lk_filt:1;
1156 uint32_t m_cfg1_filt:1;
1157 uint32_t m_bar_match:1;
1158 uint32_t m_pois_filt:1;
1161 uint32_t reserved_11_14:4;
1164 struct cvmx_pciercx_cfg455_s cn52xx;
1165 struct cvmx_pciercx_cfg455_s cn52xxp1;
1166 struct cvmx_pciercx_cfg455_s cn56xx;
1167 struct cvmx_pciercx_cfg455_s cn56xxp1;
1170 union cvmx_pciercx_cfg456 {
1172 struct cvmx_pciercx_cfg456_s {
1173 uint32_t reserved_2_31:30;
1174 uint32_t m_vend1_drp:1;
1175 uint32_t m_vend0_drp:1;
1177 struct cvmx_pciercx_cfg456_s cn52xx;
1178 struct cvmx_pciercx_cfg456_s cn52xxp1;
1179 struct cvmx_pciercx_cfg456_s cn56xx;
1180 struct cvmx_pciercx_cfg456_s cn56xxp1;
1183 union cvmx_pciercx_cfg458 {
1185 struct cvmx_pciercx_cfg458_s {
1186 uint32_t dbg_info_l32:32;
1188 struct cvmx_pciercx_cfg458_s cn52xx;
1189 struct cvmx_pciercx_cfg458_s cn52xxp1;
1190 struct cvmx_pciercx_cfg458_s cn56xx;
1191 struct cvmx_pciercx_cfg458_s cn56xxp1;
1194 union cvmx_pciercx_cfg459 {
1196 struct cvmx_pciercx_cfg459_s {
1197 uint32_t dbg_info_u32:32;
1199 struct cvmx_pciercx_cfg459_s cn52xx;
1200 struct cvmx_pciercx_cfg459_s cn52xxp1;
1201 struct cvmx_pciercx_cfg459_s cn56xx;
1202 struct cvmx_pciercx_cfg459_s cn56xxp1;
1205 union cvmx_pciercx_cfg460 {
1207 struct cvmx_pciercx_cfg460_s {
1208 uint32_t reserved_20_31:12;
1212 struct cvmx_pciercx_cfg460_s cn52xx;
1213 struct cvmx_pciercx_cfg460_s cn52xxp1;
1214 struct cvmx_pciercx_cfg460_s cn56xx;
1215 struct cvmx_pciercx_cfg460_s cn56xxp1;
1218 union cvmx_pciercx_cfg461 {
1220 struct cvmx_pciercx_cfg461_s {
1221 uint32_t reserved_20_31:12;
1225 struct cvmx_pciercx_cfg461_s cn52xx;
1226 struct cvmx_pciercx_cfg461_s cn52xxp1;
1227 struct cvmx_pciercx_cfg461_s cn56xx;
1228 struct cvmx_pciercx_cfg461_s cn56xxp1;
1231 union cvmx_pciercx_cfg462 {
1233 struct cvmx_pciercx_cfg462_s {
1234 uint32_t reserved_20_31:12;
1238 struct cvmx_pciercx_cfg462_s cn52xx;
1239 struct cvmx_pciercx_cfg462_s cn52xxp1;
1240 struct cvmx_pciercx_cfg462_s cn56xx;
1241 struct cvmx_pciercx_cfg462_s cn56xxp1;
1244 union cvmx_pciercx_cfg463 {
1246 struct cvmx_pciercx_cfg463_s {
1247 uint32_t reserved_3_31:29;
1250 uint32_t rtlpfccnr:1;
1252 struct cvmx_pciercx_cfg463_s cn52xx;
1253 struct cvmx_pciercx_cfg463_s cn52xxp1;
1254 struct cvmx_pciercx_cfg463_s cn56xx;
1255 struct cvmx_pciercx_cfg463_s cn56xxp1;
1258 union cvmx_pciercx_cfg464 {
1260 struct cvmx_pciercx_cfg464_s {
1266 struct cvmx_pciercx_cfg464_s cn52xx;
1267 struct cvmx_pciercx_cfg464_s cn52xxp1;
1268 struct cvmx_pciercx_cfg464_s cn56xx;
1269 struct cvmx_pciercx_cfg464_s cn56xxp1;
1272 union cvmx_pciercx_cfg465 {
1274 struct cvmx_pciercx_cfg465_s {
1280 struct cvmx_pciercx_cfg465_s cn52xx;
1281 struct cvmx_pciercx_cfg465_s cn52xxp1;
1282 struct cvmx_pciercx_cfg465_s cn56xx;
1283 struct cvmx_pciercx_cfg465_s cn56xxp1;
1286 union cvmx_pciercx_cfg466 {
1288 struct cvmx_pciercx_cfg466_s {
1289 uint32_t rx_queue_order:1;
1290 uint32_t type_ordering:1;
1291 uint32_t reserved_24_29:6;
1292 uint32_t queue_mode:3;
1293 uint32_t reserved_20_20:1;
1294 uint32_t header_credits:8;
1295 uint32_t data_credits:12;
1297 struct cvmx_pciercx_cfg466_s cn52xx;
1298 struct cvmx_pciercx_cfg466_s cn52xxp1;
1299 struct cvmx_pciercx_cfg466_s cn56xx;
1300 struct cvmx_pciercx_cfg466_s cn56xxp1;
1303 union cvmx_pciercx_cfg467 {
1305 struct cvmx_pciercx_cfg467_s {
1306 uint32_t reserved_24_31:8;
1307 uint32_t queue_mode:3;
1308 uint32_t reserved_20_20:1;
1309 uint32_t header_credits:8;
1310 uint32_t data_credits:12;
1312 struct cvmx_pciercx_cfg467_s cn52xx;
1313 struct cvmx_pciercx_cfg467_s cn52xxp1;
1314 struct cvmx_pciercx_cfg467_s cn56xx;
1315 struct cvmx_pciercx_cfg467_s cn56xxp1;
1318 union cvmx_pciercx_cfg468 {
1320 struct cvmx_pciercx_cfg468_s {
1321 uint32_t reserved_24_31:8;
1322 uint32_t queue_mode:3;
1323 uint32_t reserved_20_20:1;
1324 uint32_t header_credits:8;
1325 uint32_t data_credits:12;
1327 struct cvmx_pciercx_cfg468_s cn52xx;
1328 struct cvmx_pciercx_cfg468_s cn52xxp1;
1329 struct cvmx_pciercx_cfg468_s cn56xx;
1330 struct cvmx_pciercx_cfg468_s cn56xxp1;
1333 union cvmx_pciercx_cfg490 {
1335 struct cvmx_pciercx_cfg490_s {
1336 uint32_t reserved_26_31:6;
1337 uint32_t header_depth:10;
1338 uint32_t reserved_14_15:2;
1339 uint32_t data_depth:14;
1341 struct cvmx_pciercx_cfg490_s cn52xx;
1342 struct cvmx_pciercx_cfg490_s cn52xxp1;
1343 struct cvmx_pciercx_cfg490_s cn56xx;
1344 struct cvmx_pciercx_cfg490_s cn56xxp1;
1347 union cvmx_pciercx_cfg491 {
1349 struct cvmx_pciercx_cfg491_s {
1350 uint32_t reserved_26_31:6;
1351 uint32_t header_depth:10;
1352 uint32_t reserved_14_15:2;
1353 uint32_t data_depth:14;
1355 struct cvmx_pciercx_cfg491_s cn52xx;
1356 struct cvmx_pciercx_cfg491_s cn52xxp1;
1357 struct cvmx_pciercx_cfg491_s cn56xx;
1358 struct cvmx_pciercx_cfg491_s cn56xxp1;
1361 union cvmx_pciercx_cfg492 {
1363 struct cvmx_pciercx_cfg492_s {
1364 uint32_t reserved_26_31:6;
1365 uint32_t header_depth:10;
1366 uint32_t reserved_14_15:2;
1367 uint32_t data_depth:14;
1369 struct cvmx_pciercx_cfg492_s cn52xx;
1370 struct cvmx_pciercx_cfg492_s cn52xxp1;
1371 struct cvmx_pciercx_cfg492_s cn56xx;
1372 struct cvmx_pciercx_cfg492_s cn56xxp1;
1375 union cvmx_pciercx_cfg516 {
1377 struct cvmx_pciercx_cfg516_s {
1378 uint32_t phy_stat:32;
1380 struct cvmx_pciercx_cfg516_s cn52xx;
1381 struct cvmx_pciercx_cfg516_s cn52xxp1;
1382 struct cvmx_pciercx_cfg516_s cn56xx;
1383 struct cvmx_pciercx_cfg516_s cn56xxp1;
1386 union cvmx_pciercx_cfg517 {
1388 struct cvmx_pciercx_cfg517_s {
1389 uint32_t phy_ctrl:32;
1391 struct cvmx_pciercx_cfg517_s cn52xx;
1392 struct cvmx_pciercx_cfg517_s cn52xxp1;
1393 struct cvmx_pciercx_cfg517_s cn56xx;
1394 struct cvmx_pciercx_cfg517_s cn56xxp1;