i.MX31: Add ethernet support to i.MX31 Litekit board.
[linux-2.6] / arch / arm / mach-mx3 / pcm037.c
1 /*
2  *  Copyright (C) 2008 Sascha Hauer, Pengutronix
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
17  */
18
19 #include <linux/types.h>
20 #include <linux/init.h>
21
22 #include <linux/platform_device.h>
23 #include <linux/mtd/physmap.h>
24 #include <linux/mtd/plat-ram.h>
25 #include <linux/memory.h>
26 #include <linux/gpio.h>
27 #include <linux/smsc911x.h>
28 #include <linux/interrupt.h>
29 #include <linux/i2c.h>
30 #include <linux/i2c/at24.h>
31 #include <linux/delay.h>
32 #include <linux/spi/spi.h>
33 #include <linux/irq.h>
34
35 #include <mach/hardware.h>
36 #include <asm/mach-types.h>
37 #include <asm/mach/arch.h>
38 #include <asm/mach/time.h>
39 #include <asm/mach/map.h>
40 #include <mach/common.h>
41 #include <mach/imx-uart.h>
42 #include <mach/iomux-mx3.h>
43 #include <mach/ipu.h>
44 #include <mach/board-pcm037.h>
45 #include <mach/mx3fb.h>
46 #include <mach/mxc_nand.h>
47 #include <mach/mmc.h>
48 #ifdef CONFIG_I2C_IMX
49 #include <mach/i2c.h>
50 #endif
51
52 #include "devices.h"
53
54 static unsigned int pcm037_pins[] = {
55         /* I2C */
56         MX31_PIN_CSPI2_MOSI__SCL,
57         MX31_PIN_CSPI2_MISO__SDA,
58         /* SDHC1 */
59         MX31_PIN_SD1_DATA3__SD1_DATA3,
60         MX31_PIN_SD1_DATA2__SD1_DATA2,
61         MX31_PIN_SD1_DATA1__SD1_DATA1,
62         MX31_PIN_SD1_DATA0__SD1_DATA0,
63         MX31_PIN_SD1_CLK__SD1_CLK,
64         MX31_PIN_SD1_CMD__SD1_CMD,
65         IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */
66         IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */
67         /* SPI1 */
68         MX31_PIN_CSPI1_MOSI__MOSI,
69         MX31_PIN_CSPI1_MISO__MISO,
70         MX31_PIN_CSPI1_SCLK__SCLK,
71         MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
72         MX31_PIN_CSPI1_SS0__SS0,
73         MX31_PIN_CSPI1_SS1__SS1,
74         MX31_PIN_CSPI1_SS2__SS2,
75         /* UART1 */
76         MX31_PIN_CTS1__CTS1,
77         MX31_PIN_RTS1__RTS1,
78         MX31_PIN_TXD1__TXD1,
79         MX31_PIN_RXD1__RXD1,
80         /* UART2 */
81         MX31_PIN_TXD2__TXD2,
82         MX31_PIN_RXD2__RXD2,
83         MX31_PIN_CTS2__CTS2,
84         MX31_PIN_RTS2__RTS2,
85         /* UART3 */
86         MX31_PIN_CSPI3_MOSI__RXD3,
87         MX31_PIN_CSPI3_MISO__TXD3,
88         MX31_PIN_CSPI3_SCLK__RTS3,
89         MX31_PIN_CSPI3_SPI_RDY__CTS3,
90         /* LAN9217 irq pin */
91         IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO),
92         /* Onewire */
93         MX31_PIN_BATT_LINE__OWIRE,
94         /* Framebuffer */
95         MX31_PIN_LD0__LD0,
96         MX31_PIN_LD1__LD1,
97         MX31_PIN_LD2__LD2,
98         MX31_PIN_LD3__LD3,
99         MX31_PIN_LD4__LD4,
100         MX31_PIN_LD5__LD5,
101         MX31_PIN_LD6__LD6,
102         MX31_PIN_LD7__LD7,
103         MX31_PIN_LD8__LD8,
104         MX31_PIN_LD9__LD9,
105         MX31_PIN_LD10__LD10,
106         MX31_PIN_LD11__LD11,
107         MX31_PIN_LD12__LD12,
108         MX31_PIN_LD13__LD13,
109         MX31_PIN_LD14__LD14,
110         MX31_PIN_LD15__LD15,
111         MX31_PIN_LD16__LD16,
112         MX31_PIN_LD17__LD17,
113         MX31_PIN_VSYNC3__VSYNC3,
114         MX31_PIN_HSYNC__HSYNC,
115         MX31_PIN_FPSHIFT__FPSHIFT,
116         MX31_PIN_DRDY0__DRDY0,
117         MX31_PIN_D3_REV__D3_REV,
118         MX31_PIN_CONTRAST__CONTRAST,
119         MX31_PIN_D3_SPL__D3_SPL,
120         MX31_PIN_D3_CLS__D3_CLS,
121         MX31_PIN_LCS0__GPI03_23,
122 };
123
124 static struct physmap_flash_data pcm037_flash_data = {
125         .width  = 2,
126 };
127
128 static struct resource pcm037_flash_resource = {
129         .start  = 0xa0000000,
130         .end    = 0xa1ffffff,
131         .flags  = IORESOURCE_MEM,
132 };
133
134 static struct platform_device pcm037_flash = {
135         .name   = "physmap-flash",
136         .id     = 0,
137         .dev    = {
138                 .platform_data  = &pcm037_flash_data,
139         },
140         .resource = &pcm037_flash_resource,
141         .num_resources = 1,
142 };
143
144 static struct imxuart_platform_data uart_pdata = {
145         .flags = IMXUART_HAVE_RTSCTS,
146 };
147
148 static struct resource smsc911x_resources[] = {
149         [0] = {
150                 .start          = CS1_BASE_ADDR + 0x300,
151                 .end            = CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
152                 .flags          = IORESOURCE_MEM,
153         },
154         [1] = {
155                 .start          = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
156                 .end            = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
157                 .flags          = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
158         },
159 };
160
161 static struct smsc911x_platform_config smsc911x_info = {
162         .flags          = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY |
163                           SMSC911X_SAVE_MAC_ADDRESS,
164         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
165         .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
166         .phy_interface  = PHY_INTERFACE_MODE_MII,
167 };
168
169 static struct platform_device pcm037_eth = {
170         .name           = "smsc911x",
171         .id             = -1,
172         .num_resources  = ARRAY_SIZE(smsc911x_resources),
173         .resource       = smsc911x_resources,
174         .dev            = {
175                 .platform_data = &smsc911x_info,
176         },
177 };
178
179 static struct platdata_mtd_ram pcm038_sram_data = {
180         .bankwidth = 2,
181 };
182
183 static struct resource pcm038_sram_resource = {
184         .start = CS4_BASE_ADDR,
185         .end   = CS4_BASE_ADDR + 512 * 1024 - 1,
186         .flags = IORESOURCE_MEM,
187 };
188
189 static struct platform_device pcm037_sram_device = {
190         .name = "mtd-ram",
191         .id = 0,
192         .dev = {
193                 .platform_data = &pcm038_sram_data,
194         },
195         .num_resources = 1,
196         .resource = &pcm038_sram_resource,
197 };
198
199 static struct mxc_nand_platform_data pcm037_nand_board_info = {
200         .width = 1,
201         .hw_ecc = 1,
202 };
203
204 #ifdef CONFIG_I2C_IMX
205 static struct imxi2c_platform_data pcm037_i2c_1_data = {
206         .bitrate = 100000,
207 };
208
209 static struct at24_platform_data board_eeprom = {
210         .byte_len = 4096,
211         .page_size = 32,
212         .flags = AT24_FLAG_ADDR16,
213 };
214
215 static struct i2c_board_info pcm037_i2c_devices[] = {
216        {
217                 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
218                 .platform_data = &board_eeprom,
219         }, {
220                 I2C_BOARD_INFO("rtc-pcf8563", 0x51),
221                 .type = "pcf8563",
222         }
223 };
224 #endif
225
226 /* Not connected by default */
227 #ifdef PCM970_SDHC_RW_SWITCH
228 static int pcm970_sdhc1_get_ro(struct device *dev)
229 {
230         return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_SFS6));
231 }
232 #endif
233
234 static int pcm970_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
235                 void *data)
236 {
237         int ret;
238         int gpio_det, gpio_wp;
239
240         gpio_det = IOMUX_TO_GPIO(MX31_PIN_SCK6);
241         gpio_wp = IOMUX_TO_GPIO(MX31_PIN_SFS6);
242
243         gpio_direction_input(gpio_det);
244         gpio_direction_input(gpio_wp);
245
246         ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), detect_irq,
247                         IRQF_DISABLED | IRQF_TRIGGER_FALLING,
248                                 "sdhc-detect", data);
249         return ret;
250 }
251
252 static void pcm970_sdhc1_exit(struct device *dev, void *data)
253 {
254         free_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), data);
255 }
256
257 static struct imxmmc_platform_data sdhc_pdata = {
258 #ifdef PCM970_SDHC_RW_SWITCH
259         .get_ro = pcm970_sdhc1_get_ro,
260 #endif
261         .init = pcm970_sdhc1_init,
262         .exit = pcm970_sdhc1_exit,
263 };
264
265 static struct platform_device *devices[] __initdata = {
266         &pcm037_flash,
267         &pcm037_eth,
268         &pcm037_sram_device,
269 };
270
271 static struct ipu_platform_data mx3_ipu_data = {
272         .irq_base = MXC_IPU_IRQ_START,
273 };
274
275 static const struct fb_videomode fb_modedb[] = {
276         {
277                 /* 240x320 @ 60 Hz Sharp */
278                 .name           = "Sharp-LQ035Q7DH06-QVGA",
279                 .refresh        = 60,
280                 .xres           = 240,
281                 .yres           = 320,
282                 .pixclock       = 185925,
283                 .left_margin    = 9,
284                 .right_margin   = 16,
285                 .upper_margin   = 7,
286                 .lower_margin   = 9,
287                 .hsync_len      = 1,
288                 .vsync_len      = 1,
289                 .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
290                                   FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
291                 .vmode          = FB_VMODE_NONINTERLACED,
292                 .flag           = 0,
293         }, {
294                 /* 240x320 @ 60 Hz */
295                 .name           = "TX090",
296                 .refresh        = 60,
297                 .xres           = 240,
298                 .yres           = 320,
299                 .pixclock       = 38255,
300                 .left_margin    = 144,
301                 .right_margin   = 0,
302                 .upper_margin   = 7,
303                 .lower_margin   = 40,
304                 .hsync_len      = 96,
305                 .vsync_len      = 1,
306                 .sync           = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
307                 .vmode          = FB_VMODE_NONINTERLACED,
308                 .flag           = 0,
309         },
310 };
311
312 static struct mx3fb_platform_data mx3fb_pdata = {
313         .dma_dev        = &mx3_ipu.dev,
314         .name           = "Sharp-LQ035Q7DH06-QVGA",
315         .mode           = fb_modedb,
316         .num_modes      = ARRAY_SIZE(fb_modedb),
317 };
318
319 /*
320  * Board specific initialization.
321  */
322 static void __init mxc_board_init(void)
323 {
324         mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
325                         "pcm037");
326
327         platform_add_devices(devices, ARRAY_SIZE(devices));
328
329         mxc_register_device(&mxc_uart_device0, &uart_pdata);
330         mxc_register_device(&mxc_uart_device1, &uart_pdata);
331         mxc_register_device(&mxc_uart_device2, &uart_pdata);
332
333         mxc_register_device(&mxc_w1_master_device, NULL);
334
335         /* LAN9217 IRQ pin */
336         gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
337
338 #ifdef CONFIG_I2C_IMX
339         i2c_register_board_info(1, pcm037_i2c_devices,
340                         ARRAY_SIZE(pcm037_i2c_devices));
341
342         mxc_register_device(&mxc_i2c_device1, &pcm037_i2c_1_data);
343 #endif
344         mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
345         mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
346         mxc_register_device(&mx3_ipu, &mx3_ipu_data);
347         mxc_register_device(&mx3_fb, &mx3fb_pdata);
348 }
349
350 static void __init pcm037_timer_init(void)
351 {
352         mx31_clocks_init(26000000);
353 }
354
355 struct sys_timer pcm037_timer = {
356         .init   = pcm037_timer_init,
357 };
358
359 MACHINE_START(PCM037, "Phytec Phycore pcm037")
360         /* Maintainer: Pengutronix */
361         .phys_io        = AIPS1_BASE_ADDR,
362         .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
363         .boot_params    = PHYS_OFFSET + 0x100,
364         .map_io         = mx31_map_io,
365         .init_irq       = mxc_init_irq,
366         .init_machine   = mxc_board_init,
367         .timer          = &pcm037_timer,
368 MACHINE_END
369