2 * Platform dependent support for SGI SN
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (c) 2000-2004 Silicon Graphics, Inc. All Rights Reserved.
11 #include <linux/irq.h>
12 #include <linux/spinlock.h>
13 #include <asm/sn/addrs.h>
14 #include <asm/sn/arch.h>
15 #include <asm/sn/intr.h>
16 #include <asm/sn/pcibr_provider.h>
17 #include <asm/sn/pcibus_provider_defs.h>
18 #include <asm/sn/pcidev.h>
19 #include <asm/sn/shub_mmr.h>
20 #include <asm/sn/sn_sal.h>
22 static void force_interrupt(int irq);
23 static void register_intr_pda(struct sn_irq_info *sn_irq_info);
24 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info);
26 extern int sn_force_interrupt_flag;
27 extern int sn_ioif_inited;
28 static struct list_head **sn_irq_lh;
29 static spinlock_t sn_irq_info_lock = SPIN_LOCK_UNLOCKED; /* non-IRQ lock */
31 static inline uint64_t sn_intr_alloc(nasid_t local_nasid, int local_widget,
33 int req_irq, nasid_t req_nasid,
36 struct ia64_sal_retval ret_stuff;
40 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
41 (u64) SAL_INTR_ALLOC, (u64) local_nasid,
42 (u64) local_widget, (u64) sn_irq_info, (u64) req_irq,
43 (u64) req_nasid, (u64) req_slice);
44 return ret_stuff.status;
47 static inline void sn_intr_free(nasid_t local_nasid, int local_widget,
48 struct sn_irq_info *sn_irq_info)
50 struct ia64_sal_retval ret_stuff;
54 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
55 (u64) SAL_INTR_FREE, (u64) local_nasid,
56 (u64) local_widget, (u64) sn_irq_info->irq_irq,
57 (u64) sn_irq_info->irq_cookie, 0, 0);
60 static unsigned int sn_startup_irq(unsigned int irq)
65 static void sn_shutdown_irq(unsigned int irq)
69 static void sn_disable_irq(unsigned int irq)
73 static void sn_enable_irq(unsigned int irq)
77 static void sn_ack_irq(unsigned int irq)
79 uint64_t event_occurred, mask = 0;
85 HUB_L((uint64_t *) GLOBAL_MMR_ADDR(nasid, SH_EVENT_OCCURRED));
86 mask = event_occurred & SH_ALL_INT_MASK;
87 HUB_S((uint64_t *) GLOBAL_MMR_ADDR(nasid, SH_EVENT_OCCURRED_ALIAS),
89 __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
94 static void sn_end_irq(unsigned int irq)
98 uint64_t event_occurred;
101 if (ivec == SGI_UART_VECTOR) {
103 event_occurred = HUB_L((uint64_t *) GLOBAL_MMR_ADDR
104 (nasid, SH_EVENT_OCCURRED));
105 /* If the UART bit is set here, we may have received an
106 * interrupt from the UART that the driver missed. To
107 * make sure, we IPI ourselves to force us to look again.
109 if (event_occurred & SH_EVENT_OCCURRED_UART_INT_MASK) {
110 platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR,
114 __clear_bit(ivec, (volatile void *)pda->sn_in_service_ivecs);
115 if (sn_force_interrupt_flag)
116 force_interrupt(irq);
119 static void sn_irq_info_free(struct rcu_head *head);
121 static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
123 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
126 cpuid = first_cpu(mask);
127 cpuphys = cpu_physical_id(cpuid);
129 list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
130 sn_irq_lh[irq], list) {
132 int local_widget, status;
134 struct sn_irq_info *new_irq_info;
136 new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC);
137 if (new_irq_info == NULL)
139 memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info));
141 bridge = (uint64_t) new_irq_info->irq_bridge;
144 break; /* irq is not a device interrupt */
147 local_nasid = NASID_GET(bridge);
150 local_widget = TIO_SWIN_WIDGETNUM(bridge);
152 local_widget = SWIN_WIDGETNUM(bridge);
154 /* Free the old PROM new_irq_info structure */
155 sn_intr_free(local_nasid, local_widget, new_irq_info);
156 /* Update kernels new_irq_info with new target info */
157 unregister_intr_pda(new_irq_info);
159 /* allocate a new PROM new_irq_info struct */
160 status = sn_intr_alloc(local_nasid, local_widget,
161 __pa(new_irq_info), irq,
162 cpuid_to_nasid(cpuid),
163 cpuid_to_slice(cpuid));
165 /* SAL call failed */
171 new_irq_info->irq_cpuid = cpuid;
172 register_intr_pda(new_irq_info);
174 if (IS_PCI_BRIDGE_ASIC(new_irq_info->irq_bridge_type))
175 pcibr_change_devices_irq(new_irq_info);
177 spin_lock(&sn_irq_info_lock);
178 list_replace_rcu(&sn_irq_info->list, &new_irq_info->list);
179 spin_unlock(&sn_irq_info_lock);
180 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
183 set_irq_affinity_info((irq & 0xff), cpuphys, 0);
188 struct hw_interrupt_type irq_type_sn = {
189 .typename = "SN hub",
190 .startup = sn_startup_irq,
191 .shutdown = sn_shutdown_irq,
192 .enable = sn_enable_irq,
193 .disable = sn_disable_irq,
196 .set_affinity = sn_set_affinity_irq
199 unsigned int sn_local_vector_to_irq(u8 vector)
201 return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector));
204 void sn_irq_init(void)
207 irq_desc_t *base_desc = irq_desc;
209 for (i = 0; i < NR_IRQS; i++) {
210 if (base_desc[i].handler == &no_irq_type) {
211 base_desc[i].handler = &irq_type_sn;
216 static void register_intr_pda(struct sn_irq_info *sn_irq_info)
218 int irq = sn_irq_info->irq_irq;
219 int cpu = sn_irq_info->irq_cpuid;
221 if (pdacpu(cpu)->sn_last_irq < irq) {
222 pdacpu(cpu)->sn_last_irq = irq;
225 if (pdacpu(cpu)->sn_first_irq == 0 || pdacpu(cpu)->sn_first_irq > irq) {
226 pdacpu(cpu)->sn_first_irq = irq;
230 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info)
232 int irq = sn_irq_info->irq_irq;
233 int cpu = sn_irq_info->irq_cpuid;
234 struct sn_irq_info *tmp_irq_info;
238 if (pdacpu(cpu)->sn_last_irq == irq) {
240 for (i = pdacpu(cpu)->sn_last_irq - 1;
241 i && !foundmatch; i--) {
242 list_for_each_entry_rcu(tmp_irq_info,
245 if (tmp_irq_info->irq_cpuid == cpu) {
251 pdacpu(cpu)->sn_last_irq = i;
254 if (pdacpu(cpu)->sn_first_irq == irq) {
256 for (i = pdacpu(cpu)->sn_first_irq + 1;
257 i < NR_IRQS && !foundmatch; i++) {
258 list_for_each_entry_rcu(tmp_irq_info,
261 if (tmp_irq_info->irq_cpuid == cpu) {
267 pdacpu(cpu)->sn_first_irq = ((i == NR_IRQS) ? 0 : i);
272 static void sn_irq_info_free(struct rcu_head *head)
274 struct sn_irq_info *sn_irq_info;
276 sn_irq_info = container_of(head, struct sn_irq_info, rcu);
280 void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
282 nasid_t nasid = sn_irq_info->irq_nasid;
283 int slice = sn_irq_info->irq_slice;
284 int cpu = nasid_slice_to_cpuid(nasid, slice);
286 pci_dev_get(pci_dev);
287 sn_irq_info->irq_cpuid = cpu;
288 sn_irq_info->irq_pciioinfo = SN_PCIDEV_INFO(pci_dev);
290 /* link it into the sn_irq[irq] list */
291 spin_lock(&sn_irq_info_lock);
292 list_add_rcu(&sn_irq_info->list, sn_irq_lh[sn_irq_info->irq_irq]);
293 spin_unlock(&sn_irq_info_lock);
295 (void)register_intr_pda(sn_irq_info);
298 void sn_irq_unfixup(struct pci_dev *pci_dev)
300 struct sn_irq_info *sn_irq_info;
302 /* Only cleanup IRQ stuff if this device has a host bus context */
303 if (!SN_PCIDEV_BUSSOFT(pci_dev))
306 sn_irq_info = SN_PCIDEV_INFO(pci_dev)->pdi_sn_irq_info;
307 if (!sn_irq_info || !sn_irq_info->irq_irq) {
312 unregister_intr_pda(sn_irq_info);
313 spin_lock(&sn_irq_info_lock);
314 list_del_rcu(&sn_irq_info->list);
315 spin_unlock(&sn_irq_info_lock);
316 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
317 pci_dev_put(pci_dev);
320 static void force_interrupt(int irq)
322 struct sn_irq_info *sn_irq_info;
328 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list) {
329 if (IS_PCI_BRIDGE_ASIC(sn_irq_info->irq_bridge_type) &&
330 (sn_irq_info->irq_bridge != NULL))
331 pcibr_force_interrupt(sn_irq_info);
337 * Check for lost interrupts. If the PIC int_status reg. says that
338 * an interrupt has been sent, but not handled, and the interrupt
339 * is not pending in either the cpu irr regs or in the soft irr regs,
340 * and the interrupt is not in service, then the interrupt may have
341 * been lost. Force an interrupt on that pin. It is possible that
342 * the interrupt is in flight, so we may generate a spurious interrupt,
343 * but we should never miss a real lost interrupt.
345 static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
351 struct pcidev_info *pcidev_info;
352 struct pcibus_info *pcibus_info;
354 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
359 (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
361 regval = pcireg_intr_status_get(pcibus_info);
363 irr_reg_num = irq_to_vector(irq) / 64;
364 irr_bit = irq_to_vector(irq) % 64;
365 switch (irr_reg_num) {
367 irr_reg = ia64_getreg(_IA64_REG_CR_IRR0);
370 irr_reg = ia64_getreg(_IA64_REG_CR_IRR1);
373 irr_reg = ia64_getreg(_IA64_REG_CR_IRR2);
376 irr_reg = ia64_getreg(_IA64_REG_CR_IRR3);
379 if (!test_bit(irr_bit, &irr_reg)) {
380 if (!test_bit(irq, pda->sn_soft_irr)) {
381 if (!test_bit(irq, pda->sn_in_service_ivecs)) {
383 if (sn_irq_info->irq_int_bit & regval &
384 sn_irq_info->irq_last_intr) {
387 irq_int_bit & regval);
388 pcibr_force_interrupt(sn_irq_info);
393 sn_irq_info->irq_last_intr = regval;
396 void sn_lb_int_war_check(void)
398 struct sn_irq_info *sn_irq_info;
401 if (!sn_ioif_inited || pda->sn_first_irq == 0)
405 for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) {
406 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) {
408 * Only call for PCI bridges that are fully
411 if (IS_PCI_BRIDGE_ASIC(sn_irq_info->irq_bridge_type) &&
412 (sn_irq_info->irq_bridge != NULL))
413 sn_check_intr(i, sn_irq_info);
419 void sn_irq_lh_init(void)
423 sn_irq_lh = kmalloc(sizeof(struct list_head *) * NR_IRQS, GFP_KERNEL);
425 panic("SN PCI INIT: Failed to allocate memory for PCI init\n");
427 for (i = 0; i < NR_IRQS; i++) {
428 sn_irq_lh[i] = kmalloc(sizeof(struct list_head), GFP_KERNEL);
430 panic("SN PCI INIT: Failed IRQ memory allocation\n");
432 INIT_LIST_HEAD(sn_irq_lh[i]);