2 * Copyright (C) 2004 IBM
4 * Implements the generic device dma API for powerpc.
5 * the pci and vio busses
7 #ifndef _ASM_DMA_MAPPING_H
8 #define _ASM_DMA_MAPPING_H
11 #include <linux/types.h>
12 #include <linux/cache.h>
13 /* need struct page definitions */
15 #include <linux/scatterlist.h>
18 #define DMA_ERROR_CODE (~(dma_addr_t)0x0)
20 #ifdef CONFIG_NOT_COHERENT_CACHE
22 * DMA-consistent mapping functions for PowerPCs that don't support
23 * cache snooping. These allocate/free a region of uncached mapped
24 * memory space for use with DMA devices. Alternatively, you could
25 * allocate the space "normally" and use the cache management functions
26 * to ensure it is consistent.
28 extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp);
29 extern void __dma_free_coherent(size_t size, void *vaddr);
30 extern void __dma_sync(void *vaddr, size_t size, int direction);
31 extern void __dma_sync_page(struct page *page, unsigned long offset,
32 size_t size, int direction);
34 #else /* ! CONFIG_NOT_COHERENT_CACHE */
36 * Cache coherent cores.
39 #define __dma_alloc_coherent(gfp, size, handle) NULL
40 #define __dma_free_coherent(size, addr) ((void)0)
41 #define __dma_sync(addr, size, rw) ((void)0)
42 #define __dma_sync_page(pg, off, sz, rw) ((void)0)
44 #endif /* ! CONFIG_NOT_COHERENT_CACHE */
48 * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
50 struct dma_mapping_ops {
51 void * (*alloc_coherent)(struct device *dev, size_t size,
52 dma_addr_t *dma_handle, gfp_t flag);
53 void (*free_coherent)(struct device *dev, size_t size,
54 void *vaddr, dma_addr_t dma_handle);
55 dma_addr_t (*map_single)(struct device *dev, void *ptr,
56 size_t size, enum dma_data_direction direction);
57 void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
58 size_t size, enum dma_data_direction direction);
59 int (*map_sg)(struct device *dev, struct scatterlist *sg,
60 int nents, enum dma_data_direction direction);
61 void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
62 int nents, enum dma_data_direction direction);
63 int (*dma_supported)(struct device *dev, u64 mask);
64 int (*set_dma_mask)(struct device *dev, u64 dma_mask);
67 static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
69 /* We don't handle the NULL dev case for ISA for now. We could
70 * do it via an out of line call but it is not needed for now. The
71 * only ISA DMA device we support is the floppy and we have a hack
72 * in the floppy driver directly to get a device for us.
74 if (unlikely(dev == NULL || dev->archdata.dma_ops == NULL))
76 return dev->archdata.dma_ops;
79 static inline int dma_supported(struct device *dev, u64 mask)
81 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
83 if (unlikely(dma_ops == NULL))
85 if (dma_ops->dma_supported == NULL)
87 return dma_ops->dma_supported(dev, mask);
90 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
92 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
94 if (unlikely(dma_ops == NULL))
96 if (dma_ops->set_dma_mask != NULL)
97 return dma_ops->set_dma_mask(dev, dma_mask);
98 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
100 *dev->dma_mask = dma_mask;
104 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
105 dma_addr_t *dma_handle, gfp_t flag)
107 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
110 return dma_ops->alloc_coherent(dev, size, dma_handle, flag);
113 static inline void dma_free_coherent(struct device *dev, size_t size,
114 void *cpu_addr, dma_addr_t dma_handle)
116 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
119 dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
122 static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
124 enum dma_data_direction direction)
126 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
129 return dma_ops->map_single(dev, cpu_addr, size, direction);
132 static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
134 enum dma_data_direction direction)
136 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
139 dma_ops->unmap_single(dev, dma_addr, size, direction);
142 static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
143 unsigned long offset, size_t size,
144 enum dma_data_direction direction)
146 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
149 return dma_ops->map_single(dev, page_address(page) + offset, size,
153 static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
155 enum dma_data_direction direction)
157 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
160 dma_ops->unmap_single(dev, dma_address, size, direction);
163 static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
164 int nents, enum dma_data_direction direction)
166 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
169 return dma_ops->map_sg(dev, sg, nents, direction);
172 static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
174 enum dma_data_direction direction)
176 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
179 dma_ops->unmap_sg(dev, sg, nhwentries, direction);
184 * Available generic sets of operations
186 extern struct dma_mapping_ops dma_iommu_ops;
187 extern struct dma_mapping_ops dma_direct_ops;
189 extern unsigned long dma_direct_offset;
191 #else /* CONFIG_PPC64 */
193 #define dma_supported(dev, mask) (1)
195 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
197 if (!dev->dma_mask || !dma_supported(dev, mask))
200 *dev->dma_mask = dma_mask;
205 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
206 dma_addr_t * dma_handle,
209 #ifdef CONFIG_NOT_COHERENT_CACHE
210 return __dma_alloc_coherent(size, dma_handle, gfp);
213 /* ignore region specifiers */
214 gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
216 if (dev == NULL || dev->coherent_dma_mask < 0xffffffff)
219 ret = (void *)__get_free_pages(gfp, get_order(size));
222 memset(ret, 0, size);
223 *dma_handle = virt_to_bus(ret);
231 dma_free_coherent(struct device *dev, size_t size, void *vaddr,
232 dma_addr_t dma_handle)
234 #ifdef CONFIG_NOT_COHERENT_CACHE
235 __dma_free_coherent(size, vaddr);
237 free_pages((unsigned long)vaddr, get_order(size));
241 static inline dma_addr_t
242 dma_map_single(struct device *dev, void *ptr, size_t size,
243 enum dma_data_direction direction)
245 BUG_ON(direction == DMA_NONE);
247 __dma_sync(ptr, size, direction);
249 return virt_to_bus(ptr);
252 static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
254 enum dma_data_direction direction)
259 static inline dma_addr_t
260 dma_map_page(struct device *dev, struct page *page,
261 unsigned long offset, size_t size,
262 enum dma_data_direction direction)
264 BUG_ON(direction == DMA_NONE);
266 __dma_sync_page(page, offset, size, direction);
268 return page_to_bus(page) + offset;
271 static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
273 enum dma_data_direction direction)
279 dma_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
280 enum dma_data_direction direction)
282 struct scatterlist *sg;
285 BUG_ON(direction == DMA_NONE);
287 for_each_sg(sgl, sg, nents, i) {
289 __dma_sync_page(sg->page, sg->offset, sg->length, direction);
290 sg->dma_address = page_to_bus(sg->page) + sg->offset;
296 static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
298 enum dma_data_direction direction)
300 /* We don't do anything here. */
303 #endif /* CONFIG_PPC64 */
305 static inline void dma_sync_single_for_cpu(struct device *dev,
306 dma_addr_t dma_handle, size_t size,
307 enum dma_data_direction direction)
309 BUG_ON(direction == DMA_NONE);
310 __dma_sync(bus_to_virt(dma_handle), size, direction);
313 static inline void dma_sync_single_for_device(struct device *dev,
314 dma_addr_t dma_handle, size_t size,
315 enum dma_data_direction direction)
317 BUG_ON(direction == DMA_NONE);
318 __dma_sync(bus_to_virt(dma_handle), size, direction);
321 static inline void dma_sync_sg_for_cpu(struct device *dev,
322 struct scatterlist *sgl, int nents,
323 enum dma_data_direction direction)
325 struct scatterlist *sg;
328 BUG_ON(direction == DMA_NONE);
330 for_each_sg(sgl, sg, nents, i)
331 __dma_sync_page(sg->page, sg->offset, sg->length, direction);
334 static inline void dma_sync_sg_for_device(struct device *dev,
335 struct scatterlist *sgl, int nents,
336 enum dma_data_direction direction)
338 struct scatterlist *sg;
341 BUG_ON(direction == DMA_NONE);
343 for_each_sg(sgl, sg, nents, i)
344 __dma_sync_page(sg->page, sg->offset, sg->length, direction);
347 static inline int dma_mapping_error(dma_addr_t dma_addr)
350 return (dma_addr == DMA_ERROR_CODE);
356 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
357 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
358 #ifdef CONFIG_NOT_COHERENT_CACHE
359 #define dma_is_consistent(d, h) (0)
361 #define dma_is_consistent(d, h) (1)
364 static inline int dma_get_cache_alignment(void)
367 /* no easy way to get cache size on all processors, so return
368 * the maximum possible, to be safe */
369 return (1 << INTERNODE_CACHE_SHIFT);
372 * Each processor family will define its own L1_CACHE_SHIFT,
373 * L1_CACHE_BYTES wraps to this, so this is always safe.
375 return L1_CACHE_BYTES;
379 static inline void dma_sync_single_range_for_cpu(struct device *dev,
380 dma_addr_t dma_handle, unsigned long offset, size_t size,
381 enum dma_data_direction direction)
383 /* just sync everything for now */
384 dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
387 static inline void dma_sync_single_range_for_device(struct device *dev,
388 dma_addr_t dma_handle, unsigned long offset, size_t size,
389 enum dma_data_direction direction)
391 /* just sync everything for now */
392 dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
395 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
396 enum dma_data_direction direction)
398 BUG_ON(direction == DMA_NONE);
399 __dma_sync(vaddr, size, (int)direction);
402 #endif /* __KERNEL__ */
403 #endif /* _ASM_DMA_MAPPING_H */