[PATCH] s390: qeth driver fixes [1/6]
[linux-2.6] / drivers / s390 / s390mach.c
1 /*
2  *  drivers/s390/s390mach.c
3  *   S/390 machine check handler
4  *
5  *  S390 version
6  *    Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
7  *    Author(s): Ingo Adlung (adlung@de.ibm.com)
8  *               Martin Schwidefsky (schwidefsky@de.ibm.com)
9  */
10
11 #include <linux/init.h>
12 #include <linux/sched.h>
13 #include <linux/errno.h>
14 #include <linux/workqueue.h>
15 #include <linux/time.h>
16 #include <linux/kthread.h>
17
18 #include <asm/lowcore.h>
19
20 #include "s390mach.h"
21
22 #define DBG printk
23 // #define DBG(args,...) do {} while (0);
24
25 static struct semaphore m_sem;
26
27 extern int css_process_crw(int, int);
28 extern int chsc_process_crw(void);
29 extern int chp_process_crw(int, int);
30 extern void css_reiterate_subchannels(void);
31
32 extern struct workqueue_struct *slow_path_wq;
33 extern struct work_struct slow_path_work;
34
35 static NORET_TYPE void
36 s390_handle_damage(char *msg)
37 {
38 #ifdef CONFIG_SMP
39         smp_send_stop();
40 #endif
41         disabled_wait((unsigned long) __builtin_return_address(0));
42         for(;;);
43 }
44
45 /*
46  * Retrieve CRWs and call function to handle event.
47  *
48  * Note : we currently process CRWs for io and chsc subchannels only
49  */
50 static int
51 s390_collect_crw_info(void *param)
52 {
53         struct crw crw[2];
54         int ccode, ret, slow;
55         struct semaphore *sem;
56         unsigned int chain;
57
58         sem = (struct semaphore *)param;
59 repeat:
60         down_interruptible(sem);
61         slow = 0;
62         chain = 0;
63         while (1) {
64                 if (unlikely(chain > 1)) {
65                         struct crw tmp_crw;
66
67                         printk(KERN_WARNING"%s: Code does not support more "
68                                "than two chained crws; please report to "
69                                "linux390@de.ibm.com!\n", __FUNCTION__);
70                         ccode = stcrw(&tmp_crw);
71                         printk(KERN_WARNING"%s: crw reports slct=%d, oflw=%d, "
72                                "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n",
73                                __FUNCTION__, tmp_crw.slct, tmp_crw.oflw,
74                                tmp_crw.chn, tmp_crw.rsc, tmp_crw.anc,
75                                tmp_crw.erc, tmp_crw.rsid);
76                         printk(KERN_WARNING"%s: This was crw number %x in the "
77                                "chain\n", __FUNCTION__, chain);
78                         if (ccode != 0)
79                                 break;
80                         chain = tmp_crw.chn ? chain + 1 : 0;
81                         continue;
82                 }
83                 ccode = stcrw(&crw[chain]);
84                 if (ccode != 0)
85                         break;
86                 DBG(KERN_DEBUG "crw_info : CRW reports slct=%d, oflw=%d, "
87                     "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n",
88                     crw[chain].slct, crw[chain].oflw, crw[chain].chn,
89                     crw[chain].rsc, crw[chain].anc, crw[chain].erc,
90                     crw[chain].rsid);
91                 /* Check for overflows. */
92                 if (crw[chain].oflw) {
93                         pr_debug("%s: crw overflow detected!\n", __FUNCTION__);
94                         css_reiterate_subchannels();
95                         chain = 0;
96                         slow = 1;
97                         continue;
98                 }
99                 switch (crw[chain].rsc) {
100                 case CRW_RSC_SCH:
101                         if (crw[0].chn && !chain)
102                                 break;
103                         pr_debug("source is subchannel %04X\n", crw[0].rsid);
104                         ret = css_process_crw (crw[0].rsid,
105                                                chain ? crw[1].rsid : 0);
106                         if (ret == -EAGAIN)
107                                 slow = 1;
108                         break;
109                 case CRW_RSC_MONITOR:
110                         pr_debug("source is monitoring facility\n");
111                         break;
112                 case CRW_RSC_CPATH:
113                         pr_debug("source is channel path %02X\n", crw[0].rsid);
114                         /*
115                          * Check for solicited machine checks. These are
116                          * created by reset channel path and need not be
117                          * reported to the common I/O layer.
118                          */
119                         if (crw[chain].slct) {
120                                 DBG(KERN_INFO"solicited machine check for "
121                                     "channel path %02X\n", crw[0].rsid);
122                                 break;
123                         }
124                         switch (crw[0].erc) {
125                         case CRW_ERC_IPARM: /* Path has come. */
126                                 ret = chp_process_crw(crw[0].rsid, 1);
127                                 break;
128                         case CRW_ERC_PERRI: /* Path has gone. */
129                         case CRW_ERC_PERRN:
130                                 ret = chp_process_crw(crw[0].rsid, 0);
131                                 break;
132                         default:
133                                 pr_debug("Don't know how to handle erc=%x\n",
134                                          crw[0].erc);
135                                 ret = 0;
136                         }
137                         if (ret == -EAGAIN)
138                                 slow = 1;
139                         break;
140                 case CRW_RSC_CONFIG:
141                         pr_debug("source is configuration-alert facility\n");
142                         break;
143                 case CRW_RSC_CSS:
144                         pr_debug("source is channel subsystem\n");
145                         ret = chsc_process_crw();
146                         if (ret == -EAGAIN)
147                                 slow = 1;
148                         break;
149                 default:
150                         pr_debug("unknown source\n");
151                         break;
152                 }
153                 /* chain is always 0 or 1 here. */
154                 chain = crw[chain].chn ? chain + 1 : 0;
155         }
156         if (slow)
157                 queue_work(slow_path_wq, &slow_path_work);
158         goto repeat;
159         return 0;
160 }
161
162 struct mcck_struct {
163         int kill_task;
164         int channel_report;
165         int warning;
166         unsigned long long mcck_code;
167 };
168
169 static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck);
170
171 /*
172  * Main machine check handler function. Will be called with interrupts enabled
173  * or disabled and machine checks enabled or disabled.
174  */
175 void
176 s390_handle_mcck(void)
177 {
178         unsigned long flags;
179         struct mcck_struct mcck;
180
181         /*
182          * Disable machine checks and get the current state of accumulated
183          * machine checks. Afterwards delete the old state and enable machine
184          * checks again.
185          */
186         local_irq_save(flags);
187         local_mcck_disable();
188         mcck = __get_cpu_var(cpu_mcck);
189         memset(&__get_cpu_var(cpu_mcck), 0, sizeof(struct mcck_struct));
190         clear_thread_flag(TIF_MCCK_PENDING);
191         local_mcck_enable();
192         local_irq_restore(flags);
193
194         if (mcck.channel_report)
195                 up(&m_sem);
196
197 #ifdef CONFIG_MACHCHK_WARNING
198 /*
199  * The warning may remain for a prolonged period on the bare iron.
200  * (actually till the machine is powered off, or until the problem is gone)
201  * So we just stop listening for the WARNING MCH and prevent continuously
202  * being interrupted.  One caveat is however, that we must do this per
203  * processor and cannot use the smp version of ctl_clear_bit().
204  * On VM we only get one interrupt per virtally presented machinecheck.
205  * Though one suffices, we may get one interrupt per (virtual) processor.
206  */
207         if (mcck.warning) {     /* WARNING pending ? */
208                 static int mchchk_wng_posted = 0;
209                 /*
210                  * Use single machine clear, as we cannot handle smp right now
211                  */
212                 __ctl_clear_bit(14, 24);        /* Disable WARNING MCH */
213                 if (xchg(&mchchk_wng_posted, 1) == 0)
214                         kill_proc(1, SIGPWR, 1);
215         }
216 #endif
217
218         if (mcck.kill_task) {
219                 local_irq_enable();
220                 printk(KERN_EMERG "mcck: Terminating task because of machine "
221                        "malfunction (code 0x%016llx).\n", mcck.mcck_code);
222                 printk(KERN_EMERG "mcck: task: %s, pid: %d.\n",
223                        current->comm, current->pid);
224                 do_exit(SIGSEGV);
225         }
226 }
227
228 /*
229  * returns 0 if all registers could be validated
230  * returns 1 otherwise
231  */
232 static int
233 s390_revalidate_registers(struct mci *mci)
234 {
235         int kill_task;
236         u64 tmpclock;
237         u64 zero;
238         void *fpt_save_area, *fpt_creg_save_area;
239
240         kill_task = 0;
241         zero = 0;
242         /* General purpose registers */
243         if (!mci->gr)
244                 /*
245                  * General purpose registers couldn't be restored and have
246                  * unknown contents. Process needs to be terminated.
247                  */
248                 kill_task = 1;
249
250         /* Revalidate floating point registers */
251         if (!mci->fp)
252                 /*
253                  * Floating point registers can't be restored and
254                  * therefore the process needs to be terminated.
255                  */
256                 kill_task = 1;
257
258 #ifndef CONFIG_64BIT
259         asm volatile("ld 0,0(%0)\n"
260                      "ld 2,8(%0)\n"
261                      "ld 4,16(%0)\n"
262                      "ld 6,24(%0)"
263                      : : "a" (&S390_lowcore.floating_pt_save_area));
264 #endif
265
266         if (MACHINE_HAS_IEEE) {
267 #ifdef CONFIG_64BIT
268                 fpt_save_area = &S390_lowcore.floating_pt_save_area;
269                 fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area;
270 #else
271                 fpt_save_area = (void *) S390_lowcore.extended_save_area_addr;
272                 fpt_creg_save_area = fpt_save_area+128;
273 #endif
274                 /* Floating point control register */
275                 if (!mci->fc) {
276                         /*
277                          * Floating point control register can't be restored.
278                          * Task will be terminated.
279                          */
280                         asm volatile ("lfpc 0(%0)" : : "a" (&zero), "m" (zero));
281                         kill_task = 1;
282
283                 }
284                 else
285                         asm volatile (
286                                 "lfpc 0(%0)"
287                                 : : "a" (fpt_creg_save_area));
288
289                 asm volatile("ld  0,0(%0)\n"
290                              "ld  1,8(%0)\n"
291                              "ld  2,16(%0)\n"
292                              "ld  3,24(%0)\n"
293                              "ld  4,32(%0)\n"
294                              "ld  5,40(%0)\n"
295                              "ld  6,48(%0)\n"
296                              "ld  7,56(%0)\n"
297                              "ld  8,64(%0)\n"
298                              "ld  9,72(%0)\n"
299                              "ld 10,80(%0)\n"
300                              "ld 11,88(%0)\n"
301                              "ld 12,96(%0)\n"
302                              "ld 13,104(%0)\n"
303                              "ld 14,112(%0)\n"
304                              "ld 15,120(%0)\n"
305                              : : "a" (fpt_save_area));
306         }
307
308         /* Revalidate access registers */
309         asm volatile("lam 0,15,0(%0)"
310                      : : "a" (&S390_lowcore.access_regs_save_area));
311         if (!mci->ar)
312                 /*
313                  * Access registers have unknown contents.
314                  * Terminating task.
315                  */
316                 kill_task = 1;
317
318         /* Revalidate control registers */
319         if (!mci->cr)
320                 /*
321                  * Control registers have unknown contents.
322                  * Can't recover and therefore stopping machine.
323                  */
324                 s390_handle_damage("invalid control registers.");
325         else
326 #ifdef CONFIG_64BIT
327                 asm volatile("lctlg 0,15,0(%0)"
328                              : : "a" (&S390_lowcore.cregs_save_area));
329 #else
330                 asm volatile("lctl 0,15,0(%0)"
331                              : : "a" (&S390_lowcore.cregs_save_area));
332 #endif
333
334         /*
335          * We don't even try to revalidate the TOD register, since we simply
336          * can't write something sensible into that register.
337          */
338
339 #ifdef CONFIG_64BIT
340         /*
341          * See if we can revalidate the TOD programmable register with its
342          * old contents (should be zero) otherwise set it to zero.
343          */
344         if (!mci->pr)
345                 asm volatile("sr 0,0\n"
346                              "sckpf"
347                              : : : "0", "cc");
348         else
349                 asm volatile(
350                         "l 0,0(%0)\n"
351                         "sckpf"
352                         : : "a" (&S390_lowcore.tod_progreg_save_area) : "0", "cc");
353 #endif
354
355         /* Revalidate clock comparator register */
356         asm volatile ("stck 0(%1)\n"
357                       "sckc 0(%1)"
358                       : "=m" (tmpclock) : "a" (&(tmpclock)) : "cc", "memory");
359
360         /* Check if old PSW is valid */
361         if (!mci->wp)
362                 /*
363                  * Can't tell if we come from user or kernel mode
364                  * -> stopping machine.
365                  */
366                 s390_handle_damage("old psw invalid.");
367
368         if (!mci->ms || !mci->pm || !mci->ia)
369                 kill_task = 1;
370
371         return kill_task;
372 }
373
374 #define MAX_IPD_COUNT   29
375 #define MAX_IPD_TIME    (5 * 60 * USEC_PER_SEC) /* 5 minutes */
376
377 /*
378  * machine check handler.
379  */
380 void
381 s390_do_machine_check(struct pt_regs *regs)
382 {
383         static DEFINE_SPINLOCK(ipd_lock);
384         static unsigned long long last_ipd;
385         static int ipd_count;
386         unsigned long long tmp;
387         struct mci *mci;
388         struct mcck_struct *mcck;
389         int umode;
390
391         lockdep_off();
392
393         mci = (struct mci *) &S390_lowcore.mcck_interruption_code;
394         mcck = &__get_cpu_var(cpu_mcck);
395         umode = user_mode(regs);
396
397         if (mci->sd)
398                 /* System damage -> stopping machine */
399                 s390_handle_damage("received system damage machine check.");
400
401         if (mci->pd) {
402                 if (mci->b) {
403                         /* Processing backup -> verify if we can survive this */
404                         u64 z_mcic, o_mcic, t_mcic;
405 #ifdef CONFIG_64BIT
406                         z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29);
407                         o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
408                                   1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
409                                   1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 |
410                                   1ULL<<16);
411 #else
412                         z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<57 | 1ULL<<50 |
413                                   1ULL<<29);
414                         o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
415                                   1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
416                                   1ULL<<30 | 1ULL<<20 | 1ULL<<17 | 1ULL<<16);
417 #endif
418                         t_mcic = *(u64 *)mci;
419
420                         if (((t_mcic & z_mcic) != 0) ||
421                             ((t_mcic & o_mcic) != o_mcic)) {
422                                 s390_handle_damage("processing backup machine "
423                                                    "check with damage.");
424                         }
425
426                         /*
427                          * Nullifying exigent condition, therefore we might
428                          * retry this instruction.
429                          */
430
431                         spin_lock(&ipd_lock);
432
433                         tmp = get_clock();
434
435                         if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME)
436                                 ipd_count++;
437                         else
438                                 ipd_count = 1;
439
440                         last_ipd = tmp;
441
442                         if (ipd_count == MAX_IPD_COUNT)
443                                 s390_handle_damage("too many ipd retries.");
444
445                         spin_unlock(&ipd_lock);
446                 }
447                 else {
448                         /* Processing damage -> stopping machine */
449                         s390_handle_damage("received instruction processing "
450                                            "damage machine check.");
451                 }
452         }
453         if (s390_revalidate_registers(mci)) {
454                 if (umode) {
455                         /*
456                          * Couldn't restore all register contents while in
457                          * user mode -> mark task for termination.
458                          */
459                         mcck->kill_task = 1;
460                         mcck->mcck_code = *(unsigned long long *) mci;
461                         set_thread_flag(TIF_MCCK_PENDING);
462                 }
463                 else
464                         /*
465                          * Couldn't restore all register contents while in
466                          * kernel mode -> stopping machine.
467                          */
468                         s390_handle_damage("unable to revalidate registers.");
469         }
470
471         if (mci->se)
472                 /* Storage error uncorrected */
473                 s390_handle_damage("received storage error uncorrected "
474                                    "machine check.");
475
476         if (mci->ke)
477                 /* Storage key-error uncorrected */
478                 s390_handle_damage("received storage key-error uncorrected "
479                                    "machine check.");
480
481         if (mci->ds && mci->fa)
482                 /* Storage degradation */
483                 s390_handle_damage("received storage degradation machine "
484                                    "check.");
485
486         if (mci->cp) {
487                 /* Channel report word pending */
488                 mcck->channel_report = 1;
489                 set_thread_flag(TIF_MCCK_PENDING);
490         }
491
492         if (mci->w) {
493                 /* Warning pending */
494                 mcck->warning = 1;
495                 set_thread_flag(TIF_MCCK_PENDING);
496         }
497         lockdep_on();
498 }
499
500 /*
501  * s390_init_machine_check
502  *
503  * initialize machine check handling
504  */
505 static int
506 machine_check_init(void)
507 {
508         init_MUTEX_LOCKED(&m_sem);
509         ctl_clear_bit(14, 25);  /* disable external damage MCH */
510         ctl_set_bit(14, 27);    /* enable system recovery MCH */
511 #ifdef CONFIG_MACHCHK_WARNING
512         ctl_set_bit(14, 24);    /* enable warning MCH */
513 #endif
514         return 0;
515 }
516
517 /*
518  * Initialize the machine check handler really early to be able to
519  * catch all machine checks that happen during boot
520  */
521 arch_initcall(machine_check_init);
522
523 /*
524  * Machine checks for the channel subsystem must be enabled
525  * after the channel subsystem is initialized
526  */
527 static int __init
528 machine_check_crw_init (void)
529 {
530         kthread_run(s390_collect_crw_info, &m_sem, "kmcheck");
531         ctl_set_bit(14, 28);    /* enable channel report MCH */
532         return 0;
533 }
534
535 device_initcall (machine_check_crw_init);