Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart
[linux-2.6] / arch / powerpc / boot / dts / kuroboxHG.dts
1 /*
2  * Device Tree Souce for Buffalo KuroboxHG
3  *
4  * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHG, or use
5  * the default configuration linkstation_defconfig.
6  *
7  * Based on sandpoint.dts
8  *
9  * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
10  *
11  * This file is licensed under
12  * the terms of the GNU General Public License version 2.  This program
13  * is licensed "as is" without any warranty of any kind, whether express
14  * or implied.
15
16 XXXX add flash parts, rtc, ??
17
18 build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
19
20
21  */
22
23 / {
24         model = "KuroboxHG";
25         compatible = "linkstation";
26         #address-cells = <1>;
27         #size-cells = <1>;
28
29         cpus {
30                 #address-cells = <1>;
31                 #size-cells = <0>;
32
33                 PowerPC,603e { /* Really 8241 */
34                         device_type = "cpu";
35                         reg = <0>;
36                         clock-frequency = <fdad680>;    /* Fixed by bootwrapper */
37                         timebase-frequency = <1F04000>; /* Fixed by bootwrapper */
38                         bus-frequency = <0>;            /* From bootloader */
39                         /* Following required by dtc but not used */
40                         i-cache-line-size = <0>;
41                         d-cache-line-size = <0>;
42                         i-cache-size = <4000>;
43                         d-cache-size = <4000>;
44                 };
45         };
46
47         memory {
48                 device_type = "memory";
49                 reg = <00000000 08000000>;
50         };
51
52         soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
53                 #address-cells = <1>;
54                 #size-cells = <1>;
55                 #interrupt-cells = <2>;
56                 device_type = "soc";
57                 compatible = "mpc10x";
58                 store-gathering = <0>; /* 0 == off, !0 == on */
59                 reg = <80000000 00100000>;
60                 ranges = <80000000 80000000 70000000    /* pci mem space */
61                           fc000000 fc000000 00100000    /* EUMB */
62                           fe000000 fe000000 00c00000    /* pci i/o space */
63                           fec00000 fec00000 00300000    /* pci cfg regs */
64                           fef00000 fef00000 00100000>;  /* pci iack */
65
66                 i2c@80003000 {
67                         device_type = "i2c";
68                         compatible = "fsl-i2c";
69                         reg = <80003000 1000>;
70                         interrupts = <5 2>;
71                         interrupt-parent = <&mpic>;
72                 };
73
74                 serial@80004500 {
75                         device_type = "serial";
76                         compatible = "ns16550";
77                         reg = <80004500 8>;
78                         clock-frequency = <7c044a8>;
79                         current-speed = <2580>;
80                         interrupts = <9 2>;
81                         interrupt-parent = <&mpic>;
82                 };
83
84                 serial@80004600 {
85                         device_type = "serial";
86                         compatible = "ns16550";
87                         reg = <80004600 8>;
88                         clock-frequency = <7c044a8>;
89                         current-speed = <e100>;
90                         interrupts = <a 0>;
91                         interrupt-parent = <&mpic>;
92                 };
93
94                 mpic: pic@80040000 {
95                         interrupt-parent = <&mpic>;
96                         #interrupt-cells = <2>;
97                         #address-cells = <0>;
98                         device_type = "open-pic";
99                         compatible = "chrp,open-pic";
100                         interrupt-controller;
101                         reg = <80040000 40000>;
102                         built-in;
103                 };
104
105                 pci@fec00000 {
106                         #address-cells = <3>;
107                         #size-cells = <2>;
108                         #interrupt-cells = <1>;
109                         device_type = "pci";
110                         compatible = "mpc10x-pci";
111                         reg = <fec00000 400000>;
112                         ranges = <01000000 0        0 fe000000 0 00c00000
113                                   02000000 0 80000000 80000000 0 70000000>;
114                         bus-range = <0 ff>;
115                         clock-frequency = <7f28155>;
116                         interrupt-parent = <&mpic>;
117                         interrupt-map-mask = <f800 0 0 7>;
118                         interrupt-map = <
119                                 /* IDSEL 11 - IRQ0 ETH */
120                                 5800 0 0 1 &mpic 0 1
121                                 5800 0 0 2 &mpic 1 1
122                                 5800 0 0 3 &mpic 2 1
123                                 5800 0 0 4 &mpic 3 1
124                                 /* IDSEL 12 - IRQ1 IDE0 */
125                                 6000 0 0 1 &mpic 1 1
126                                 6000 0 0 2 &mpic 2 1
127                                 6000 0 0 3 &mpic 3 1
128                                 6000 0 0 4 &mpic 0 1
129                                 /* IDSEL 14 - IRQ3 USB2.0 */
130                                 7000 0 0 1 &mpic 3 1
131                                 7000 0 0 2 &mpic 3 1
132                                 7000 0 0 3 &mpic 3 1
133                                 7000 0 0 4 &mpic 3 1
134                         >;
135                 };
136         };
137 };