3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
34 #include <media/v4l2-common.h>
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
48 #include "tuner-simple.h"
51 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
52 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
53 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
54 MODULE_LICENSE("GPL");
56 static unsigned int debug;
57 module_param(debug, int, 0644);
58 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
60 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
62 #define dprintk(level,fmt, arg...) if (debug >= level) \
63 printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
65 /* ------------------------------------------------------------------ */
67 static int dvb_buf_setup(struct videobuf_queue *q,
68 unsigned int *count, unsigned int *size)
70 struct cx8802_dev *dev = q->priv_data;
72 dev->ts_packet_size = 188 * 4;
73 dev->ts_packet_count = 32;
75 *size = dev->ts_packet_size * dev->ts_packet_count;
80 static int dvb_buf_prepare(struct videobuf_queue *q,
81 struct videobuf_buffer *vb, enum v4l2_field field)
83 struct cx8802_dev *dev = q->priv_data;
84 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
87 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
89 struct cx8802_dev *dev = q->priv_data;
90 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
93 static void dvb_buf_release(struct videobuf_queue *q,
94 struct videobuf_buffer *vb)
96 cx88_free_buffer(q, (struct cx88_buffer*)vb);
99 static struct videobuf_queue_ops dvb_qops = {
100 .buf_setup = dvb_buf_setup,
101 .buf_prepare = dvb_buf_prepare,
102 .buf_queue = dvb_buf_queue,
103 .buf_release = dvb_buf_release,
106 /* ------------------------------------------------------------------ */
108 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
110 struct cx8802_dev *dev= fe->dvb->priv;
111 struct cx8802_driver *drv = NULL;
114 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
117 ret = drv->request_acquire(drv);
119 ret = drv->request_release(drv);
125 /* ------------------------------------------------------------------ */
127 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
129 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
130 static u8 reset [] = { RESET, 0x80 };
131 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
132 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
133 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
134 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
136 mt352_write(fe, clock_config, sizeof(clock_config));
138 mt352_write(fe, reset, sizeof(reset));
139 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
141 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
142 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
143 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
147 static int dvico_dual_demod_init(struct dvb_frontend *fe)
149 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
150 static u8 reset [] = { RESET, 0x80 };
151 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
152 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
153 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
154 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
156 mt352_write(fe, clock_config, sizeof(clock_config));
158 mt352_write(fe, reset, sizeof(reset));
159 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
161 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
162 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
163 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
168 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
170 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
171 static u8 reset [] = { 0x50, 0x80 };
172 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
173 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
174 0x00, 0xFF, 0x00, 0x40, 0x40 };
175 static u8 dntv_extra[] = { 0xB5, 0x7A };
176 static u8 capt_range_cfg[] = { 0x75, 0x32 };
178 mt352_write(fe, clock_config, sizeof(clock_config));
180 mt352_write(fe, reset, sizeof(reset));
181 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
183 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
185 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
186 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
191 static struct mt352_config dvico_fusionhdtv = {
192 .demod_address = 0x0f,
193 .demod_init = dvico_fusionhdtv_demod_init,
196 static struct mt352_config dntv_live_dvbt_config = {
197 .demod_address = 0x0f,
198 .demod_init = dntv_live_dvbt_demod_init,
201 static struct mt352_config dvico_fusionhdtv_dual = {
202 .demod_address = 0x0f,
203 .demod_init = dvico_dual_demod_init,
206 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
207 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
209 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
210 static u8 reset [] = { 0x50, 0x80 };
211 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
212 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
213 0x00, 0xFF, 0x00, 0x40, 0x40 };
214 static u8 dntv_extra[] = { 0xB5, 0x7A };
215 static u8 capt_range_cfg[] = { 0x75, 0x32 };
217 mt352_write(fe, clock_config, sizeof(clock_config));
219 mt352_write(fe, reset, sizeof(reset));
220 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
222 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
224 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
225 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
230 static struct mt352_config dntv_live_dvbt_pro_config = {
231 .demod_address = 0x0f,
233 .demod_init = dntv_live_dvbt_pro_demod_init,
237 static struct zl10353_config dvico_fusionhdtv_hybrid = {
238 .demod_address = 0x0f,
242 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
243 .demod_address = 0x0f,
248 static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
249 .demod_address = 0x0f,
252 .demod_init = dvico_fusionhdtv_demod_init,
255 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
256 .demod_address = 0x0f,
259 static struct cx22702_config connexant_refboard_config = {
260 .demod_address = 0x43,
261 .output_mode = CX22702_SERIAL_OUTPUT,
264 static struct cx22702_config hauppauge_hvr_config = {
265 .demod_address = 0x63,
266 .output_mode = CX22702_SERIAL_OUTPUT,
269 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
271 struct cx8802_dev *dev= fe->dvb->priv;
272 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
276 static struct or51132_config pchdtv_hd3000 = {
277 .demod_address = 0x15,
278 .set_ts_params = or51132_set_ts_param,
281 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
283 struct cx8802_dev *dev= fe->dvb->priv;
284 struct cx88_core *core = dev->core;
286 dprintk(1, "%s: index = %d\n", __func__, index);
288 cx_clear(MO_GP0_IO, 8);
290 cx_set(MO_GP0_IO, 8);
294 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
296 struct cx8802_dev *dev= fe->dvb->priv;
298 dev->ts_gen_cntrl |= 0x04;
300 dev->ts_gen_cntrl &= ~0x04;
304 static struct lgdt330x_config fusionhdtv_3_gold = {
305 .demod_address = 0x0e,
306 .demod_chip = LGDT3302,
307 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
308 .set_ts_params = lgdt330x_set_ts_param,
311 static struct lgdt330x_config fusionhdtv_5_gold = {
312 .demod_address = 0x0e,
313 .demod_chip = LGDT3303,
314 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
315 .set_ts_params = lgdt330x_set_ts_param,
318 static struct lgdt330x_config pchdtv_hd5500 = {
319 .demod_address = 0x59,
320 .demod_chip = LGDT3303,
321 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
322 .set_ts_params = lgdt330x_set_ts_param,
325 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
327 struct cx8802_dev *dev= fe->dvb->priv;
328 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
332 static struct nxt200x_config ati_hdtvwonder = {
333 .demod_address = 0x0a,
334 .set_ts_params = nxt200x_set_ts_param,
337 static int cx24123_set_ts_param(struct dvb_frontend* fe,
340 struct cx8802_dev *dev= fe->dvb->priv;
341 dev->ts_gen_cntrl = 0x02;
345 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
346 fe_sec_voltage_t voltage)
348 struct cx8802_dev *dev= fe->dvb->priv;
349 struct cx88_core *core = dev->core;
351 if (voltage == SEC_VOLTAGE_OFF)
352 cx_write(MO_GP0_IO, 0x000006fb);
354 cx_write(MO_GP0_IO, 0x000006f9);
356 if (core->prev_set_voltage)
357 return core->prev_set_voltage(fe, voltage);
361 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
362 fe_sec_voltage_t voltage)
364 struct cx8802_dev *dev= fe->dvb->priv;
365 struct cx88_core *core = dev->core;
367 if (voltage == SEC_VOLTAGE_OFF) {
368 dprintk(1,"LNB Voltage OFF\n");
369 cx_write(MO_GP0_IO, 0x0000efff);
372 if (core->prev_set_voltage)
373 return core->prev_set_voltage(fe, voltage);
377 static int cx88_pci_nano_callback(void *ptr, int command, int arg)
379 struct cx88_core *core = ptr;
382 case XC2028_TUNER_RESET:
383 /* Send the tuner in then out of reset */
384 dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __func__, arg);
386 switch (core->boardnr) {
387 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
388 /* GPIO-4 xc3028 tuner */
390 cx_set(MO_GP0_IO, 0x00001000);
391 cx_clear(MO_GP0_IO, 0x00000010);
393 cx_set(MO_GP0_IO, 0x00000010);
399 case XC2028_RESET_CLK:
400 dprintk(1, "%s: XC2028_RESET_CLK %d\n", __func__, arg);
403 dprintk(1, "%s: unknown command %d, arg %d\n", __func__,
411 static struct cx24123_config geniatech_dvbs_config = {
412 .demod_address = 0x55,
413 .set_ts_params = cx24123_set_ts_param,
416 static struct cx24123_config hauppauge_novas_config = {
417 .demod_address = 0x55,
418 .set_ts_params = cx24123_set_ts_param,
421 static struct cx24123_config kworld_dvbs_100_config = {
422 .demod_address = 0x15,
423 .set_ts_params = cx24123_set_ts_param,
427 static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
428 .demod_address = 0x32 >> 1,
429 .output_mode = S5H1409_PARALLEL_OUTPUT,
430 .gpio = S5H1409_GPIO_ON,
432 .inversion = S5H1409_INVERSION_OFF,
433 .status_mode = S5H1409_DEMODLOCKING,
434 .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
437 static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
438 .demod_address = 0x32 >> 1,
439 .output_mode = S5H1409_SERIAL_OUTPUT,
440 .gpio = S5H1409_GPIO_OFF,
441 .inversion = S5H1409_INVERSION_OFF,
442 .status_mode = S5H1409_DEMODLOCKING,
443 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
446 static struct s5h1409_config kworld_atsc_120_config = {
447 .demod_address = 0x32 >> 1,
448 .output_mode = S5H1409_SERIAL_OUTPUT,
449 .gpio = S5H1409_GPIO_OFF,
450 .inversion = S5H1409_INVERSION_OFF,
451 .status_mode = S5H1409_DEMODLOCKING,
452 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
455 static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
458 .tuner_callback = cx88_tuner_callback,
461 static struct zl10353_config cx88_geniatech_x8000_mt = {
462 .demod_address = (0x1e >> 1),
466 static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
468 struct dvb_frontend *fe;
469 struct xc2028_ctrl ctl;
470 struct xc2028_config cfg = {
471 .i2c_adap = &dev->core->i2c_adap,
474 .callback = cx88_tuner_callback,
477 if (!dev->dvb.frontend) {
478 printk(KERN_ERR "%s/2: dvb frontend not attached. "
479 "Can't attach xc3028\n",
485 * Some xc3028 devices may be hidden by an I2C gate. This is known
486 * to happen with some s5h1409-based devices.
487 * Now that I2C gate is open, sets up xc3028 configuration
489 cx88_setup_xc3028(dev->core, &ctl);
491 fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
493 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
495 dvb_frontend_detach(dev->dvb.frontend);
496 dvb_unregister_frontend(dev->dvb.frontend);
497 dev->dvb.frontend = NULL;
501 printk(KERN_INFO "%s/2: xc3028 attached\n",
507 static int dvb_register(struct cx8802_dev *dev)
509 /* init struct videobuf_dvb */
510 dev->dvb.name = dev->core->name;
511 dev->ts_gen_cntrl = 0x0c;
514 switch (dev->core->boardnr) {
515 case CX88_BOARD_HAUPPAUGE_DVB_T1:
516 dev->dvb.frontend = dvb_attach(cx22702_attach,
517 &connexant_refboard_config,
518 &dev->core->i2c_adap);
519 if (dev->dvb.frontend != NULL) {
520 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
521 &dev->core->i2c_adap,
522 DVB_PLL_THOMSON_DTT759X);
525 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
526 case CX88_BOARD_CONEXANT_DVB_T1:
527 case CX88_BOARD_KWORLD_DVB_T_CX22702:
528 case CX88_BOARD_WINFAST_DTV1000:
529 dev->dvb.frontend = dvb_attach(cx22702_attach,
530 &connexant_refboard_config,
531 &dev->core->i2c_adap);
532 if (dev->dvb.frontend != NULL) {
533 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
534 &dev->core->i2c_adap,
535 DVB_PLL_THOMSON_DTT7579);
538 case CX88_BOARD_WINFAST_DTV2000H:
539 case CX88_BOARD_HAUPPAUGE_HVR1100:
540 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
541 case CX88_BOARD_HAUPPAUGE_HVR1300:
542 case CX88_BOARD_HAUPPAUGE_HVR3000:
543 dev->dvb.frontend = dvb_attach(cx22702_attach,
544 &hauppauge_hvr_config,
545 &dev->core->i2c_adap);
546 if (dev->dvb.frontend != NULL) {
547 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
548 &dev->core->i2c_adap, 0x61,
549 TUNER_PHILIPS_FMD1216ME_MK3);
552 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
553 dev->dvb.frontend = dvb_attach(mt352_attach,
555 &dev->core->i2c_adap);
556 if (dev->dvb.frontend != NULL) {
557 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
558 NULL, DVB_PLL_THOMSON_DTT7579);
561 /* ZL10353 replaces MT352 on later cards */
562 dev->dvb.frontend = dvb_attach(zl10353_attach,
563 &dvico_fusionhdtv_plus_v1_1,
564 &dev->core->i2c_adap);
565 if (dev->dvb.frontend != NULL) {
566 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
567 NULL, DVB_PLL_THOMSON_DTT7579);
570 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
571 /* The tin box says DEE1601, but it seems to be DTT7579
572 * compatible, with a slightly different MT352 AGC gain. */
573 dev->dvb.frontend = dvb_attach(mt352_attach,
574 &dvico_fusionhdtv_dual,
575 &dev->core->i2c_adap);
576 if (dev->dvb.frontend != NULL) {
577 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
578 NULL, DVB_PLL_THOMSON_DTT7579);
581 /* ZL10353 replaces MT352 on later cards */
582 dev->dvb.frontend = dvb_attach(zl10353_attach,
583 &dvico_fusionhdtv_plus_v1_1,
584 &dev->core->i2c_adap);
585 if (dev->dvb.frontend != NULL) {
586 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
587 NULL, DVB_PLL_THOMSON_DTT7579);
590 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
591 dev->dvb.frontend = dvb_attach(mt352_attach,
593 &dev->core->i2c_adap);
594 if (dev->dvb.frontend != NULL) {
595 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
596 NULL, DVB_PLL_LG_Z201);
599 case CX88_BOARD_KWORLD_DVB_T:
600 case CX88_BOARD_DNTV_LIVE_DVB_T:
601 case CX88_BOARD_ADSTECH_DVB_T_PCI:
602 dev->dvb.frontend = dvb_attach(mt352_attach,
603 &dntv_live_dvbt_config,
604 &dev->core->i2c_adap);
605 if (dev->dvb.frontend != NULL) {
606 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
607 NULL, DVB_PLL_UNKNOWN_1);
610 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
611 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
612 /* MT352 is on a secondary I2C bus made from some GPIO lines */
613 dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
615 if (dev->dvb.frontend != NULL) {
616 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
617 &dev->core->i2c_adap, 0x61,
618 TUNER_PHILIPS_FMD1216ME_MK3);
621 printk(KERN_ERR "%s/2: built without vp3054 support\n", dev->core->name);
624 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
625 dev->dvb.frontend = dvb_attach(zl10353_attach,
626 &dvico_fusionhdtv_hybrid,
627 &dev->core->i2c_adap);
628 if (dev->dvb.frontend != NULL) {
629 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
630 &dev->core->i2c_adap, 0x61,
631 TUNER_THOMSON_FE6600);
634 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
635 dev->dvb.frontend = dvb_attach(zl10353_attach,
636 &dvico_fusionhdtv_xc3028,
637 &dev->core->i2c_adap);
638 if (dev->dvb.frontend == NULL)
639 dev->dvb.frontend = dvb_attach(mt352_attach,
640 &dvico_fusionhdtv_mt352_xc3028,
641 &dev->core->i2c_adap);
643 * On this board, the demod provides the I2C bus pullup.
644 * We must not permit gate_ctrl to be performed, or
645 * the xc3028 cannot communicate on the bus.
647 if (dev->dvb.frontend)
648 dev->dvb.frontend->ops.i2c_gate_ctrl = NULL;
649 if (attach_xc3028(0x61, dev) < 0)
652 case CX88_BOARD_PCHDTV_HD3000:
653 dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
654 &dev->core->i2c_adap);
655 if (dev->dvb.frontend != NULL) {
656 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
657 &dev->core->i2c_adap, 0x61,
658 TUNER_THOMSON_DTT761X);
661 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
662 dev->ts_gen_cntrl = 0x08;
664 /* Do a hardware reset of chip before using it. */
665 struct cx88_core *core = dev->core;
667 cx_clear(MO_GP0_IO, 1);
669 cx_set(MO_GP0_IO, 1);
672 /* Select RF connector callback */
673 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
674 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
676 &dev->core->i2c_adap);
677 if (dev->dvb.frontend != NULL) {
678 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
679 &dev->core->i2c_adap, 0x61,
680 TUNER_MICROTUNE_4042FI5);
684 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
685 dev->ts_gen_cntrl = 0x08;
687 /* Do a hardware reset of chip before using it. */
688 struct cx88_core *core = dev->core;
690 cx_clear(MO_GP0_IO, 1);
692 cx_set(MO_GP0_IO, 9);
694 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
696 &dev->core->i2c_adap);
697 if (dev->dvb.frontend != NULL) {
698 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
699 &dev->core->i2c_adap, 0x61,
700 TUNER_THOMSON_DTT761X);
704 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
705 dev->ts_gen_cntrl = 0x08;
707 /* Do a hardware reset of chip before using it. */
708 struct cx88_core *core = dev->core;
710 cx_clear(MO_GP0_IO, 1);
712 cx_set(MO_GP0_IO, 1);
714 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
716 &dev->core->i2c_adap);
717 if (dev->dvb.frontend != NULL) {
718 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
719 &dev->core->i2c_adap, 0x61,
720 TUNER_LG_TDVS_H06XF);
721 dvb_attach(tda9887_attach, dev->dvb.frontend,
722 &dev->core->i2c_adap, 0x43);
726 case CX88_BOARD_PCHDTV_HD5500:
727 dev->ts_gen_cntrl = 0x08;
729 /* Do a hardware reset of chip before using it. */
730 struct cx88_core *core = dev->core;
732 cx_clear(MO_GP0_IO, 1);
734 cx_set(MO_GP0_IO, 1);
736 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
738 &dev->core->i2c_adap);
739 if (dev->dvb.frontend != NULL) {
740 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
741 &dev->core->i2c_adap, 0x61,
742 TUNER_LG_TDVS_H06XF);
743 dvb_attach(tda9887_attach, dev->dvb.frontend,
744 &dev->core->i2c_adap, 0x43);
748 case CX88_BOARD_ATI_HDTVWONDER:
749 dev->dvb.frontend = dvb_attach(nxt200x_attach,
751 &dev->core->i2c_adap);
752 if (dev->dvb.frontend != NULL) {
753 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
754 &dev->core->i2c_adap, 0x61,
755 TUNER_PHILIPS_TUV1236D);
758 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
759 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
760 dev->dvb.frontend = dvb_attach(cx24123_attach,
761 &hauppauge_novas_config,
762 &dev->core->i2c_adap);
763 if (dev->dvb.frontend) {
764 dvb_attach(isl6421_attach, dev->dvb.frontend,
765 &dev->core->i2c_adap, 0x08, 0x00, 0x00);
768 case CX88_BOARD_KWORLD_DVBS_100:
769 dev->dvb.frontend = dvb_attach(cx24123_attach,
770 &kworld_dvbs_100_config,
771 &dev->core->i2c_adap);
772 if (dev->dvb.frontend) {
773 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
774 dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
777 case CX88_BOARD_GENIATECH_DVBS:
778 dev->dvb.frontend = dvb_attach(cx24123_attach,
779 &geniatech_dvbs_config,
780 &dev->core->i2c_adap);
781 if (dev->dvb.frontend) {
782 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
783 dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
786 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
787 dev->dvb.frontend = dvb_attach(s5h1409_attach,
788 &pinnacle_pctv_hd_800i_config,
789 &dev->core->i2c_adap);
790 if (dev->dvb.frontend != NULL) {
791 /* tuner_config.video_dev must point to
794 pinnacle_pctv_hd_800i_tuner_config.priv =
795 dev->core->i2c_adap.algo_data;
796 dvb_attach(xc5000_attach, dev->dvb.frontend,
797 &dev->core->i2c_adap,
798 &pinnacle_pctv_hd_800i_tuner_config);
801 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
802 dev->dvb.frontend = dvb_attach(s5h1409_attach,
803 &dvico_hdtv5_pci_nano_config,
804 &dev->core->i2c_adap);
805 if (dev->dvb.frontend != NULL) {
806 struct dvb_frontend *fe;
807 struct xc2028_config cfg = {
808 .i2c_adap = &dev->core->i2c_adap,
810 .callback = cx88_pci_nano_callback,
812 static struct xc2028_ctrl ctl = {
813 .fname = "xc3028-v27.fw",
815 .scode_table = XC3028_FE_OREN538,
818 fe = dvb_attach(xc2028_attach,
819 dev->dvb.frontend, &cfg);
820 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
821 fe->ops.tuner_ops.set_config(fe, &ctl);
824 case CX88_BOARD_PINNACLE_HYBRID_PCTV:
825 dev->dvb.frontend = dvb_attach(zl10353_attach,
826 &cx88_geniatech_x8000_mt,
827 &dev->core->i2c_adap);
828 if (attach_xc3028(0x61, dev) < 0)
831 case CX88_BOARD_GENIATECH_X8000_MT:
832 dev->ts_gen_cntrl = 0x00;
834 dev->dvb.frontend = dvb_attach(zl10353_attach,
835 &cx88_geniatech_x8000_mt,
836 &dev->core->i2c_adap);
837 if (attach_xc3028(0x61, dev) < 0)
840 case CX88_BOARD_KWORLD_ATSC_120:
841 dev->dvb.frontend = dvb_attach(s5h1409_attach,
842 &kworld_atsc_120_config,
843 &dev->core->i2c_adap);
844 if (attach_xc3028(0x61, dev) < 0)
848 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
852 if (NULL == dev->dvb.frontend) {
854 "%s/2: frontend initialization failed\n",
859 /* Ensure all frontends negotiate bus access */
860 dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
862 /* Put the analog decoder in standby to keep it quiet */
863 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
865 /* register everything */
866 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev,
867 &dev->pci->dev, adapter_nr);
870 /* ----------------------------------------------------------- */
872 /* CX8802 MPEG -> mini driver - We have been given the hardware */
873 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
875 struct cx88_core *core = drv->core;
877 dprintk( 1, "%s\n", __func__);
879 switch (core->boardnr) {
880 case CX88_BOARD_HAUPPAUGE_HVR1300:
881 /* We arrive here with either the cx23416 or the cx22702
882 * on the bus. Take the bus from the cx23416 and enable the
885 cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
886 cx_clear(MO_GP0_IO, 0x00000004);
895 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
896 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
898 struct cx88_core *core = drv->core;
900 dprintk( 1, "%s\n", __func__);
902 switch (core->boardnr) {
903 case CX88_BOARD_HAUPPAUGE_HVR1300:
904 /* Do Nothing, leave the cx22702 on the bus. */
912 static int cx8802_dvb_probe(struct cx8802_driver *drv)
914 struct cx88_core *core = drv->core;
915 struct cx8802_dev *dev = drv->core->dvbdev;
918 dprintk( 1, "%s\n", __func__);
919 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
926 if (!(core->board.mpeg & CX88_MPEG_DVB))
929 /* If vp3054 isn't enabled, a stub will just return 0 */
930 err = vp3054_i2c_probe(dev);
935 printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
936 videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
937 &dev->pci->dev, &dev->slock,
938 V4L2_BUF_TYPE_VIDEO_CAPTURE,
940 sizeof(struct cx88_buffer),
942 err = dvb_register(dev);
944 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
951 static int cx8802_dvb_remove(struct cx8802_driver *drv)
953 struct cx8802_dev *dev = drv->core->dvbdev;
956 if (dev->dvb.frontend)
957 videobuf_dvb_unregister(&dev->dvb);
959 vp3054_i2c_remove(dev);
964 static struct cx8802_driver cx8802_dvb_driver = {
965 .type_id = CX88_MPEG_DVB,
966 .hw_access = CX8802_DRVCTL_SHARED,
967 .probe = cx8802_dvb_probe,
968 .remove = cx8802_dvb_remove,
969 .advise_acquire = cx8802_dvb_advise_acquire,
970 .advise_release = cx8802_dvb_advise_release,
973 static int dvb_init(void)
975 printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
976 (CX88_VERSION_CODE >> 16) & 0xff,
977 (CX88_VERSION_CODE >> 8) & 0xff,
978 CX88_VERSION_CODE & 0xff);
980 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
981 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
983 return cx8802_register_driver(&cx8802_dvb_driver);
986 static void dvb_fini(void)
988 cx8802_unregister_driver(&cx8802_dvb_driver);
991 module_init(dvb_init);
992 module_exit(dvb_fini);
997 * compile-command: "make DVB=1"