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   1 /*
   2  * linux/arch/arm/plat-omap/mcbsp.c
   3  *
   4  * Copyright (C) 2004 Nokia Corporation
   5  * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
   6  *
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Multichannel mode not supported.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/init.h>
  17 #include <linux/device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/wait.h>
  20 #include <linux/completion.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/err.h>
  23 #include <linux/clk.h>
  24 #include <linux/delay.h>
  25 #include <linux/io.h>
  26
  27 #include <mach/dma.h>
  28 #include <mach/mcbsp.h>
  29
  30 struct omap_mcbsp **mcbsp_ptr;
  31 int omap_mcbsp_count;
  32
  33 void omap_mcbsp_write(void __iomem *io_base, u16 reg, u32 val)
  34 {
  35         if (cpu_class_is_omap1() || cpu_is_omap2420())
  36                 __raw_writew((u16)val, io_base + reg);
  37         else
  38                 __raw_writel(val, io_base + reg);
  39 }
  40
  41 int omap_mcbsp_read(void __iomem *io_base, u16 reg)
  42 {
  43         if (cpu_class_is_omap1() || cpu_is_omap2420())
  44                 return __raw_readw(io_base + reg);
  45         else
  46                 return __raw_readl(io_base + reg);
  47 }
  48
  49 #define OMAP_MCBSP_READ(base, reg) \
  50                         omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg)
  51 #define OMAP_MCBSP_WRITE(base, reg, val) \
  52                         omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val)
  53
  54 #define omap_mcbsp_check_valid_id(id)   (id < omap_mcbsp_count)
  55 #define id_to_mcbsp_ptr(id)             mcbsp_ptr[id];
  56
  57 static void omap_mcbsp_dump_reg(u8 id)
  58 {
  59         struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
  60
  61         dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
  62         dev_dbg(mcbsp->dev, "DRR2:  0x%04x\n",
  63                         OMAP_MCBSP_READ(mcbsp->io_base, DRR2));
  64         dev_dbg(mcbsp->dev, "DRR1:  0x%04x\n",
  65                         OMAP_MCBSP_READ(mcbsp->io_base, DRR1));
  66         dev_dbg(mcbsp->dev, "DXR2:  0x%04x\n",
  67                         OMAP_MCBSP_READ(mcbsp->io_base, DXR2));
  68         dev_dbg(mcbsp->dev, "DXR1:  0x%04x\n",
  69                         OMAP_MCBSP_READ(mcbsp->io_base, DXR1));
  70         dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
  71                         OMAP_MCBSP_READ(mcbsp->io_base, SPCR2));
  72         dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
  73                         OMAP_MCBSP_READ(mcbsp->io_base, SPCR1));
  74         dev_dbg(mcbsp->dev, "RCR2:  0x%04x\n",
  75                         OMAP_MCBSP_READ(mcbsp->io_base, RCR2));
  76         dev_dbg(mcbsp->dev, "RCR1:  0x%04x\n",
  77                         OMAP_MCBSP_READ(mcbsp->io_base, RCR1));
  78         dev_dbg(mcbsp->dev, "XCR2:  0x%04x\n",
  79                         OMAP_MCBSP_READ(mcbsp->io_base, XCR2));
  80         dev_dbg(mcbsp->dev, "XCR1:  0x%04x\n",
  81                         OMAP_MCBSP_READ(mcbsp->io_base, XCR1));
  82         dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
  83                         OMAP_MCBSP_READ(mcbsp->io_base, SRGR2));
  84         dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
  85                         OMAP_MCBSP_READ(mcbsp->io_base, SRGR1));
  86         dev_dbg(mcbsp->dev, "PCR0:  0x%04x\n",
  87                         OMAP_MCBSP_READ(mcbsp->io_base, PCR0));
  88         dev_dbg(mcbsp->dev, "***********************\n");
  89 }
  90
  91 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
  92 {
  93         struct omap_mcbsp *mcbsp_tx = dev_id;
  94
  95         dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n",
  96                 OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
  97
  98         complete(&mcbsp_tx->tx_irq_completion);
  99
 100         return IRQ_HANDLED;
 101 }
 102
 103 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
 104 {
 105         struct omap_mcbsp *mcbsp_rx = dev_id;
 106
 107         dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n",
 108                 OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
 109
 110         complete(&mcbsp_rx->rx_irq_completion);
 111
 112         return IRQ_HANDLED;
 113 }
 114
 115 static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
 116 {
 117         struct omap_mcbsp *mcbsp_dma_tx = data;
 118
 119         dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
 120                 OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
 121
 122         /* We can free the channels */
 123         omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
 124         mcbsp_dma_tx->dma_tx_lch = -1;
 125
 126         complete(&mcbsp_dma_tx->tx_dma_completion);
 127 }
 128
 129 static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
 130 {
 131         struct omap_mcbsp *mcbsp_dma_rx = data;
 132
 133         dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
 134                 OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
 135
 136         /* We can free the channels */
 137         omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
 138         mcbsp_dma_rx->dma_rx_lch = -1;
 139
 140         complete(&mcbsp_dma_rx->rx_dma_completion);
 141 }
 142
 143 /*
 144  * omap_mcbsp_config simply write a config to the
 145  * appropriate McBSP.
 146  * You either call this function or set the McBSP registers
 147  * by yourself before calling omap_mcbsp_start().
 148  */
 149 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
 150 {
 151         struct omap_mcbsp *mcbsp;
 152         void __iomem *io_base;
 153
 154         if (!omap_mcbsp_check_valid_id(id)) {
 155                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 156                 return;
 157         }
 158         mcbsp = id_to_mcbsp_ptr(id);
 159
 160         io_base = mcbsp->io_base;
 161         dev_dbg(mcbsp->dev, "Configuring McBSP%d  phys_base: 0x%08lx\n",
 162                         mcbsp->id, mcbsp->phys_base);
 163
 164         /* We write the given config */
 165         OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2);
 166         OMAP_MCBSP_WRITE(io_base, SPCR1, config->spcr1);
 167         OMAP_MCBSP_WRITE(io_base, RCR2, config->rcr2);
 168         OMAP_MCBSP_WRITE(io_base, RCR1, config->rcr1);
 169         OMAP_MCBSP_WRITE(io_base, XCR2, config->xcr2);
 170         OMAP_MCBSP_WRITE(io_base, XCR1, config->xcr1);
 171         OMAP_MCBSP_WRITE(io_base, SRGR2, config->srgr2);
 172         OMAP_MCBSP_WRITE(io_base, SRGR1, config->srgr1);
 173         OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2);
 174         OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1);
 175         OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0);
 176         if (cpu_is_omap2430() || cpu_is_omap34xx()) {
 177                 OMAP_MCBSP_WRITE(io_base, XCCR, config->xccr);
 178                 OMAP_MCBSP_WRITE(io_base, RCCR, config->rccr);
 179         }
 180 }
 181 EXPORT_SYMBOL(omap_mcbsp_config);
 182
 183 /*
 184  * We can choose between IRQ based or polled IO.
 185  * This needs to be called before omap_mcbsp_request().
 186  */
 187 int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
 188 {
 189         struct omap_mcbsp *mcbsp;
 190
 191         if (!omap_mcbsp_check_valid_id(id)) {
 192                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 193                 return -ENODEV;
 194         }
 195         mcbsp = id_to_mcbsp_ptr(id);
 196
 197         spin_lock(&mcbsp->lock);
 198
 199         if (!mcbsp->free) {
 200                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
 201                         mcbsp->id);
 202                 spin_unlock(&mcbsp->lock);
 203                 return -EINVAL;
 204         }
 205
 206         mcbsp->io_type = io_type;
 207
 208         spin_unlock(&mcbsp->lock);
 209
 210         return 0;
 211 }
 212 EXPORT_SYMBOL(omap_mcbsp_set_io_type);
 213
 214 int omap_mcbsp_request(unsigned int id)
 215 {
 216         struct omap_mcbsp *mcbsp;
 217         int err;
 218
 219         if (!omap_mcbsp_check_valid_id(id)) {
 220                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 221                 return -ENODEV;
 222         }
 223         mcbsp = id_to_mcbsp_ptr(id);
 224
 225         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
 226                 mcbsp->pdata->ops->request(id);
 227
 228         clk_enable(mcbsp->clk);
 229
 230         spin_lock(&mcbsp->lock);
 231         if (!mcbsp->free) {
 232                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
 233                         mcbsp->id);
 234                 spin_unlock(&mcbsp->lock);
 235                 return -1;
 236         }
 237
 238         mcbsp->free = 0;
 239         spin_unlock(&mcbsp->lock);
 240
 241         /*
 242          * Make sure that transmitter, receiver and sample-rate generator are
 243          * not running before activating IRQs.
 244          */
 245         OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR1, 0);
 246         OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR2, 0);
 247
 248         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
 249                 /* We need to get IRQs here */
 250                 init_completion(&mcbsp->tx_irq_completion);
 251                 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
 252                                         0, "McBSP", (void *)mcbsp);
 253                 if (err != 0) {
 254                         dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
 255                                         "for McBSP%d\n", mcbsp->tx_irq,
 256                                         mcbsp->id);
 257                         return err;
 258                 }
 259
 260                 init_completion(&mcbsp->rx_irq_completion);
 261                 err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler,
 262                                         0, "McBSP", (void *)mcbsp);
 263                 if (err != 0) {
 264                         dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
 265                                         "for McBSP%d\n", mcbsp->rx_irq,
 266                                         mcbsp->id);
 267                         free_irq(mcbsp->tx_irq, (void *)mcbsp);
 268                         return err;
 269                 }
 270         }
 271
 272         return 0;
 273 }
 274 EXPORT_SYMBOL(omap_mcbsp_request);
 275
 276 void omap_mcbsp_free(unsigned int id)
 277 {
 278         struct omap_mcbsp *mcbsp;
 279
 280         if (!omap_mcbsp_check_valid_id(id)) {
 281                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 282                 return;
 283         }
 284         mcbsp = id_to_mcbsp_ptr(id);
 285
 286         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
 287                 mcbsp->pdata->ops->free(id);
 288
 289         clk_disable(mcbsp->clk);
 290
 291         spin_lock(&mcbsp->lock);
 292         if (mcbsp->free) {
 293                 dev_err(mcbsp->dev, "McBSP%d was not reserved\n",
 294                         mcbsp->id);
 295                 spin_unlock(&mcbsp->lock);
 296                 return;
 297         }
 298
 299         mcbsp->free = 1;
 300         spin_unlock(&mcbsp->lock);
 301
 302         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
 303                 /* Free IRQs */
 304                 free_irq(mcbsp->rx_irq, (void *)mcbsp);
 305                 free_irq(mcbsp->tx_irq, (void *)mcbsp);
 306         }
 307 }
 308 EXPORT_SYMBOL(omap_mcbsp_free);
 309
 310 /*
 311  * Here we start the McBSP, by enabling the sample
 312  * generator, both transmitter and receivers,
 313  * and the frame sync.
 314  */
 315 void omap_mcbsp_start(unsigned int id)
 316 {
 317         struct omap_mcbsp *mcbsp;
 318         void __iomem *io_base;
 319         u16 w;
 320
 321         if (!omap_mcbsp_check_valid_id(id)) {
 322                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 323                 return;
 324         }
 325         mcbsp = id_to_mcbsp_ptr(id);
 326         io_base = mcbsp->io_base;
 327
 328         mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
 329         mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
 330
 331         /* Start the sample generator */
 332         w = OMAP_MCBSP_READ(io_base, SPCR2);
 333         OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 6));
 334
 335         /* Enable transmitter and receiver */
 336         w = OMAP_MCBSP_READ(io_base, SPCR2);
 337         OMAP_MCBSP_WRITE(io_base, SPCR2, w | 1);
 338
 339         w = OMAP_MCBSP_READ(io_base, SPCR1);
 340         OMAP_MCBSP_WRITE(io_base, SPCR1, w | 1);
 341
 342         udelay(100);
 343
 344         /* Start frame sync */
 345         w = OMAP_MCBSP_READ(io_base, SPCR2);
 346         OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 7));
 347
 348         /* Dump McBSP Regs */
 349         omap_mcbsp_dump_reg(id);
 350 }
 351 EXPORT_SYMBOL(omap_mcbsp_start);
 352
 353 void omap_mcbsp_stop(unsigned int id)
 354 {
 355         struct omap_mcbsp *mcbsp;
 356         void __iomem *io_base;
 357         u16 w;
 358
 359         if (!omap_mcbsp_check_valid_id(id)) {
 360                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 361                 return;
 362         }
 363
 364         mcbsp = id_to_mcbsp_ptr(id);
 365         io_base = mcbsp->io_base;
 366
 367         /* Reset transmitter */
 368         w = OMAP_MCBSP_READ(io_base, SPCR2);
 369         OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1));
 370
 371         /* Reset receiver */
 372         w = OMAP_MCBSP_READ(io_base, SPCR1);
 373         OMAP_MCBSP_WRITE(io_base, SPCR1, w & ~(1));
 374
 375         /* Reset the sample rate generator */
 376         w = OMAP_MCBSP_READ(io_base, SPCR2);
 377         OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1 << 6));
 378 }
 379 EXPORT_SYMBOL(omap_mcbsp_stop);
 380
 381 /* polled mcbsp i/o operations */
 382 int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
 383 {
 384         struct omap_mcbsp *mcbsp;
 385         void __iomem *base;
 386
 387         if (!omap_mcbsp_check_valid_id(id)) {
 388                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 389                 return -ENODEV;
 390         }
 391
 392         mcbsp = id_to_mcbsp_ptr(id);
 393         base = mcbsp->io_base;
 394
 395         writew(buf, base + OMAP_MCBSP_REG_DXR1);
 396         /* if frame sync error - clear the error */
 397         if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
 398                 /* clear error */
 399                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
 400                        base + OMAP_MCBSP_REG_SPCR2);
 401                 /* resend */
 402                 return -1;
 403         } else {
 404                 /* wait for transmit confirmation */
 405                 int attemps = 0;
 406                 while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
 407                         if (attemps++ > 1000) {
 408                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
 409                                        (~XRST),
 410                                        base + OMAP_MCBSP_REG_SPCR2);
 411                                 udelay(10);
 412                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
 413                                        (XRST),
 414                                        base + OMAP_MCBSP_REG_SPCR2);
 415                                 udelay(10);
 416                                 dev_err(mcbsp->dev, "Could not write to"
 417                                         " McBSP%d Register\n", mcbsp->id);
 418                                 return -2;
 419                         }
 420                 }
 421         }
 422
 423         return 0;
 424 }
 425 EXPORT_SYMBOL(omap_mcbsp_pollwrite);
 426
 427 int omap_mcbsp_pollread(unsigned int id, u16 *buf)
 428 {
 429         struct omap_mcbsp *mcbsp;
 430         void __iomem *base;
 431
 432         if (!omap_mcbsp_check_valid_id(id)) {
 433                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 434                 return -ENODEV;
 435         }
 436         mcbsp = id_to_mcbsp_ptr(id);
 437
 438         base = mcbsp->io_base;
 439         /* if frame sync error - clear the error */
 440         if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
 441                 /* clear error */
 442                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
 443                        base + OMAP_MCBSP_REG_SPCR1);
 444                 /* resend */
 445                 return -1;
 446         } else {
 447                 /* wait for recieve confirmation */
 448                 int attemps = 0;
 449                 while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
 450                         if (attemps++ > 1000) {
 451                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
 452                                        (~RRST),
 453                                        base + OMAP_MCBSP_REG_SPCR1);
 454                                 udelay(10);
 455                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
 456                                        (RRST),
 457                                        base + OMAP_MCBSP_REG_SPCR1);
 458                                 udelay(10);
 459                                 dev_err(mcbsp->dev, "Could not read from"
 460                                         " McBSP%d Register\n", mcbsp->id);
 461                                 return -2;
 462                         }
 463                 }
 464         }
 465         *buf = readw(base + OMAP_MCBSP_REG_DRR1);
 466
 467         return 0;
 468 }
 469 EXPORT_SYMBOL(omap_mcbsp_pollread);
 470
 471 /*
 472  * IRQ based word transmission.
 473  */
 474 void omap_mcbsp_xmit_word(unsigned int id, u32 word)
 475 {
 476         struct omap_mcbsp *mcbsp;
 477         void __iomem *io_base;
 478         omap_mcbsp_word_length word_length;
 479
 480         if (!omap_mcbsp_check_valid_id(id)) {
 481                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 482                 return;
 483         }
 484
 485         mcbsp = id_to_mcbsp_ptr(id);
 486         io_base = mcbsp->io_base;
 487         word_length = mcbsp->tx_word_length;
 488
 489         wait_for_completion(&mcbsp->tx_irq_completion);
 490
 491         if (word_length > OMAP_MCBSP_WORD_16)
 492                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
 493         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
 494 }
 495 EXPORT_SYMBOL(omap_mcbsp_xmit_word);
 496
 497 u32 omap_mcbsp_recv_word(unsigned int id)
 498 {
 499         struct omap_mcbsp *mcbsp;
 500         void __iomem *io_base;
 501         u16 word_lsb, word_msb = 0;
 502         omap_mcbsp_word_length word_length;
 503
 504         if (!omap_mcbsp_check_valid_id(id)) {
 505                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 506                 return -ENODEV;
 507         }
 508         mcbsp = id_to_mcbsp_ptr(id);
 509
 510         word_length = mcbsp->rx_word_length;
 511         io_base = mcbsp->io_base;
 512
 513         wait_for_completion(&mcbsp->rx_irq_completion);
 514
 515         if (word_length > OMAP_MCBSP_WORD_16)
 516                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 517         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 518
 519         return (word_lsb | (word_msb << 16));
 520 }
 521 EXPORT_SYMBOL(omap_mcbsp_recv_word);
 522
 523 int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
 524 {
 525         struct omap_mcbsp *mcbsp;
 526         void __iomem *io_base;
 527         omap_mcbsp_word_length tx_word_length;
 528         omap_mcbsp_word_length rx_word_length;
 529         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
 530
 531         if (!omap_mcbsp_check_valid_id(id)) {
 532                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 533                 return -ENODEV;
 534         }
 535         mcbsp = id_to_mcbsp_ptr(id);
 536         io_base = mcbsp->io_base;
 537         tx_word_length = mcbsp->tx_word_length;
 538         rx_word_length = mcbsp->rx_word_length;
 539
 540         if (tx_word_length != rx_word_length)
 541                 return -EINVAL;
 542
 543         /* First we wait for the transmitter to be ready */
 544         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 545         while (!(spcr2 & XRDY)) {
 546                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 547                 if (attempts++ > 1000) {
 548                         /* We must reset the transmitter */
 549                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
 550                         udelay(10);
 551                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
 552                         udelay(10);
 553                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
 554                                 "ready\n", mcbsp->id);
 555                         return -EAGAIN;
 556                 }
 557         }
 558
 559         /* Now we can push the data */
 560         if (tx_word_length > OMAP_MCBSP_WORD_16)
 561                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
 562         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
 563
 564         /* We wait for the receiver to be ready */
 565         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 566         while (!(spcr1 & RRDY)) {
 567                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 568                 if (attempts++ > 1000) {
 569                         /* We must reset the receiver */
 570                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
 571                         udelay(10);
 572                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
 573                         udelay(10);
 574                         dev_err(mcbsp->dev, "McBSP%d receiver not "
 575                                 "ready\n", mcbsp->id);
 576                         return -EAGAIN;
 577                 }
 578         }
 579
 580         /* Receiver is ready, let's read the dummy data */
 581         if (rx_word_length > OMAP_MCBSP_WORD_16)
 582                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 583         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 584
 585         return 0;
 586 }
 587 EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
 588
 589 int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
 590 {
 591         struct omap_mcbsp *mcbsp;
 592         u32 clock_word = 0;
 593         void __iomem *io_base;
 594         omap_mcbsp_word_length tx_word_length;
 595         omap_mcbsp_word_length rx_word_length;
 596         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
 597
 598         if (!omap_mcbsp_check_valid_id(id)) {
 599                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 600                 return -ENODEV;
 601         }
 602
 603         mcbsp = id_to_mcbsp_ptr(id);
 604         io_base = mcbsp->io_base;
 605
 606         tx_word_length = mcbsp->tx_word_length;
 607         rx_word_length = mcbsp->rx_word_length;
 608
 609         if (tx_word_length != rx_word_length)
 610                 return -EINVAL;
 611
 612         /* First we wait for the transmitter to be ready */
 613         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 614         while (!(spcr2 & XRDY)) {
 615                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 616                 if (attempts++ > 1000) {
 617                         /* We must reset the transmitter */
 618                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
 619                         udelay(10);
 620                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
 621                         udelay(10);
 622                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
 623                                 "ready\n", mcbsp->id);
 624                         return -EAGAIN;
 625                 }
 626         }
 627
 628         /* We first need to enable the bus clock */
 629         if (tx_word_length > OMAP_MCBSP_WORD_16)
 630                 OMAP_MCBSP_WRITE(io_base, DXR2, clock_word >> 16);
 631         OMAP_MCBSP_WRITE(io_base, DXR1, clock_word & 0xffff);
 632
 633         /* We wait for the receiver to be ready */
 634         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 635         while (!(spcr1 & RRDY)) {
 636                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 637                 if (attempts++ > 1000) {
 638                         /* We must reset the receiver */
 639                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
 640                         udelay(10);
 641                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
 642                         udelay(10);
 643                         dev_err(mcbsp->dev, "McBSP%d receiver not "
 644                                 "ready\n", mcbsp->id);
 645                         return -EAGAIN;
 646                 }
 647         }
 648
 649         /* Receiver is ready, there is something for us */
 650         if (rx_word_length > OMAP_MCBSP_WORD_16)
 651                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 652         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 653
 654         word[0] = (word_lsb | (word_msb << 16));
 655
 656         return 0;
 657 }
 658 EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
 659
 660 /*
 661  * Simple DMA based buffer rx/tx routines.
 662  * Nothing fancy, just a single buffer tx/rx through DMA.
 663  * The DMA resources are released once the transfer is done.
 664  * For anything fancier, you should use your own customized DMA
 665  * routines and callbacks.
 666  */
 667 int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
 668                                 unsigned int length)
 669 {
 670         struct omap_mcbsp *mcbsp;
 671         int dma_tx_ch;
 672         int src_port = 0;
 673         int dest_port = 0;
 674         int sync_dev = 0;
 675
 676         if (!omap_mcbsp_check_valid_id(id)) {
 677                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 678                 return -ENODEV;
 679         }
 680         mcbsp = id_to_mcbsp_ptr(id);
 681
 682         if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
 683                                 omap_mcbsp_tx_dma_callback,
 684                                 mcbsp,
 685                                 &dma_tx_ch)) {
 686                 dev_err(mcbsp->dev, " Unable to request DMA channel for "
 687                                 "McBSP%d TX. Trying IRQ based TX\n",
 688                                 mcbsp->id);
 689                 return -EAGAIN;
 690         }
 691         mcbsp->dma_tx_lch = dma_tx_ch;
 692
 693         dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
 694                 dma_tx_ch);
 695
 696         init_completion(&mcbsp->tx_dma_completion);
 697
 698         if (cpu_class_is_omap1()) {
 699                 src_port = OMAP_DMA_PORT_TIPB;
 700                 dest_port = OMAP_DMA_PORT_EMIFF;
 701         }
 702         if (cpu_class_is_omap2())
 703                 sync_dev = mcbsp->dma_tx_sync;
 704
 705         omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
 706                                      OMAP_DMA_DATA_TYPE_S16,
 707                                      length >> 1, 1,
 708                                      OMAP_DMA_SYNC_ELEMENT,
 709          sync_dev, 0);
 710
 711         omap_set_dma_dest_params(mcbsp->dma_tx_lch,
 712                                  src_port,
 713                                  OMAP_DMA_AMODE_CONSTANT,
 714                                  mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
 715                                  0, 0);
 716
 717         omap_set_dma_src_params(mcbsp->dma_tx_lch,
 718                                 dest_port,
 719                                 OMAP_DMA_AMODE_POST_INC,
 720                                 buffer,
 721                                 0, 0);
 722
 723         omap_start_dma(mcbsp->dma_tx_lch);
 724         wait_for_completion(&mcbsp->tx_dma_completion);
 725
 726         return 0;
 727 }
 728 EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
 729
 730 int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
 731                                 unsigned int length)
 732 {
 733         struct omap_mcbsp *mcbsp;
 734         int dma_rx_ch;
 735         int src_port = 0;
 736         int dest_port = 0;
 737         int sync_dev = 0;
 738
 739         if (!omap_mcbsp_check_valid_id(id)) {
 740                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 741                 return -ENODEV;
 742         }
 743         mcbsp = id_to_mcbsp_ptr(id);
 744
 745         if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
 746                                 omap_mcbsp_rx_dma_callback,
 747                                 mcbsp,
 748                                 &dma_rx_ch)) {
 749                 dev_err(mcbsp->dev, "Unable to request DMA channel for "
 750                                 "McBSP%d RX. Trying IRQ based RX\n",
 751                                 mcbsp->id);
 752                 return -EAGAIN;
 753         }
 754         mcbsp->dma_rx_lch = dma_rx_ch;
 755
 756         dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
 757                 dma_rx_ch);
 758
 759         init_completion(&mcbsp->rx_dma_completion);
 760
 761         if (cpu_class_is_omap1()) {
 762                 src_port = OMAP_DMA_PORT_TIPB;
 763                 dest_port = OMAP_DMA_PORT_EMIFF;
 764         }
 765         if (cpu_class_is_omap2())
 766                 sync_dev = mcbsp->dma_rx_sync;
 767
 768         omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
 769                                         OMAP_DMA_DATA_TYPE_S16,
 770                                         length >> 1, 1,
 771                                         OMAP_DMA_SYNC_ELEMENT,
 772                                         sync_dev, 0);
 773
 774         omap_set_dma_src_params(mcbsp->dma_rx_lch,
 775                                 src_port,
 776                                 OMAP_DMA_AMODE_CONSTANT,
 777                                 mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
 778                                 0, 0);
 779
 780         omap_set_dma_dest_params(mcbsp->dma_rx_lch,
 781                                         dest_port,
 782                                         OMAP_DMA_AMODE_POST_INC,
 783                                         buffer,
 784                                         0, 0);
 785
 786         omap_start_dma(mcbsp->dma_rx_lch);
 787         wait_for_completion(&mcbsp->rx_dma_completion);
 788
 789         return 0;
 790 }
 791 EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
 792
 793 /*
 794  * SPI wrapper.
 795  * Since SPI setup is much simpler than the generic McBSP one,
 796  * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
 797  * Once this is done, you can call omap_mcbsp_start().
 798  */
 799 void omap_mcbsp_set_spi_mode(unsigned int id,
 800                                 const struct omap_mcbsp_spi_cfg *spi_cfg)
 801 {
 802         struct omap_mcbsp *mcbsp;
 803         struct omap_mcbsp_reg_cfg mcbsp_cfg;
 804
 805         if (!omap_mcbsp_check_valid_id(id)) {
 806                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 807                 return;
 808         }
 809         mcbsp = id_to_mcbsp_ptr(id);
 810
 811         memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
 812
 813         /* SPI has only one frame */
 814         mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
 815         mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
 816
 817         /* Clock stop mode */
 818         if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
 819                 mcbsp_cfg.spcr1 |= (1 << 12);
 820         else
 821                 mcbsp_cfg.spcr1 |= (3 << 11);
 822
 823         /* Set clock parities */
 824         if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
 825                 mcbsp_cfg.pcr0 |= CLKRP;
 826         else
 827                 mcbsp_cfg.pcr0 &= ~CLKRP;
 828
 829         if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
 830                 mcbsp_cfg.pcr0 &= ~CLKXP;
 831         else
 832                 mcbsp_cfg.pcr0 |= CLKXP;
 833
 834         /* Set SCLKME to 0 and CLKSM to 1 */
 835         mcbsp_cfg.pcr0 &= ~SCLKME;
 836         mcbsp_cfg.srgr2 |= CLKSM;
 837
 838         /* Set FSXP */
 839         if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
 840                 mcbsp_cfg.pcr0 &= ~FSXP;
 841         else
 842                 mcbsp_cfg.pcr0 |= FSXP;
 843
 844         if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
 845                 mcbsp_cfg.pcr0 |= CLKXM;
 846                 mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
 847                 mcbsp_cfg.pcr0 |= FSXM;
 848                 mcbsp_cfg.srgr2 &= ~FSGM;
 849                 mcbsp_cfg.xcr2 |= XDATDLY(1);
 850                 mcbsp_cfg.rcr2 |= RDATDLY(1);
 851         } else {
 852                 mcbsp_cfg.pcr0 &= ~CLKXM;
 853                 mcbsp_cfg.srgr1 |= CLKGDV(1);
 854                 mcbsp_cfg.pcr0 &= ~FSXM;
 855                 mcbsp_cfg.xcr2 &= ~XDATDLY(3);
 856                 mcbsp_cfg.rcr2 &= ~RDATDLY(3);
 857         }
 858
 859         mcbsp_cfg.xcr2 &= ~XPHASE;
 860         mcbsp_cfg.rcr2 &= ~RPHASE;
 861
 862         omap_mcbsp_config(id, &mcbsp_cfg);
 863 }
 864 EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
 865
 866 /*
 867  * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
 868  * 730 has only 2 McBSP, and both of them are MPU peripherals.
 869  */
 870 static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
 871 {
 872         struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
 873         struct omap_mcbsp *mcbsp;
 874         int id = pdev->id - 1;
 875         int ret = 0;
 876
 877         if (!pdata) {
 878                 dev_err(&pdev->dev, "McBSP device initialized without"
 879                                 "platform data\n");
 880                 ret = -EINVAL;
 881                 goto exit;
 882         }
 883
 884         dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
 885
 886         if (id >= omap_mcbsp_count) {
 887                 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
 888                 ret = -EINVAL;
 889                 goto exit;
 890         }
 891
 892         mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
 893         if (!mcbsp) {
 894                 ret = -ENOMEM;
 895                 goto exit;
 896         }
 897         mcbsp_ptr[id] = mcbsp;
 898
 899         spin_lock_init(&mcbsp->lock);
 900         mcbsp->id = id + 1;
 901         mcbsp->free = 1;
 902         mcbsp->dma_tx_lch = -1;
 903         mcbsp->dma_rx_lch = -1;
 904
 905         mcbsp->phys_base = pdata->phys_base;
 906         mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
 907         if (!mcbsp->io_base) {
 908                 ret = -ENOMEM;
 909                 goto err_ioremap;
 910         }
 911
 912         /* Default I/O is IRQ based */
 913         mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
 914         mcbsp->tx_irq = pdata->tx_irq;
 915         mcbsp->rx_irq = pdata->rx_irq;
 916         mcbsp->dma_rx_sync = pdata->dma_rx_sync;
 917         mcbsp->dma_tx_sync = pdata->dma_tx_sync;
 918
 919         if (pdata->clk_name)
 920                 mcbsp->clk = clk_get(&pdev->dev, pdata->clk_name);
 921         if (IS_ERR(mcbsp->clk)) {
 922                 dev_err(&pdev->dev,
 923                         "Invalid clock configuration for McBSP%d.\n",
 924                         mcbsp->id);
 925                 ret = PTR_ERR(mcbsp->clk);
 926                 goto err_clk;
 927         }
 928
 929         mcbsp->pdata = pdata;
 930         mcbsp->dev = &pdev->dev;
 931         platform_set_drvdata(pdev, mcbsp);
 932         return 0;
 933
 934 err_clk:
 935         iounmap(mcbsp->io_base);
 936 err_ioremap:
 937         mcbsp->free = 0;
 938 exit:
 939         return ret;
 940 }
 941
 942 static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
 943 {
 944         struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
 945
 946         platform_set_drvdata(pdev, NULL);
 947         if (mcbsp) {
 948
 949                 if (mcbsp->pdata && mcbsp->pdata->ops &&
 950                                 mcbsp->pdata->ops->free)
 951                         mcbsp->pdata->ops->free(mcbsp->id);
 952
 953                 clk_disable(mcbsp->clk);
 954                 clk_put(mcbsp->clk);
 955
 956                 iounmap(mcbsp->io_base);
 957
 958                 mcbsp->clk = NULL;
 959                 mcbsp->free = 0;
 960                 mcbsp->dev = NULL;
 961         }
 962
 963         return 0;
 964 }
 965
 966 static struct platform_driver omap_mcbsp_driver = {
 967         .probe          = omap_mcbsp_probe,
 968         .remove         = __devexit_p(omap_mcbsp_remove),
 969         .driver         = {
 970                 .name   = "omap-mcbsp",
 971         },
 972 };
 973
 974 int __init omap_mcbsp_init(void)
 975 {
 976         /* Register the McBSP driver */
 977         return platform_driver_register(&omap_mcbsp_driver);
 978 }
 979