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   1 /*
   2  * arch/powerpc/platforms/pseries/xics.c
   3  *
   4  * Copyright 2000 IBM Corporation.
   5  *
   6  *  This program is free software; you can redistribute it and/or
   7  *  modify it under the terms of the GNU General Public License
   8  *  as published by the Free Software Foundation; either version
   9  *  2 of the License, or (at your option) any later version.
  10  */
  11
  12 #undef DEBUG
  13
  14 #include <linux/types.h>
  15 #include <linux/threads.h>
  16 #include <linux/kernel.h>
  17 #include <linux/irq.h>
  18 #include <linux/smp.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/signal.h>
  21 #include <linux/init.h>
  22 #include <linux/gfp.h>
  23 #include <linux/radix-tree.h>
  24 #include <linux/cpu.h>
  25
  26 #include <asm/firmware.h>
  27 #include <asm/prom.h>
  28 #include <asm/io.h>
  29 #include <asm/pgtable.h>
  30 #include <asm/smp.h>
  31 #include <asm/rtas.h>
  32 #include <asm/hvcall.h>
  33 #include <asm/machdep.h>
  34 #include <asm/i8259.h>
  35
  36 #include "xics.h"
  37 #include "plpar_wrappers.h"
  38
  39 #define XICS_IPI                2
  40 #define XICS_IRQ_SPURIOUS       0
  41
  42 /* Want a priority other than 0.  Various HW issues require this. */
  43 #define DEFAULT_PRIORITY        5
  44
  45 /*
  46  * Mark IPIs as higher priority so we can take them inside interrupts that
  47  * arent marked IRQF_DISABLED
  48  */
  49 #define IPI_PRIORITY            4
  50
  51 struct xics_ipl {
  52         union {
  53                 u32 word;
  54                 u8 bytes[4];
  55         } xirr_poll;
  56         union {
  57                 u32 word;
  58                 u8 bytes[4];
  59         } xirr;
  60         u32 dummy;
  61         union {
  62                 u32 word;
  63                 u8 bytes[4];
  64         } qirr;
  65 };
  66
  67 static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS];
  68
  69 static unsigned int default_server = 0xFF;
  70 static unsigned int default_distrib_server = 0;
  71 static unsigned int interrupt_server_size = 8;
  72
  73 static struct irq_host *xics_host;
  74
  75 /*
  76  * XICS only has a single IPI, so encode the messages per CPU
  77  */
  78 struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
  79
  80 /* RTAS service tokens */
  81 static int ibm_get_xive;
  82 static int ibm_set_xive;
  83 static int ibm_int_on;
  84 static int ibm_int_off;
  85
  86
  87 /* Direct HW low level accessors */
  88
  89
  90 static inline unsigned int direct_xirr_info_get(int n_cpu)
  91 {
  92         return in_be32(&xics_per_cpu[n_cpu]->xirr.word);
  93 }
  94
  95 static inline void direct_xirr_info_set(int n_cpu, int value)
  96 {
  97         out_be32(&xics_per_cpu[n_cpu]->xirr.word, value);
  98 }
  99
 100 static inline void direct_cppr_info(int n_cpu, u8 value)
 101 {
 102         out_8(&xics_per_cpu[n_cpu]->xirr.bytes[0], value);
 103 }
 104
 105 static inline void direct_qirr_info(int n_cpu, u8 value)
 106 {
 107         out_8(&xics_per_cpu[n_cpu]->qirr.bytes[0], value);
 108 }
 109
 110
 111 /* LPAR low level accessors */
 112
 113
 114 static inline unsigned int lpar_xirr_info_get(int n_cpu)
 115 {
 116         unsigned long lpar_rc;
 117         unsigned long return_value;
 118
 119         lpar_rc = plpar_xirr(&return_value);
 120         if (lpar_rc != H_SUCCESS)
 121                 panic(" bad return code xirr - rc = %lx \n", lpar_rc);
 122         return (unsigned int)return_value;
 123 }
 124
 125 static inline void lpar_xirr_info_set(int n_cpu, int value)
 126 {
 127         unsigned long lpar_rc;
 128         unsigned long val64 = value & 0xffffffff;
 129
 130         lpar_rc = plpar_eoi(val64);
 131         if (lpar_rc != H_SUCCESS)
 132                 panic("bad return code EOI - rc = %ld, value=%lx\n", lpar_rc,
 133                       val64);
 134 }
 135
 136 static inline void lpar_cppr_info(int n_cpu, u8 value)
 137 {
 138         unsigned long lpar_rc;
 139
 140         lpar_rc = plpar_cppr(value);
 141         if (lpar_rc != H_SUCCESS)
 142                 panic("bad return code cppr - rc = %lx\n", lpar_rc);
 143 }
 144
 145 static inline void lpar_qirr_info(int n_cpu , u8 value)
 146 {
 147         unsigned long lpar_rc;
 148
 149         lpar_rc = plpar_ipi(get_hard_smp_processor_id(n_cpu), value);
 150         if (lpar_rc != H_SUCCESS)
 151                 panic("bad return code qirr - rc = %lx\n", lpar_rc);
 152 }
 153
 154
 155 /* High level handlers and init code */
 156
 157
 158 #ifdef CONFIG_SMP
 159 static int get_irq_server(unsigned int virq, unsigned int strict_check)
 160 {
 161         int server;
 162         /* For the moment only implement delivery to all cpus or one cpu */
 163         cpumask_t cpumask = irq_desc[virq].affinity;
 164         cpumask_t tmp = CPU_MASK_NONE;
 165
 166         if (!distribute_irqs)
 167                 return default_server;
 168
 169         if (!cpus_equal(cpumask, CPU_MASK_ALL)) {
 170                 cpus_and(tmp, cpu_online_map, cpumask);
 171
 172                 server = first_cpu(tmp);
 173
 174                 if (server < NR_CPUS)
 175                         return get_hard_smp_processor_id(server);
 176
 177                 if (strict_check)
 178                         return -1;
 179         }
 180
 181         if (cpus_equal(cpu_online_map, cpu_present_map))
 182                 return default_distrib_server;
 183
 184         return default_server;
 185 }
 186 #else
 187 static int get_irq_server(unsigned int virq, unsigned int strict_check)
 188 {
 189         return default_server;
 190 }
 191 #endif
 192
 193
 194 static void xics_unmask_irq(unsigned int virq)
 195 {
 196         unsigned int irq;
 197         int call_status;
 198         int server;
 199
 200         pr_debug("xics: unmask virq %d\n", virq);
 201
 202         irq = (unsigned int)irq_map[virq].hwirq;
 203         pr_debug(" -> map to hwirq 0x%x\n", irq);
 204         if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 205                 return;
 206
 207         server = get_irq_server(virq, 0);
 208
 209         call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server,
 210                                 DEFAULT_PRIORITY);
 211         if (call_status != 0) {
 212                 printk(KERN_ERR "xics_enable_irq: irq=%u: ibm_set_xive "
 213                        "returned %d\n", irq, call_status);
 214                 printk("set_xive %x, server %x\n", ibm_set_xive, server);
 215                 return;
 216         }
 217
 218         /* Now unmask the interrupt (often a no-op) */
 219         call_status = rtas_call(ibm_int_on, 1, 1, NULL, irq);
 220         if (call_status != 0) {
 221                 printk(KERN_ERR "xics_enable_irq: irq=%u: ibm_int_on "
 222                        "returned %d\n", irq, call_status);
 223                 return;
 224         }
 225 }
 226
 227 static void xics_mask_real_irq(unsigned int irq)
 228 {
 229         int call_status;
 230
 231         if (irq == XICS_IPI)
 232                 return;
 233
 234         call_status = rtas_call(ibm_int_off, 1, 1, NULL, irq);
 235         if (call_status != 0) {
 236                 printk(KERN_ERR "xics_disable_real_irq: irq=%u: "
 237                        "ibm_int_off returned %d\n", irq, call_status);
 238                 return;
 239         }
 240
 241         /* Have to set XIVE to 0xff to be able to remove a slot */
 242         call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq,
 243                                 default_server, 0xff);
 244         if (call_status != 0) {
 245                 printk(KERN_ERR "xics_disable_irq: irq=%u: ibm_set_xive(0xff)"
 246                        " returned %d\n", irq, call_status);
 247                 return;
 248         }
 249 }
 250
 251 static void xics_mask_irq(unsigned int virq)
 252 {
 253         unsigned int irq;
 254
 255         pr_debug("xics: mask virq %d\n", virq);
 256
 257         irq = (unsigned int)irq_map[virq].hwirq;
 258         if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 259                 return;
 260         xics_mask_real_irq(irq);
 261 }
 262
 263 static unsigned int xics_startup(unsigned int virq)
 264 {
 265         unsigned int irq;
 266
 267         /* force a reverse mapping of the interrupt so it gets in the cache */
 268         irq = (unsigned int)irq_map[virq].hwirq;
 269         irq_radix_revmap(xics_host, irq);
 270
 271         /* unmask it */
 272         xics_unmask_irq(virq);
 273         return 0;
 274 }
 275
 276 static void xics_eoi_direct(unsigned int virq)
 277 {
 278         int cpu = smp_processor_id();
 279         unsigned int irq = (unsigned int)irq_map[virq].hwirq;
 280
 281         iosync();
 282         direct_xirr_info_set(cpu, (0xff << 24) | irq);
 283 }
 284
 285
 286 static void xics_eoi_lpar(unsigned int virq)
 287 {
 288         int cpu = smp_processor_id();
 289         unsigned int irq = (unsigned int)irq_map[virq].hwirq;
 290
 291         iosync();
 292         lpar_xirr_info_set(cpu, (0xff << 24) | irq);
 293 }
 294
 295 static inline unsigned int xics_remap_irq(unsigned int vec)
 296 {
 297         unsigned int irq;
 298
 299         vec &= 0x00ffffff;
 300
 301         if (vec == XICS_IRQ_SPURIOUS)
 302                 return NO_IRQ;
 303         irq = irq_radix_revmap(xics_host, vec);
 304         if (likely(irq != NO_IRQ))
 305                 return irq;
 306
 307         printk(KERN_ERR "Interrupt %u (real) is invalid,"
 308                " disabling it.\n", vec);
 309         xics_mask_real_irq(vec);
 310         return NO_IRQ;
 311 }
 312
 313 static unsigned int xics_get_irq_direct(void)
 314 {
 315         unsigned int cpu = smp_processor_id();
 316
 317         return xics_remap_irq(direct_xirr_info_get(cpu));
 318 }
 319
 320 static unsigned int xics_get_irq_lpar(void)
 321 {
 322         unsigned int cpu = smp_processor_id();
 323
 324         return xics_remap_irq(lpar_xirr_info_get(cpu));
 325 }
 326
 327 #ifdef CONFIG_SMP
 328
 329 static irqreturn_t xics_ipi_dispatch(int cpu)
 330 {
 331         WARN_ON(cpu_is_offline(cpu));
 332
 333         while (xics_ipi_message[cpu].value) {
 334                 if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION,
 335                                        &xics_ipi_message[cpu].value)) {
 336                         mb();
 337                         smp_message_recv(PPC_MSG_CALL_FUNCTION);
 338                 }
 339                 if (test_and_clear_bit(PPC_MSG_RESCHEDULE,
 340                                        &xics_ipi_message[cpu].value)) {
 341                         mb();
 342                         smp_message_recv(PPC_MSG_RESCHEDULE);
 343                 }
 344 #if 0
 345                 if (test_and_clear_bit(PPC_MSG_MIGRATE_TASK,
 346                                        &xics_ipi_message[cpu].value)) {
 347                         mb();
 348                         smp_message_recv(PPC_MSG_MIGRATE_TASK);
 349                 }
 350 #endif
 351 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
 352                 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK,
 353                                        &xics_ipi_message[cpu].value)) {
 354                         mb();
 355                         smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
 356                 }
 357 #endif
 358         }
 359         return IRQ_HANDLED;
 360 }
 361
 362 static irqreturn_t xics_ipi_action_direct(int irq, void *dev_id)
 363 {
 364         int cpu = smp_processor_id();
 365
 366         direct_qirr_info(cpu, 0xff);
 367
 368         return xics_ipi_dispatch(cpu);
 369 }
 370
 371 static irqreturn_t xics_ipi_action_lpar(int irq, void *dev_id)
 372 {
 373         int cpu = smp_processor_id();
 374
 375         lpar_qirr_info(cpu, 0xff);
 376
 377         return xics_ipi_dispatch(cpu);
 378 }
 379
 380 void xics_cause_IPI(int cpu)
 381 {
 382         if (firmware_has_feature(FW_FEATURE_LPAR))
 383                 lpar_qirr_info(cpu, IPI_PRIORITY);
 384         else
 385                 direct_qirr_info(cpu, IPI_PRIORITY);
 386 }
 387
 388 #endif /* CONFIG_SMP */
 389
 390 static void xics_set_cpu_priority(int cpu, unsigned char cppr)
 391 {
 392         if (firmware_has_feature(FW_FEATURE_LPAR))
 393                 lpar_cppr_info(cpu, cppr);
 394         else
 395                 direct_cppr_info(cpu, cppr);
 396         iosync();
 397 }
 398
 399 static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
 400 {
 401         unsigned int irq;
 402         int status;
 403         int xics_status[2];
 404         int irq_server;
 405
 406         irq = (unsigned int)irq_map[virq].hwirq;
 407         if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 408                 return;
 409
 410         status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
 411
 412         if (status) {
 413                 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,get-xive "
 414                        "returns %d\n", irq, status);
 415                 return;
 416         }
 417
 418         /*
 419          * For the moment only implement delivery to all cpus or one cpu.
 420          * Get current irq_server for the given irq
 421          */
 422         irq_server = get_irq_server(virq, 1);
 423         if (irq_server == -1) {
 424                 char cpulist[128];
 425                 cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask);
 426                 printk(KERN_WARNING "xics_set_affinity: No online cpus in "
 427                                 "the mask %s for irq %d\n", cpulist, virq);
 428                 return;
 429         }
 430
 431         status = rtas_call(ibm_set_xive, 3, 1, NULL,
 432                                 irq, irq_server, xics_status[1]);
 433
 434         if (status) {
 435                 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,set-xive "
 436                        "returns %d\n", irq, status);
 437                 return;
 438         }
 439 }
 440
 441 void xics_setup_cpu(void)
 442 {
 443         int cpu = smp_processor_id();
 444
 445         xics_set_cpu_priority(cpu, 0xff);
 446
 447         /*
 448          * Put the calling processor into the GIQ.  This is really only
 449          * necessary from a secondary thread as the OF start-cpu interface
 450          * performs this function for us on primary threads.
 451          *
 452          * XXX: undo of teardown on kexec needs this too, as may hotplug
 453          */
 454         rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE,
 455                 (1UL << interrupt_server_size) - 1 - default_distrib_server, 1);
 456 }
 457
 458
 459 static struct irq_chip xics_pic_direct = {
 460         .typename = " XICS     ",
 461         .startup = xics_startup,
 462         .mask = xics_mask_irq,
 463         .unmask = xics_unmask_irq,
 464         .eoi = xics_eoi_direct,
 465         .set_affinity = xics_set_affinity
 466 };
 467
 468
 469 static struct irq_chip xics_pic_lpar = {
 470         .typename = " XICS     ",
 471         .startup = xics_startup,
 472         .mask = xics_mask_irq,
 473         .unmask = xics_unmask_irq,
 474         .eoi = xics_eoi_lpar,
 475         .set_affinity = xics_set_affinity
 476 };
 477
 478
 479 static int xics_host_match(struct irq_host *h, struct device_node *node)
 480 {
 481         /* IBM machines have interrupt parents of various funky types for things
 482          * like vdevices, events, etc... The trick we use here is to match
 483          * everything here except the legacy 8259 which is compatible "chrp,iic"
 484          */
 485         return !of_device_is_compatible(node, "chrp,iic");
 486 }
 487
 488 static int xics_host_map_direct(struct irq_host *h, unsigned int virq,
 489                                 irq_hw_number_t hw)
 490 {
 491         pr_debug("xics: map_direct virq %d, hwirq 0x%lx\n", virq, hw);
 492
 493         get_irq_desc(virq)->status |= IRQ_LEVEL;
 494         set_irq_chip_and_handler(virq, &xics_pic_direct, handle_fasteoi_irq);
 495         return 0;
 496 }
 497
 498 static int xics_host_map_lpar(struct irq_host *h, unsigned int virq,
 499                               irq_hw_number_t hw)
 500 {
 501         pr_debug("xics: map_direct virq %d, hwirq 0x%lx\n", virq, hw);
 502
 503         get_irq_desc(virq)->status |= IRQ_LEVEL;
 504         set_irq_chip_and_handler(virq, &xics_pic_lpar, handle_fasteoi_irq);
 505         return 0;
 506 }
 507
 508 static int xics_host_xlate(struct irq_host *h, struct device_node *ct,
 509                            u32 *intspec, unsigned int intsize,
 510                            irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 511
 512 {
 513         /* Current xics implementation translates everything
 514          * to level. It is not technically right for MSIs but this
 515          * is irrelevant at this point. We might get smarter in the future
 516          */
 517         *out_hwirq = intspec[0];
 518         *out_flags = IRQ_TYPE_LEVEL_LOW;
 519
 520         return 0;
 521 }
 522
 523 static struct irq_host_ops xics_host_direct_ops = {
 524         .match = xics_host_match,
 525         .map = xics_host_map_direct,
 526         .xlate = xics_host_xlate,
 527 };
 528
 529 static struct irq_host_ops xics_host_lpar_ops = {
 530         .match = xics_host_match,
 531         .map = xics_host_map_lpar,
 532         .xlate = xics_host_xlate,
 533 };
 534
 535 static void __init xics_init_host(void)
 536 {
 537         struct irq_host_ops *ops;
 538
 539         if (firmware_has_feature(FW_FEATURE_LPAR))
 540                 ops = &xics_host_lpar_ops;
 541         else
 542                 ops = &xics_host_direct_ops;
 543         xics_host = irq_alloc_host(NULL, IRQ_HOST_MAP_TREE, 0, ops,
 544                                    XICS_IRQ_SPURIOUS);
 545         BUG_ON(xics_host == NULL);
 546         irq_set_default_host(xics_host);
 547 }
 548
 549 static void __init xics_map_one_cpu(int hw_id, unsigned long addr,
 550                                      unsigned long size)
 551 {
 552 #ifdef CONFIG_SMP
 553         int i;
 554
 555         /* This may look gross but it's good enough for now, we don't quite
 556          * have a hard -> linux processor id matching.
 557          */
 558         for_each_possible_cpu(i) {
 559                 if (!cpu_present(i))
 560                         continue;
 561                 if (hw_id == get_hard_smp_processor_id(i)) {
 562                         xics_per_cpu[i] = ioremap(addr, size);
 563                         return;
 564                 }
 565         }
 566 #else
 567         if (hw_id != 0)
 568                 return;
 569         xics_per_cpu[0] = ioremap(addr, size);
 570 #endif /* CONFIG_SMP */
 571 }
 572
 573 static void __init xics_init_one_node(struct device_node *np,
 574                                       unsigned int *indx)
 575 {
 576         unsigned int ilen;
 577         const u32 *ireg;
 578
 579         /* This code does the theorically broken assumption that the interrupt
 580          * server numbers are the same as the hard CPU numbers.
 581          * This happens to be the case so far but we are playing with fire...
 582          * should be fixed one of these days. -BenH.
 583          */
 584         ireg = of_get_property(np, "ibm,interrupt-server-ranges", NULL);
 585
 586         /* Do that ever happen ? we'll know soon enough... but even good'old
 587          * f80 does have that property ..
 588          */
 589         WARN_ON(ireg == NULL);
 590         if (ireg) {
 591                 /*
 592                  * set node starting index for this node
 593                  */
 594                 *indx = *ireg;
 595         }
 596         ireg = of_get_property(np, "reg", &ilen);
 597         if (!ireg)
 598                 panic("xics_init_IRQ: can't find interrupt reg property");
 599
 600         while (ilen >= (4 * sizeof(u32))) {
 601                 unsigned long addr, size;
 602
 603                 /* XXX Use proper OF parsing code here !!! */
 604                 addr = (unsigned long)*ireg++ << 32;
 605                 ilen -= sizeof(u32);
 606                 addr |= *ireg++;
 607                 ilen -= sizeof(u32);
 608                 size = (unsigned long)*ireg++ << 32;
 609                 ilen -= sizeof(u32);
 610                 size |= *ireg++;
 611                 ilen -= sizeof(u32);
 612                 xics_map_one_cpu(*indx, addr, size);
 613                 (*indx)++;
 614         }
 615 }
 616
 617
 618 static void __init xics_setup_8259_cascade(void)
 619 {
 620         struct device_node *np, *old, *found = NULL;
 621         int cascade, naddr;
 622         const u32 *addrp;
 623         unsigned long intack = 0;
 624
 625         for_each_node_by_type(np, "interrupt-controller")
 626                 if (of_device_is_compatible(np, "chrp,iic")) {
 627                         found = np;
 628                         break;
 629                 }
 630         if (found == NULL) {
 631                 printk(KERN_DEBUG "xics: no ISA interrupt controller\n");
 632                 return;
 633         }
 634         cascade = irq_of_parse_and_map(found, 0);
 635         if (cascade == NO_IRQ) {
 636                 printk(KERN_ERR "xics: failed to map cascade interrupt");
 637                 return;
 638         }
 639         pr_debug("xics: cascade mapped to irq %d\n", cascade);
 640
 641         for (old = of_node_get(found); old != NULL ; old = np) {
 642                 np = of_get_parent(old);
 643                 of_node_put(old);
 644                 if (np == NULL)
 645                         break;
 646                 if (strcmp(np->name, "pci") != 0)
 647                         continue;
 648                 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
 649                 if (addrp == NULL)
 650                         continue;
 651                 naddr = of_n_addr_cells(np);
 652                 intack = addrp[naddr-1];
 653                 if (naddr > 1)
 654                         intack |= ((unsigned long)addrp[naddr-2]) << 32;
 655         }
 656         if (intack)
 657                 printk(KERN_DEBUG "xics: PCI 8259 intack at 0x%016lx\n", intack);
 658         i8259_init(found, intack);
 659         of_node_put(found);
 660         set_irq_chained_handler(cascade, pseries_8259_cascade);
 661 }
 662
 663 static struct device_node *cpuid_to_of_node(int cpu)
 664 {
 665         struct device_node *np;
 666         u32 hcpuid = get_hard_smp_processor_id(cpu);
 667
 668         for_each_node_by_type(np, "cpu") {
 669                 int i, len;
 670                 const u32 *intserv;
 671
 672                 intserv = of_get_property(np, "ibm,ppc-interrupt-server#s",
 673                                         &len);
 674
 675                 if (!intserv)
 676                         intserv = of_get_property(np, "reg", &len);
 677
 678                 i = len / sizeof(u32);
 679
 680                 while (i--)
 681                         if (intserv[i] == hcpuid)
 682                                 return np;
 683         }
 684
 685         return NULL;
 686 }
 687
 688 void __init xics_init_IRQ(void)
 689 {
 690         int i, j;
 691         struct device_node *np;
 692         u32 ilen, indx = 0;
 693         const u32 *ireg, *isize;
 694         int found = 0;
 695         u32 hcpuid;
 696
 697         ppc64_boot_msg(0x20, "XICS Init");
 698
 699         ibm_get_xive = rtas_token("ibm,get-xive");
 700         ibm_set_xive = rtas_token("ibm,set-xive");
 701         ibm_int_on  = rtas_token("ibm,int-on");
 702         ibm_int_off = rtas_token("ibm,int-off");
 703
 704         for_each_node_by_type(np, "PowerPC-External-Interrupt-Presentation") {
 705                 found = 1;
 706                 if (firmware_has_feature(FW_FEATURE_LPAR))
 707                         break;
 708                 xics_init_one_node(np, &indx);
 709         }
 710         if (found == 0)
 711                 return;
 712
 713         xics_init_host();
 714
 715         /* Find the server numbers for the boot cpu. */
 716         np = cpuid_to_of_node(boot_cpuid);
 717         BUG_ON(!np);
 718         ireg = of_get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen);
 719         if (!ireg)
 720                 goto skip_gserver_check;
 721         i = ilen / sizeof(int);
 722         hcpuid = get_hard_smp_processor_id(boot_cpuid);
 723
 724         /* Global interrupt distribution server is specified in the last
 725          * entry of "ibm,ppc-interrupt-gserver#s" property. Get the last
 726          * entry fom this property for current boot cpu id and use it as
 727          * default distribution server
 728          */
 729         for (j = 0; j < i; j += 2) {
 730                 if (ireg[j] == hcpuid) {
 731                         default_server = hcpuid;
 732                         default_distrib_server = ireg[j+1];
 733
 734                         isize = of_get_property(np,
 735                                         "ibm,interrupt-server#-size", NULL);
 736                         if (isize)
 737                                 interrupt_server_size = *isize;
 738                 }
 739         }
 740 skip_gserver_check:
 741         of_node_put(np);
 742
 743         if (firmware_has_feature(FW_FEATURE_LPAR))
 744                 ppc_md.get_irq = xics_get_irq_lpar;
 745         else
 746                 ppc_md.get_irq = xics_get_irq_direct;
 747
 748         xics_setup_cpu();
 749
 750         xics_setup_8259_cascade();
 751
 752         ppc64_boot_msg(0x21, "XICS Done");
 753 }
 754
 755
 756 #ifdef CONFIG_SMP
 757 void xics_request_IPIs(void)
 758 {
 759         unsigned int ipi;
 760         int rc;
 761
 762         ipi = irq_create_mapping(xics_host, XICS_IPI);
 763         BUG_ON(ipi == NO_IRQ);
 764
 765         /*
 766          * IPIs are marked IRQF_DISABLED as they must run with irqs
 767          * disabled
 768          */
 769         set_irq_handler(ipi, handle_percpu_irq);
 770         if (firmware_has_feature(FW_FEATURE_LPAR))
 771                 rc = request_irq(ipi, xics_ipi_action_lpar, IRQF_DISABLED,
 772                                 "IPI", NULL);
 773         else
 774                 rc = request_irq(ipi, xics_ipi_action_direct, IRQF_DISABLED,
 775                                 "IPI", NULL);
 776         BUG_ON(rc);
 777 }
 778 #endif /* CONFIG_SMP */
 779
 780 void xics_teardown_cpu(int secondary)
 781 {
 782         int cpu = smp_processor_id();
 783         unsigned int ipi;
 784         struct irq_desc *desc;
 785
 786         xics_set_cpu_priority(cpu, 0);
 787
 788         /*
 789          * Clear IPI
 790          */
 791         if (firmware_has_feature(FW_FEATURE_LPAR))
 792                 lpar_qirr_info(cpu, 0xff);
 793         else
 794                 direct_qirr_info(cpu, 0xff);
 795
 796         /*
 797          * we need to EOI the IPI if we got here from kexec down IPI
 798          *
 799          * probably need to check all the other interrupts too
 800          * should we be flagging idle loop instead?
 801          * or creating some task to be scheduled?
 802          */
 803
 804         ipi = irq_find_mapping(xics_host, XICS_IPI);
 805         if (ipi == XICS_IRQ_SPURIOUS)
 806                 return;
 807         desc = get_irq_desc(ipi);
 808         if (desc->chip && desc->chip->eoi)
 809                 desc->chip->eoi(ipi);
 810
 811         /*
 812          * Some machines need to have at least one cpu in the GIQ,
 813          * so leave the master cpu in the group.
 814          */
 815         if (secondary)
 816                 rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE,
 817                                    (1UL << interrupt_server_size) - 1 -
 818                                    default_distrib_server, 0);
 819 }
 820
 821 #ifdef CONFIG_HOTPLUG_CPU
 822
 823 /* Interrupts are disabled. */
 824 void xics_migrate_irqs_away(void)
 825 {
 826         int status;
 827         unsigned int irq, virq, cpu = smp_processor_id();
 828
 829         /* Reject any interrupt that was queued to us... */
 830         xics_set_cpu_priority(cpu, 0);
 831
 832         /* remove ourselves from the global interrupt queue */
 833         status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE,
 834                 (1UL << interrupt_server_size) - 1 - default_distrib_server, 0);
 835         WARN_ON(status < 0);
 836
 837         /* Allow IPIs again... */
 838         xics_set_cpu_priority(cpu, DEFAULT_PRIORITY);
 839
 840         for_each_irq(virq) {
 841                 struct irq_desc *desc;
 842                 int xics_status[2];
 843                 unsigned long flags;
 844
 845                 /* We cant set affinity on ISA interrupts */
 846                 if (virq < NUM_ISA_INTERRUPTS)
 847                         continue;
 848                 if (irq_map[virq].host != xics_host)
 849                         continue;
 850                 irq = (unsigned int)irq_map[virq].hwirq;
 851                 /* We need to get IPIs still. */
 852                 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 853                         continue;
 854                 desc = get_irq_desc(virq);
 855
 856                 /* We only need to migrate enabled IRQS */
 857                 if (desc == NULL || desc->chip == NULL
 858                     || desc->action == NULL
 859                     || desc->chip->set_affinity == NULL)
 860                         continue;
 861
 862                 spin_lock_irqsave(&desc->lock, flags);
 863
 864                 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
 865                 if (status) {
 866                         printk(KERN_ERR "migrate_irqs_away: irq=%u "
 867                                         "ibm,get-xive returns %d\n",
 868                                         virq, status);
 869                         goto unlock;
 870                 }
 871
 872                 /*
 873                  * We only support delivery to all cpus or to one cpu.
 874                  * The irq has to be migrated only in the single cpu
 875                  * case.
 876                  */
 877                 if (xics_status[0] != get_hard_smp_processor_id(cpu))
 878                         goto unlock;
 879
 880                 printk(KERN_WARNING "IRQ %u affinity broken off cpu %u\n",
 881                        virq, cpu);
 882
 883                 /* Reset affinity to all cpus */
 884                 desc->chip->set_affinity(virq, CPU_MASK_ALL);
 885                 irq_desc[irq].affinity = CPU_MASK_ALL;
 886 unlock:
 887                 spin_unlock_irqrestore(&desc->lock, flags);
 888         }
 889 }
 890 #endif