2 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
3 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/init.h>
35 #include <linux/errno.h>
37 #include <linux/scatterlist.h>
39 #include <linux/mlx4/cmd.h>
46 * We allocate in as big chunks as we can, up to a maximum of 256 KB
50 MLX4_ICM_ALLOC_SIZE = 1 << 18,
51 MLX4_TABLE_CHUNK_SIZE = 1 << 18
54 static void mlx4_free_icm_pages(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk)
59 pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages,
60 PCI_DMA_BIDIRECTIONAL);
62 for (i = 0; i < chunk->npages; ++i)
63 __free_pages(chunk->mem[i].page,
64 get_order(chunk->mem[i].length));
67 static void mlx4_free_icm_coherent(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk)
71 for (i = 0; i < chunk->npages; ++i)
72 dma_free_coherent(&dev->pdev->dev, chunk->mem[i].length,
73 lowmem_page_address(chunk->mem[i].page),
74 sg_dma_address(&chunk->mem[i]));
77 void mlx4_free_icm(struct mlx4_dev *dev, struct mlx4_icm *icm, int coherent)
79 struct mlx4_icm_chunk *chunk, *tmp;
84 list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) {
86 mlx4_free_icm_coherent(dev, chunk);
88 mlx4_free_icm_pages(dev, chunk);
96 static int mlx4_alloc_icm_pages(struct scatterlist *mem, int order, gfp_t gfp_mask)
98 mem->page = alloc_pages(gfp_mask, order);
102 mem->length = PAGE_SIZE << order;
107 static int mlx4_alloc_icm_coherent(struct device *dev, struct scatterlist *mem,
108 int order, gfp_t gfp_mask)
110 void *buf = dma_alloc_coherent(dev, PAGE_SIZE << order,
111 &sg_dma_address(mem), gfp_mask);
115 sg_set_buf(mem, buf, PAGE_SIZE << order);
117 sg_dma_len(mem) = PAGE_SIZE << order;
121 struct mlx4_icm *mlx4_alloc_icm(struct mlx4_dev *dev, int npages,
122 gfp_t gfp_mask, int coherent)
124 struct mlx4_icm *icm;
125 struct mlx4_icm_chunk *chunk = NULL;
129 /* We use sg_set_buf for coherent allocs, which assumes low memory */
130 BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM));
132 icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
137 INIT_LIST_HEAD(&icm->chunk_list);
139 cur_order = get_order(MLX4_ICM_ALLOC_SIZE);
143 chunk = kmalloc(sizeof *chunk,
144 gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
150 list_add_tail(&chunk->list, &icm->chunk_list);
153 while (1 << cur_order > npages)
157 ret = mlx4_alloc_icm_coherent(&dev->pdev->dev,
158 &chunk->mem[chunk->npages],
159 cur_order, gfp_mask);
161 ret = mlx4_alloc_icm_pages(&chunk->mem[chunk->npages],
162 cur_order, gfp_mask);
169 else if (chunk->npages == MLX4_ICM_CHUNK_LEN) {
170 chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
172 PCI_DMA_BIDIRECTIONAL);
180 npages -= 1 << cur_order;
188 if (!coherent && chunk) {
189 chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
191 PCI_DMA_BIDIRECTIONAL);
200 mlx4_free_icm(dev, icm, coherent);
204 static int mlx4_MAP_ICM(struct mlx4_dev *dev, struct mlx4_icm *icm, u64 virt)
206 return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM, icm, virt);
209 int mlx4_UNMAP_ICM(struct mlx4_dev *dev, u64 virt, u32 page_count)
211 return mlx4_cmd(dev, virt, page_count, 0, MLX4_CMD_UNMAP_ICM,
212 MLX4_CMD_TIME_CLASS_B);
215 int mlx4_MAP_ICM_page(struct mlx4_dev *dev, u64 dma_addr, u64 virt)
217 struct mlx4_cmd_mailbox *mailbox;
221 mailbox = mlx4_alloc_cmd_mailbox(dev);
223 return PTR_ERR(mailbox);
224 inbox = mailbox->buf;
226 inbox[0] = cpu_to_be64(virt);
227 inbox[1] = cpu_to_be64(dma_addr);
229 err = mlx4_cmd(dev, mailbox->dma, 1, 0, MLX4_CMD_MAP_ICM,
230 MLX4_CMD_TIME_CLASS_B);
232 mlx4_free_cmd_mailbox(dev, mailbox);
235 mlx4_dbg(dev, "Mapped page at %llx to %llx for ICM.\n",
236 (unsigned long long) dma_addr, (unsigned long long) virt);
241 int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm)
243 return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM_AUX, icm, -1);
246 int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev)
248 return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_UNMAP_ICM_AUX, MLX4_CMD_TIME_CLASS_B);
251 int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj)
253 int i = (obj & (table->num_obj - 1)) / (MLX4_TABLE_CHUNK_SIZE / table->obj_size);
256 mutex_lock(&table->mutex);
259 ++table->icm[i]->refcount;
263 table->icm[i] = mlx4_alloc_icm(dev, MLX4_TABLE_CHUNK_SIZE >> PAGE_SHIFT,
264 (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
265 __GFP_NOWARN, table->coherent);
266 if (!table->icm[i]) {
271 if (mlx4_MAP_ICM(dev, table->icm[i], table->virt +
272 (u64) i * MLX4_TABLE_CHUNK_SIZE)) {
273 mlx4_free_icm(dev, table->icm[i], table->coherent);
274 table->icm[i] = NULL;
279 ++table->icm[i]->refcount;
282 mutex_unlock(&table->mutex);
286 void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj)
290 i = (obj & (table->num_obj - 1)) / (MLX4_TABLE_CHUNK_SIZE / table->obj_size);
292 mutex_lock(&table->mutex);
294 if (--table->icm[i]->refcount == 0) {
295 mlx4_UNMAP_ICM(dev, table->virt + i * MLX4_TABLE_CHUNK_SIZE,
296 MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
297 mlx4_free_icm(dev, table->icm[i], table->coherent);
298 table->icm[i] = NULL;
301 mutex_unlock(&table->mutex);
304 void *mlx4_table_find(struct mlx4_icm_table *table, int obj, dma_addr_t *dma_handle)
306 int idx, offset, dma_offset, i;
307 struct mlx4_icm_chunk *chunk;
308 struct mlx4_icm *icm;
309 struct page *page = NULL;
314 mutex_lock(&table->mutex);
316 idx = (obj & (table->num_obj - 1)) * table->obj_size;
317 icm = table->icm[idx / MLX4_TABLE_CHUNK_SIZE];
318 dma_offset = offset = idx % MLX4_TABLE_CHUNK_SIZE;
323 list_for_each_entry(chunk, &icm->chunk_list, list) {
324 for (i = 0; i < chunk->npages; ++i) {
325 if (dma_handle && dma_offset >= 0) {
326 if (sg_dma_len(&chunk->mem[i]) > dma_offset)
327 *dma_handle = sg_dma_address(&chunk->mem[i]) +
329 dma_offset -= sg_dma_len(&chunk->mem[i]);
332 * DMA mapping can merge pages but not split them,
333 * so if we found the page, dma_handle has already
336 if (chunk->mem[i].length > offset) {
337 page = chunk->mem[i].page;
340 offset -= chunk->mem[i].length;
345 mutex_unlock(&table->mutex);
346 return page ? lowmem_page_address(page) + offset : NULL;
349 int mlx4_table_get_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
352 int inc = MLX4_TABLE_CHUNK_SIZE / table->obj_size;
355 for (i = start; i <= end; i += inc) {
356 err = mlx4_table_get(dev, table, i);
366 mlx4_table_put(dev, table, i);
372 void mlx4_table_put_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
377 for (i = start; i <= end; i += MLX4_TABLE_CHUNK_SIZE / table->obj_size)
378 mlx4_table_put(dev, table, i);
381 int mlx4_init_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table,
382 u64 virt, int obj_size, int nobj, int reserved,
383 int use_lowmem, int use_coherent)
390 obj_per_chunk = MLX4_TABLE_CHUNK_SIZE / obj_size;
391 num_icm = (nobj + obj_per_chunk - 1) / obj_per_chunk;
393 table->icm = kcalloc(num_icm, sizeof *table->icm, GFP_KERNEL);
397 table->num_icm = num_icm;
398 table->num_obj = nobj;
399 table->obj_size = obj_size;
400 table->lowmem = use_lowmem;
401 table->coherent = use_coherent;
402 mutex_init(&table->mutex);
404 for (i = 0; i * MLX4_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) {
405 chunk_size = MLX4_TABLE_CHUNK_SIZE;
406 if ((i + 1) * MLX4_TABLE_CHUNK_SIZE > nobj * obj_size)
407 chunk_size = PAGE_ALIGN(nobj * obj_size - i * MLX4_TABLE_CHUNK_SIZE);
409 table->icm[i] = mlx4_alloc_icm(dev, chunk_size >> PAGE_SHIFT,
410 (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
411 __GFP_NOWARN, use_coherent);
414 if (mlx4_MAP_ICM(dev, table->icm[i], virt + i * MLX4_TABLE_CHUNK_SIZE)) {
415 mlx4_free_icm(dev, table->icm[i], use_coherent);
416 table->icm[i] = NULL;
421 * Add a reference to this ICM chunk so that it never
422 * gets freed (since it contains reserved firmware objects).
424 ++table->icm[i]->refcount;
430 for (i = 0; i < num_icm; ++i)
432 mlx4_UNMAP_ICM(dev, virt + i * MLX4_TABLE_CHUNK_SIZE,
433 MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
434 mlx4_free_icm(dev, table->icm[i], use_coherent);
440 void mlx4_cleanup_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table)
444 for (i = 0; i < table->num_icm; ++i)
446 mlx4_UNMAP_ICM(dev, table->virt + i * MLX4_TABLE_CHUNK_SIZE,
447 MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
448 mlx4_free_icm(dev, table->icm[i], table->coherent);