Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6] / arch / arm / mach-s3c2410 / mach-vr1000.c
1 /* linux/arch/arm/mach-s3c2410/mach-vr1000.c
2  *
3  * Copyright (c) 2003-2005,2008 Simtec Electronics
4  *   Ben Dooks <ben@simtec.co.uk>
5  *
6  * Machine support for Thorcom VR1000 board. Designed for Thorcom by
7  * Simtec Electronics, http://www.simtec.co.uk/
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/interrupt.h>
18 #include <linux/list.h>
19 #include <linux/timer.h>
20 #include <linux/init.h>
21 #include <linux/dm9000.h>
22 #include <linux/i2c.h>
23
24 #include <linux/serial.h>
25 #include <linux/tty.h>
26 #include <linux/serial_8250.h>
27 #include <linux/serial_reg.h>
28 #include <linux/io.h>
29
30 #include <asm/mach/arch.h>
31 #include <asm/mach/map.h>
32 #include <asm/mach/irq.h>
33
34 #include <mach/bast-map.h>
35 #include <mach/vr1000-map.h>
36 #include <mach/vr1000-irq.h>
37 #include <mach/vr1000-cpld.h>
38
39 #include <mach/hardware.h>
40 #include <asm/irq.h>
41 #include <asm/mach-types.h>
42
43 #include <plat/regs-serial.h>
44 #include <mach/regs-gpio.h>
45 #include <mach/leds-gpio.h>
46
47 #include <plat/clock.h>
48 #include <plat/devs.h>
49 #include <plat/cpu.h>
50 #include <plat/iic.h>
51
52 #include "usb-simtec.h"
53 #include "nor-simtec.h"
54
55 /* macros for virtual address mods for the io space entries */
56 #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
57 #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
58 #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
59 #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
60
61 /* macros to modify the physical addresses for io space */
62
63 #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
64 #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
65 #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
66 #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
67
68 static struct map_desc vr1000_iodesc[] __initdata = {
69   /* ISA IO areas */
70   {
71           .virtual      = (u32)S3C24XX_VA_ISA_BYTE,
72           .pfn          = PA_CS2(BAST_PA_ISAIO),
73           .length       = SZ_16M,
74           .type         = MT_DEVICE,
75   }, {
76           .virtual      = (u32)S3C24XX_VA_ISA_WORD,
77           .pfn          = PA_CS3(BAST_PA_ISAIO),
78           .length       = SZ_16M,
79           .type         = MT_DEVICE,
80   },
81
82   /*  CPLD control registers, and external interrupt controls */
83   {
84           .virtual      = (u32)VR1000_VA_CTRL1,
85           .pfn          = __phys_to_pfn(VR1000_PA_CTRL1),
86           .length       = SZ_1M,
87           .type         = MT_DEVICE,
88   }, {
89           .virtual      = (u32)VR1000_VA_CTRL2,
90           .pfn          = __phys_to_pfn(VR1000_PA_CTRL2),
91           .length       = SZ_1M,
92           .type         = MT_DEVICE,
93   }, {
94           .virtual      = (u32)VR1000_VA_CTRL3,
95           .pfn          = __phys_to_pfn(VR1000_PA_CTRL3),
96           .length       = SZ_1M,
97           .type         = MT_DEVICE,
98   }, {
99           .virtual      = (u32)VR1000_VA_CTRL4,
100           .pfn          = __phys_to_pfn(VR1000_PA_CTRL4),
101           .length       = SZ_1M,
102           .type         = MT_DEVICE,
103   },
104 };
105
106 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
107 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
108 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
109
110 /* uart clock source(s) */
111
112 static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
113         [0] = {
114                 .name           = "uclk",
115                 .divisor        = 1,
116                 .min_baud       = 0,
117                 .max_baud       = 0,
118         },
119         [1] = {
120                 .name           = "pclk",
121                 .divisor        = 1,
122                 .min_baud       = 0,
123                 .max_baud       = 0.
124         }
125 };
126
127 static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
128         [0] = {
129                 .hwport      = 0,
130                 .flags       = 0,
131                 .ucon        = UCON,
132                 .ulcon       = ULCON,
133                 .ufcon       = UFCON,
134                 .clocks      = vr1000_serial_clocks,
135                 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
136         },
137         [1] = {
138                 .hwport      = 1,
139                 .flags       = 0,
140                 .ucon        = UCON,
141                 .ulcon       = ULCON,
142                 .ufcon       = UFCON,
143                 .clocks      = vr1000_serial_clocks,
144                 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
145         },
146         /* port 2 is not actually used */
147         [2] = {
148                 .hwport      = 2,
149                 .flags       = 0,
150                 .ucon        = UCON,
151                 .ulcon       = ULCON,
152                 .ufcon       = UFCON,
153                 .clocks      = vr1000_serial_clocks,
154                 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
155
156         }
157 };
158
159 /* definitions for the vr1000 extra 16550 serial ports */
160
161 #define VR1000_BAUDBASE (3692307)
162
163 #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
164
165 static struct plat_serial8250_port serial_platform_data[] = {
166         [0] = {
167                 .mapbase        = VR1000_SERIAL_MAPBASE(0),
168                 .irq            = IRQ_VR1000_SERIAL + 0,
169                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
170                 .iotype         = UPIO_MEM,
171                 .regshift       = 0,
172                 .uartclk        = VR1000_BAUDBASE,
173         },
174         [1] = {
175                 .mapbase        = VR1000_SERIAL_MAPBASE(1),
176                 .irq            = IRQ_VR1000_SERIAL + 1,
177                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
178                 .iotype         = UPIO_MEM,
179                 .regshift       = 0,
180                 .uartclk        = VR1000_BAUDBASE,
181         },
182         [2] = {
183                 .mapbase        = VR1000_SERIAL_MAPBASE(2),
184                 .irq            = IRQ_VR1000_SERIAL + 2,
185                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
186                 .iotype         = UPIO_MEM,
187                 .regshift       = 0,
188                 .uartclk        = VR1000_BAUDBASE,
189         },
190         [3] = {
191                 .mapbase        = VR1000_SERIAL_MAPBASE(3),
192                 .irq            = IRQ_VR1000_SERIAL + 3,
193                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
194                 .iotype         = UPIO_MEM,
195                 .regshift       = 0,
196                 .uartclk        = VR1000_BAUDBASE,
197         },
198         { },
199 };
200
201 static struct platform_device serial_device = {
202         .name                   = "serial8250",
203         .id                     = PLAT8250_DEV_PLATFORM,
204         .dev                    = {
205                 .platform_data  = serial_platform_data,
206         },
207 };
208
209 /* DM9000 ethernet devices */
210
211 static struct resource vr1000_dm9k0_resource[] = {
212         [0] = {
213                 .start = S3C2410_CS5 + VR1000_PA_DM9000,
214                 .end   = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
215                 .flags = IORESOURCE_MEM
216         },
217         [1] = {
218                 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
219                 .end   = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
220                 .flags = IORESOURCE_MEM
221         },
222         [2] = {
223                 .start = IRQ_VR1000_DM9000A,
224                 .end   = IRQ_VR1000_DM9000A,
225                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
226         }
227
228 };
229
230 static struct resource vr1000_dm9k1_resource[] = {
231         [0] = {
232                 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
233                 .end   = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
234                 .flags = IORESOURCE_MEM
235         },
236         [1] = {
237                 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
238                 .end   = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
239                 .flags = IORESOURCE_MEM
240         },
241         [2] = {
242                 .start = IRQ_VR1000_DM9000N,
243                 .end   = IRQ_VR1000_DM9000N,
244                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
245         }
246 };
247
248 /* for the moment we limit ourselves to 16bit IO until some
249  * better IO routines can be written and tested
250 */
251
252 static struct dm9000_plat_data vr1000_dm9k_platdata = {
253         .flags          = DM9000_PLATF_16BITONLY,
254 };
255
256 static struct platform_device vr1000_dm9k0 = {
257         .name           = "dm9000",
258         .id             = 0,
259         .num_resources  = ARRAY_SIZE(vr1000_dm9k0_resource),
260         .resource       = vr1000_dm9k0_resource,
261         .dev            = {
262                 .platform_data = &vr1000_dm9k_platdata,
263         }
264 };
265
266 static struct platform_device vr1000_dm9k1 = {
267         .name           = "dm9000",
268         .id             = 1,
269         .num_resources  = ARRAY_SIZE(vr1000_dm9k1_resource),
270         .resource       = vr1000_dm9k1_resource,
271         .dev            = {
272                 .platform_data = &vr1000_dm9k_platdata,
273         }
274 };
275
276 /* LEDS */
277
278 static struct s3c24xx_led_platdata vr1000_led1_pdata = {
279         .name           = "led1",
280         .gpio           = S3C2410_GPB0,
281         .def_trigger    = "",
282 };
283
284 static struct s3c24xx_led_platdata vr1000_led2_pdata = {
285         .name           = "led2",
286         .gpio           = S3C2410_GPB1,
287         .def_trigger    = "",
288 };
289
290 static struct s3c24xx_led_platdata vr1000_led3_pdata = {
291         .name           = "led3",
292         .gpio           = S3C2410_GPB2,
293         .def_trigger    = "",
294 };
295
296 static struct platform_device vr1000_led1 = {
297         .name           = "s3c24xx_led",
298         .id             = 1,
299         .dev            = {
300                 .platform_data  = &vr1000_led1_pdata,
301         },
302 };
303
304 static struct platform_device vr1000_led2 = {
305         .name           = "s3c24xx_led",
306         .id             = 2,
307         .dev            = {
308                 .platform_data  = &vr1000_led2_pdata,
309         },
310 };
311
312 static struct platform_device vr1000_led3 = {
313         .name           = "s3c24xx_led",
314         .id             = 3,
315         .dev            = {
316                 .platform_data  = &vr1000_led3_pdata,
317         },
318 };
319
320 /* I2C devices. */
321
322 static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
323         {
324                 I2C_BOARD_INFO("tlv320aic23", 0x1a),
325         }, {
326                 I2C_BOARD_INFO("tmp101", 0x48),
327         }, {
328                 I2C_BOARD_INFO("m41st87", 0x68),
329         },
330 };
331
332 /* devices for this board */
333
334 static struct platform_device *vr1000_devices[] __initdata = {
335         &s3c_device_usb,
336         &s3c_device_lcd,
337         &s3c_device_wdt,
338         &s3c_device_i2c0,
339         &s3c_device_adc,
340         &serial_device,
341         &vr1000_dm9k0,
342         &vr1000_dm9k1,
343         &vr1000_led1,
344         &vr1000_led2,
345         &vr1000_led3,
346 };
347
348 static struct clk *vr1000_clocks[] __initdata = {
349         &s3c24xx_dclk0,
350         &s3c24xx_dclk1,
351         &s3c24xx_clkout0,
352         &s3c24xx_clkout1,
353         &s3c24xx_uclk,
354 };
355
356 static void vr1000_power_off(void)
357 {
358         s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPB9_OUTP);
359         s3c2410_gpio_setpin(S3C2410_GPB9, 1);
360 }
361
362 static void __init vr1000_map_io(void)
363 {
364         /* initialise clock sources */
365
366         s3c24xx_dclk0.parent = &clk_upll;
367         s3c24xx_dclk0.rate   = 12*1000*1000;
368
369         s3c24xx_dclk1.parent = NULL;
370         s3c24xx_dclk1.rate   = 3692307;
371
372         s3c24xx_clkout0.parent  = &s3c24xx_dclk0;
373         s3c24xx_clkout1.parent  = &s3c24xx_dclk1;
374
375         s3c24xx_uclk.parent  = &s3c24xx_clkout1;
376
377         s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
378
379         pm_power_off = vr1000_power_off;
380
381         s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
382         s3c24xx_init_clocks(0);
383         s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
384 }
385
386 static void __init vr1000_init(void)
387 {
388         s3c_i2c0_set_platdata(NULL);
389         platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
390
391         i2c_register_board_info(0, vr1000_i2c_devs,
392                                 ARRAY_SIZE(vr1000_i2c_devs));
393
394         nor_simtec_init();
395 }
396
397 MACHINE_START(VR1000, "Thorcom-VR1000")
398         /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
399         .phys_io        = S3C2410_PA_UART,
400         .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
401         .boot_params    = S3C2410_SDRAM_PA + 0x100,
402         .map_io         = vr1000_map_io,
403         .init_machine   = vr1000_init,
404         .init_irq       = s3c24xx_init_irq,
405         .timer          = &s3c24xx_timer,
406 MACHINE_END