2 * Platform dependent support for SGI SN
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved.
11 #include <linux/irq.h>
12 #include <linux/spinlock.h>
13 #include <linux/init.h>
14 #include <asm/sn/addrs.h>
15 #include <asm/sn/arch.h>
16 #include <asm/sn/intr.h>
17 #include <asm/sn/pcibr_provider.h>
18 #include <asm/sn/pcibus_provider_defs.h>
19 #include <asm/sn/pcidev.h>
20 #include <asm/sn/shub_mmr.h>
21 #include <asm/sn/sn_sal.h>
23 static void force_interrupt(int irq);
24 static void register_intr_pda(struct sn_irq_info *sn_irq_info);
25 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info);
27 int sn_force_interrupt_flag = 1;
28 extern int sn_ioif_inited;
29 struct list_head **sn_irq_lh;
30 static DEFINE_SPINLOCK(sn_irq_info_lock); /* non-IRQ lock */
32 u64 sn_intr_alloc(nasid_t local_nasid, int local_widget,
33 struct sn_irq_info *sn_irq_info,
34 int req_irq, nasid_t req_nasid,
37 struct ia64_sal_retval ret_stuff;
41 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
42 (u64) SAL_INTR_ALLOC, (u64) local_nasid,
43 (u64) local_widget, __pa(sn_irq_info), (u64) req_irq,
44 (u64) req_nasid, (u64) req_slice);
46 return ret_stuff.status;
49 void sn_intr_free(nasid_t local_nasid, int local_widget,
50 struct sn_irq_info *sn_irq_info)
52 struct ia64_sal_retval ret_stuff;
56 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
57 (u64) SAL_INTR_FREE, (u64) local_nasid,
58 (u64) local_widget, (u64) sn_irq_info->irq_irq,
59 (u64) sn_irq_info->irq_cookie, 0, 0);
62 u64 sn_intr_redirect(nasid_t local_nasid, int local_widget,
63 struct sn_irq_info *sn_irq_info,
64 nasid_t req_nasid, int req_slice)
66 struct ia64_sal_retval ret_stuff;
70 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
71 (u64) SAL_INTR_REDIRECT, (u64) local_nasid,
72 (u64) local_widget, __pa(sn_irq_info),
73 (u64) req_nasid, (u64) req_slice, 0);
75 return ret_stuff.status;
78 static unsigned int sn_startup_irq(unsigned int irq)
83 static void sn_shutdown_irq(unsigned int irq)
87 static void sn_disable_irq(unsigned int irq)
91 static void sn_enable_irq(unsigned int irq)
95 static void sn_ack_irq(unsigned int irq)
97 u64 event_occurred, mask;
100 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED));
101 mask = event_occurred & SH_ALL_INT_MASK;
102 HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask);
103 __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
105 move_native_irq(irq);
108 static void sn_end_irq(unsigned int irq)
114 if (ivec == SGI_UART_VECTOR) {
115 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED));
116 /* If the UART bit is set here, we may have received an
117 * interrupt from the UART that the driver missed. To
118 * make sure, we IPI ourselves to force us to look again.
120 if (event_occurred & SH_EVENT_OCCURRED_UART_INT_MASK) {
121 platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR,
125 __clear_bit(ivec, (volatile void *)pda->sn_in_service_ivecs);
126 if (sn_force_interrupt_flag)
127 force_interrupt(irq);
130 static void sn_irq_info_free(struct rcu_head *head);
132 struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *sn_irq_info,
133 nasid_t nasid, int slice)
141 int local_widget, status;
143 struct sn_irq_info *new_irq_info;
144 struct sn_pcibus_provider *pci_provider;
146 bridge = (u64) sn_irq_info->irq_bridge;
148 return NULL; /* irq is not a device interrupt */
151 local_nasid = NASID_GET(bridge);
154 local_widget = TIO_SWIN_WIDGETNUM(bridge);
156 local_widget = SWIN_WIDGETNUM(bridge);
157 vector = sn_irq_info->irq_irq;
159 /* Make use of SAL_INTR_REDIRECT if PROM supports it */
160 status = sn_intr_redirect(local_nasid, local_widget, sn_irq_info, nasid, slice);
162 new_irq_info = sn_irq_info;
167 * PROM does not support SAL_INTR_REDIRECT, or it failed.
168 * Revert to old method.
170 new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC);
171 if (new_irq_info == NULL)
174 memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info));
176 /* Free the old PROM new_irq_info structure */
177 sn_intr_free(local_nasid, local_widget, new_irq_info);
178 unregister_intr_pda(new_irq_info);
180 /* allocate a new PROM new_irq_info struct */
181 status = sn_intr_alloc(local_nasid, local_widget,
182 new_irq_info, vector,
185 /* SAL call failed */
191 register_intr_pda(new_irq_info);
192 spin_lock(&sn_irq_info_lock);
193 list_replace_rcu(&sn_irq_info->list, &new_irq_info->list);
194 spin_unlock(&sn_irq_info_lock);
195 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
199 /* Update kernels new_irq_info with new target info */
200 cpuid = nasid_slice_to_cpuid(new_irq_info->irq_nasid,
201 new_irq_info->irq_slice);
202 new_irq_info->irq_cpuid = cpuid;
204 pci_provider = sn_pci_provider[new_irq_info->irq_bridge_type];
207 * If this represents a line interrupt, target it. If it's
208 * an msi (irq_int_bit < 0), it's already targeted.
210 if (new_irq_info->irq_int_bit >= 0 &&
211 pci_provider && pci_provider->target_interrupt)
212 (pci_provider->target_interrupt)(new_irq_info);
215 cpuphys = cpu_physical_id(cpuid);
216 set_irq_affinity_info((vector & 0xff), cpuphys, 0);
222 static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
224 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
228 nasid = cpuid_to_nasid(first_cpu(mask));
229 slice = cpuid_to_slice(first_cpu(mask));
231 list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
232 sn_irq_lh[irq], list)
233 (void)sn_retarget_vector(sn_irq_info, nasid, slice);
237 sn_mask_irq(unsigned int irq)
242 sn_unmask_irq(unsigned int irq)
246 struct irq_chip irq_type_sn = {
248 .startup = sn_startup_irq,
249 .shutdown = sn_shutdown_irq,
250 .enable = sn_enable_irq,
251 .disable = sn_disable_irq,
255 .unmask = sn_unmask_irq,
256 .set_affinity = sn_set_affinity_irq
259 ia64_vector sn_irq_to_vector(int irq)
261 if (irq >= IA64_NUM_VECTORS)
263 return (ia64_vector)irq;
266 unsigned int sn_local_vector_to_irq(u8 vector)
268 return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector));
271 void sn_irq_init(void)
274 irq_desc_t *base_desc = irq_desc;
276 ia64_first_device_vector = IA64_SN2_FIRST_DEVICE_VECTOR;
277 ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR;
279 for (i = 0; i < NR_IRQS; i++) {
280 if (base_desc[i].chip == &no_irq_type) {
281 base_desc[i].chip = &irq_type_sn;
286 static void register_intr_pda(struct sn_irq_info *sn_irq_info)
288 int irq = sn_irq_info->irq_irq;
289 int cpu = sn_irq_info->irq_cpuid;
291 if (pdacpu(cpu)->sn_last_irq < irq) {
292 pdacpu(cpu)->sn_last_irq = irq;
295 if (pdacpu(cpu)->sn_first_irq == 0 || pdacpu(cpu)->sn_first_irq > irq)
296 pdacpu(cpu)->sn_first_irq = irq;
299 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info)
301 int irq = sn_irq_info->irq_irq;
302 int cpu = sn_irq_info->irq_cpuid;
303 struct sn_irq_info *tmp_irq_info;
307 if (pdacpu(cpu)->sn_last_irq == irq) {
309 for (i = pdacpu(cpu)->sn_last_irq - 1;
310 i && !foundmatch; i--) {
311 list_for_each_entry_rcu(tmp_irq_info,
314 if (tmp_irq_info->irq_cpuid == cpu) {
320 pdacpu(cpu)->sn_last_irq = i;
323 if (pdacpu(cpu)->sn_first_irq == irq) {
325 for (i = pdacpu(cpu)->sn_first_irq + 1;
326 i < NR_IRQS && !foundmatch; i++) {
327 list_for_each_entry_rcu(tmp_irq_info,
330 if (tmp_irq_info->irq_cpuid == cpu) {
336 pdacpu(cpu)->sn_first_irq = ((i == NR_IRQS) ? 0 : i);
341 static void sn_irq_info_free(struct rcu_head *head)
343 struct sn_irq_info *sn_irq_info;
345 sn_irq_info = container_of(head, struct sn_irq_info, rcu);
349 void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
351 nasid_t nasid = sn_irq_info->irq_nasid;
352 int slice = sn_irq_info->irq_slice;
353 int cpu = nasid_slice_to_cpuid(nasid, slice);
358 pci_dev_get(pci_dev);
359 sn_irq_info->irq_cpuid = cpu;
360 sn_irq_info->irq_pciioinfo = SN_PCIDEV_INFO(pci_dev);
362 /* link it into the sn_irq[irq] list */
363 spin_lock(&sn_irq_info_lock);
364 list_add_rcu(&sn_irq_info->list, sn_irq_lh[sn_irq_info->irq_irq]);
365 reserve_irq_vector(sn_irq_info->irq_irq);
366 spin_unlock(&sn_irq_info_lock);
368 register_intr_pda(sn_irq_info);
370 cpuphys = cpu_physical_id(cpu);
371 set_irq_affinity_info(sn_irq_info->irq_irq, cpuphys, 0);
375 void sn_irq_unfixup(struct pci_dev *pci_dev)
377 struct sn_irq_info *sn_irq_info;
379 /* Only cleanup IRQ stuff if this device has a host bus context */
380 if (!SN_PCIDEV_BUSSOFT(pci_dev))
383 sn_irq_info = SN_PCIDEV_INFO(pci_dev)->pdi_sn_irq_info;
386 if (!sn_irq_info->irq_irq) {
391 unregister_intr_pda(sn_irq_info);
392 spin_lock(&sn_irq_info_lock);
393 list_del_rcu(&sn_irq_info->list);
394 spin_unlock(&sn_irq_info_lock);
395 if (list_empty(sn_irq_lh[sn_irq_info->irq_irq]))
396 free_irq_vector(sn_irq_info->irq_irq);
397 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
398 pci_dev_put(pci_dev);
403 sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
405 struct sn_pcibus_provider *pci_provider;
407 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
409 /* Don't force an interrupt if the irq has been disabled */
410 if (!(irq_desc[sn_irq_info->irq_irq].status & IRQ_DISABLED) &&
411 pci_provider && pci_provider->force_interrupt)
412 (*pci_provider->force_interrupt)(sn_irq_info);
415 static void force_interrupt(int irq)
417 struct sn_irq_info *sn_irq_info;
423 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list)
424 sn_call_force_intr_provider(sn_irq_info);
430 * Check for lost interrupts. If the PIC int_status reg. says that
431 * an interrupt has been sent, but not handled, and the interrupt
432 * is not pending in either the cpu irr regs or in the soft irr regs,
433 * and the interrupt is not in service, then the interrupt may have
434 * been lost. Force an interrupt on that pin. It is possible that
435 * the interrupt is in flight, so we may generate a spurious interrupt,
436 * but we should never miss a real lost interrupt.
438 static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
441 struct pcidev_info *pcidev_info;
442 struct pcibus_info *pcibus_info;
445 * Bridge types attached to TIO (anything but PIC) do not need this WAR
446 * since they do not target Shub II interrupt registers. If that
447 * ever changes, this check needs to accomodate.
449 if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC)
452 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
457 (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
459 regval = pcireg_intr_status_get(pcibus_info);
461 if (!ia64_get_irr(irq_to_vector(irq))) {
462 if (!test_bit(irq, pda->sn_in_service_ivecs)) {
464 if (sn_irq_info->irq_int_bit & regval &
465 sn_irq_info->irq_last_intr) {
466 regval &= ~(sn_irq_info->irq_int_bit & regval);
467 sn_call_force_intr_provider(sn_irq_info);
471 sn_irq_info->irq_last_intr = regval;
474 void sn_lb_int_war_check(void)
476 struct sn_irq_info *sn_irq_info;
479 if (!sn_ioif_inited || pda->sn_first_irq == 0)
483 for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) {
484 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) {
485 sn_check_intr(i, sn_irq_info);
491 void __init sn_irq_lh_init(void)
495 sn_irq_lh = kmalloc(sizeof(struct list_head *) * NR_IRQS, GFP_KERNEL);
497 panic("SN PCI INIT: Failed to allocate memory for PCI init\n");
499 for (i = 0; i < NR_IRQS; i++) {
500 sn_irq_lh[i] = kmalloc(sizeof(struct list_head), GFP_KERNEL);
502 panic("SN PCI INIT: Failed IRQ memory allocation\n");
504 INIT_LIST_HEAD(sn_irq_lh[i]);