Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[linux-2.6] / arch / powerpc / platforms / cell / celleb_setup.c
1 /*
2  * Celleb setup code
3  *
4  * (C) Copyright 2006-2007 TOSHIBA CORPORATION
5  *
6  * This code is based on arch/powerpc/platforms/cell/setup.c:
7  *  Copyright (C) 1995  Linus Torvalds
8  *  Adapted from 'alpha' version by Gary Thomas
9  *  Modified by Cort Dougan (cort@cs.nmt.edu)
10  *  Modified by PPC64 Team, IBM Corp
11  *  Modified by Cell Team, IBM Deutschland Entwicklung GmbH
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License as published by
15  * the Free Software Foundation; either version 2 of the License, or
16  * (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License along
24  * with this program; if not, write to the Free Software Foundation, Inc.,
25  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
26  */
27
28 #undef DEBUG
29
30 #include <linux/cpu.h>
31 #include <linux/sched.h>
32 #include <linux/kernel.h>
33 #include <linux/mm.h>
34 #include <linux/stddef.h>
35 #include <linux/unistd.h>
36 #include <linux/reboot.h>
37 #include <linux/init.h>
38 #include <linux/delay.h>
39 #include <linux/irq.h>
40 #include <linux/seq_file.h>
41 #include <linux/root_dev.h>
42 #include <linux/console.h>
43 #include <linux/of_platform.h>
44
45 #include <asm/mmu.h>
46 #include <asm/processor.h>
47 #include <asm/io.h>
48 #include <asm/prom.h>
49 #include <asm/machdep.h>
50 #include <asm/cputable.h>
51 #include <asm/irq.h>
52 #include <asm/time.h>
53 #include <asm/spu_priv1.h>
54 #include <asm/firmware.h>
55 #include <asm/rtas.h>
56 #include <asm/cell-regs.h>
57
58 #include "beat_interrupt.h"
59 #include "beat_wrapper.h"
60 #include "beat.h"
61 #include "celleb_pci.h"
62 #include "interrupt.h"
63 #include "pervasive.h"
64 #include "ras.h"
65
66 static char celleb_machine_type[128] = "Celleb";
67
68 static void celleb_show_cpuinfo(struct seq_file *m)
69 {
70         struct device_node *root;
71         const char *model = "";
72
73         root = of_find_node_by_path("/");
74         if (root)
75                 model = of_get_property(root, "model", NULL);
76         /* using "CHRP" is to trick anaconda into installing FCx into Celleb */
77         seq_printf(m, "machine\t\t: %s %s\n", celleb_machine_type, model);
78         of_node_put(root);
79 }
80
81 static int __init celleb_machine_type_hack(char *ptr)
82 {
83         strncpy(celleb_machine_type, ptr, sizeof(celleb_machine_type));
84         celleb_machine_type[sizeof(celleb_machine_type)-1] = 0;
85         return 0;
86 }
87
88 __setup("celleb_machine_type_hack=", celleb_machine_type_hack);
89
90 static void celleb_progress(char *s, unsigned short hex)
91 {
92         printk("*** %04x : %s\n", hex, s ? s : "");
93 }
94
95 static void __init celleb_setup_arch_common(void)
96 {
97         /* init to some ~sane value until calibrate_delay() runs */
98         loops_per_jiffy = 50000000;
99
100 #ifdef CONFIG_DUMMY_CONSOLE
101         conswitchp = &dummy_con;
102 #endif
103 }
104
105 static struct of_device_id celleb_bus_ids[] __initdata = {
106         { .type = "scc", },
107         { .type = "ioif", },    /* old style */
108         {},
109 };
110
111 static int __init celleb_publish_devices(void)
112 {
113         /* Publish OF platform devices for southbridge IOs */
114         of_platform_bus_probe(NULL, celleb_bus_ids, NULL);
115
116         return 0;
117 }
118 machine_device_initcall(celleb_beat, celleb_publish_devices);
119 machine_device_initcall(celleb_native, celleb_publish_devices);
120
121
122 /*
123  * functions for Celleb-Beat
124  */
125 static void __init celleb_setup_arch_beat(void)
126 {
127 #ifdef CONFIG_SPU_BASE
128         spu_priv1_ops           = &spu_priv1_beat_ops;
129         spu_management_ops      = &spu_management_of_ops;
130 #endif
131
132 #ifdef CONFIG_SMP
133         smp_init_celleb();
134 #endif
135
136         celleb_setup_arch_common();
137 }
138
139 static int __init celleb_probe_beat(void)
140 {
141         unsigned long root = of_get_flat_dt_root();
142
143         if (!of_flat_dt_is_compatible(root, "Beat"))
144                 return 0;
145
146         powerpc_firmware_features |= FW_FEATURE_CELLEB_ALWAYS
147                 | FW_FEATURE_BEAT | FW_FEATURE_LPAR;
148         hpte_init_beat_v3();
149
150         return 1;
151 }
152
153
154 /*
155  * functions for Celleb-native
156  */
157 static void __init celleb_init_IRQ_native(void)
158 {
159         iic_init_IRQ();
160         spider_init_IRQ();
161 }
162
163 static void __init celleb_setup_arch_native(void)
164 {
165 #ifdef CONFIG_SPU_BASE
166         spu_priv1_ops           = &spu_priv1_mmio_ops;
167         spu_management_ops      = &spu_management_of_ops;
168 #endif
169
170         cbe_regs_init();
171
172 #ifdef CONFIG_CBE_RAS
173         cbe_ras_init();
174 #endif
175
176 #ifdef CONFIG_SMP
177         smp_init_cell();
178 #endif
179
180         cbe_pervasive_init();
181
182         /* XXX: nvram initialization should be added */
183
184         celleb_setup_arch_common();
185 }
186
187 static int __init celleb_probe_native(void)
188 {
189         unsigned long root = of_get_flat_dt_root();
190
191         if (of_flat_dt_is_compatible(root, "Beat") ||
192             !of_flat_dt_is_compatible(root, "TOSHIBA,Celleb"))
193                 return 0;
194
195         powerpc_firmware_features |= FW_FEATURE_CELLEB_ALWAYS;
196         hpte_init_native();
197
198         return 1;
199 }
200
201
202 /*
203  * machine definitions
204  */
205 define_machine(celleb_beat) {
206         .name                   = "Cell Reference Set (Beat)",
207         .probe                  = celleb_probe_beat,
208         .setup_arch             = celleb_setup_arch_beat,
209         .show_cpuinfo           = celleb_show_cpuinfo,
210         .restart                = beat_restart,
211         .power_off              = beat_power_off,
212         .halt                   = beat_halt,
213         .get_rtc_time           = beat_get_rtc_time,
214         .set_rtc_time           = beat_set_rtc_time,
215         .calibrate_decr         = generic_calibrate_decr,
216         .progress               = celleb_progress,
217         .power_save             = beat_power_save,
218         .nvram_size             = beat_nvram_get_size,
219         .nvram_read             = beat_nvram_read,
220         .nvram_write            = beat_nvram_write,
221         .set_dabr               = beat_set_xdabr,
222         .init_IRQ               = beatic_init_IRQ,
223         .get_irq                = beatic_get_irq,
224         .pci_probe_mode         = celleb_pci_probe_mode,
225         .pci_setup_phb          = celleb_setup_phb,
226 #ifdef CONFIG_KEXEC
227         .kexec_cpu_down         = beat_kexec_cpu_down,
228 #endif
229 };
230
231 define_machine(celleb_native) {
232         .name                   = "Cell Reference Set (native)",
233         .probe                  = celleb_probe_native,
234         .setup_arch             = celleb_setup_arch_native,
235         .show_cpuinfo           = celleb_show_cpuinfo,
236         .restart                = rtas_restart,
237         .power_off              = rtas_power_off,
238         .halt                   = rtas_halt,
239         .get_boot_time          = rtas_get_boot_time,
240         .get_rtc_time           = rtas_get_rtc_time,
241         .set_rtc_time           = rtas_set_rtc_time,
242         .calibrate_decr         = generic_calibrate_decr,
243         .progress               = celleb_progress,
244         .pci_probe_mode         = celleb_pci_probe_mode,
245         .pci_setup_phb          = celleb_setup_phb,
246         .init_IRQ               = celleb_init_IRQ_native,
247 };