1 /* $Id: nj_s.c,v 2.13.2.4 2004/01/16 01:53:48 keil Exp $
3 * This software may be used and distributed according to the terms
4 * of the GNU General Public License, incorporated herein by reference.
8 #include <linux/init.h>
12 #include <linux/pci.h>
13 #include <linux/interrupt.h>
14 #include <linux/ppp_defs.h>
17 static const char *NETjet_S_revision = "$Revision: 2.13.2.4 $";
19 static u_char dummyrr(struct IsdnCardState *cs, int chan, u_char off)
24 static void dummywr(struct IsdnCardState *cs, int chan, u_char off, u_char value)
29 netjet_s_interrupt(int intno, void *dev_id)
31 struct IsdnCardState *cs = dev_id;
32 u_char val, s1val, s0val;
35 spin_lock_irqsave(&cs->lock, flags);
36 s1val = bytein(cs->hw.njet.base + NETJET_IRQSTAT1);
37 if (!(s1val & NETJET_ISACIRQ)) {
38 val = NETjet_ReadIC(cs, ISAC_ISTA);
39 if (cs->debug & L1_DEB_ISAC)
40 debugl1(cs, "tiger: i1 %x %x", s1val, val);
42 isac_interrupt(cs, val);
43 NETjet_WriteIC(cs, ISAC_MASK, 0xFF);
44 NETjet_WriteIC(cs, ISAC_MASK, 0x0);
50 * read/write stat0 is better, because lower IRQ rate
51 * Note the IRQ is on for 125 us if a condition match
52 * thats long on modern CPU and so the IRQ is reentered
55 s0val = bytein(cs->hw.njet.base + NETJET_IRQSTAT0);
56 if ((s0val | s1val)==0) { // shared IRQ
57 spin_unlock_irqrestore(&cs->lock, flags);
61 byteout(cs->hw.njet.base + NETJET_IRQSTAT0, s0val);
62 /* start new code 13/07/00 GE */
63 /* set bits in sval to indicate which page is free */
64 if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
65 inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
66 /* the 2nd write page is free */
68 else /* the 1st write page is free */
70 if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
71 inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
72 /* the 2nd read page is free */
74 else /* the 1st read page is free */
76 if (s0val != cs->hw.njet.last_is0) /* we have a DMA interrupt */
78 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
79 printk(KERN_WARNING "nj LOCK_ATOMIC s0val %x->%x\n",
80 cs->hw.njet.last_is0, s0val);
81 spin_unlock_irqrestore(&cs->lock, flags);
84 cs->hw.njet.irqstat0 = s0val;
85 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
86 (cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
87 /* we have a read dma int */
89 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
90 (cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
91 /* we have a write dma int */
93 /* end new code 13/07/00 GE */
94 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
96 spin_unlock_irqrestore(&cs->lock, flags);
101 reset_netjet_s(struct IsdnCardState *cs)
103 cs->hw.njet.ctrl_reg = 0xff; /* Reset On */
104 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
106 /* now edge triggered for TJ320 GE 13/07/00 */
107 /* see comment in IRQ function */
108 if (cs->subtyp) /* TJ320 */
109 cs->hw.njet.ctrl_reg = 0x40; /* Reset Off and status read clear */
111 cs->hw.njet.ctrl_reg = 0x00; /* Reset Off and status read clear */
112 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
114 cs->hw.njet.auxd = 0;
115 cs->hw.njet.dmactrl = 0;
116 byteout(cs->hw.njet.base + NETJET_AUXCTRL, ~NETJET_ISACIRQ);
117 byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);
118 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
122 NETjet_S_card_msg(struct IsdnCardState *cs, int mt, void *arg)
128 spin_lock_irqsave(&cs->lock, flags);
130 spin_unlock_irqrestore(&cs->lock, flags);
133 release_io_netjet(cs);
138 spin_lock_irqsave(&cs->lock, flags);
139 clear_pending_isac_ints(cs);
141 /* Reenable all IRQ */
142 cs->writeisac(cs, ISAC_MASK, 0);
143 spin_unlock_irqrestore(&cs->lock, flags);
151 static int __devinit njs_pci_probe(struct pci_dev *dev_netjet,
152 struct IsdnCardState *cs)
156 if (pci_enable_device(dev_netjet))
158 pci_set_master(dev_netjet);
159 cs->irq = dev_netjet->irq;
161 printk(KERN_WARNING "NETjet-S: No IRQ for PCI card found\n");
164 cs->hw.njet.base = pci_resource_start(dev_netjet, 0);
165 if (!cs->hw.njet.base) {
166 printk(KERN_WARNING "NETjet-S: No IO-Adr for PCI card found\n");
169 /* the TJ300 and TJ320 must be detected, the IRQ handling is different
170 * unfortunatly the chips use the same device ID, but the TJ320 has
171 * the bit20 in status PCI cfg register set
173 pci_read_config_dword(dev_netjet, 0x04, &cfg);
174 if (cfg & 0x00100000)
175 cs->subtyp = 1; /* TJ320 */
177 cs->subtyp = 0; /* TJ300 */
178 /* 2001/10/04 Christoph Ersfeld, Formula-n Europe AG www.formula-n.com */
179 if ((dev_netjet->subsystem_vendor == 0x55) &&
180 (dev_netjet->subsystem_device == 0x02)) {
181 printk(KERN_WARNING "Netjet: You tried to load this driver with an incompatible TigerJet-card\n");
182 printk(KERN_WARNING "Use type=41 for Formula-n enter:now ISDN PCI and compatible\n");
190 static int __devinit njs_cs_init(struct IsdnCard *card,
191 struct IsdnCardState *cs)
194 cs->hw.njet.auxa = cs->hw.njet.base + NETJET_AUXDATA;
195 cs->hw.njet.isac = cs->hw.njet.base | NETJET_ISAC_OFF;
197 cs->hw.njet.ctrl_reg = 0xff; /* Reset On */
198 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
201 cs->hw.njet.ctrl_reg = 0x00; /* Reset Off and status read clear */
202 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
205 cs->hw.njet.auxd = 0xC0;
206 cs->hw.njet.dmactrl = 0;
208 byteout(cs->hw.njet.base + NETJET_AUXCTRL, ~NETJET_ISACIRQ);
209 byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);
210 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
212 switch ( ( ( NETjet_ReadIC( cs, ISAC_RBCH ) >> 5 ) & 3 ) )
215 return 1; /* end loop */
218 printk( KERN_WARNING "NETjet-S: NETspider-U PCI card found\n" );
219 return -1; /* continue looping */
222 printk( KERN_WARNING "NETjet-S: No PCI card found\n" );
223 return 0; /* end loop & function */
225 return 1; /* end loop */
228 static int __devinit njs_cs_init_rest(struct IsdnCard *card,
229 struct IsdnCardState *cs)
231 const int bytecnt = 256;
234 "NETjet-S: %s card configured at %#lx IRQ %d\n",
235 cs->subtyp ? "TJ320" : "TJ300", cs->hw.njet.base, cs->irq);
236 if (!request_region(cs->hw.njet.base, bytecnt, "netjet-s isdn")) {
238 "HiSax: NETjet-S config port %#lx-%#lx already in use\n",
240 cs->hw.njet.base + bytecnt);
243 cs->readisac = &NETjet_ReadIC;
244 cs->writeisac = &NETjet_WriteIC;
245 cs->readisacfifo = &NETjet_ReadICfifo;
246 cs->writeisacfifo = &NETjet_WriteICfifo;
247 cs->BC_Read_Reg = &dummyrr;
248 cs->BC_Write_Reg = &dummywr;
249 cs->BC_Send_Data = &netjet_fill_dma;
251 cs->cardmsg = &NETjet_S_card_msg;
252 cs->irq_func = &netjet_s_interrupt;
253 cs->irq_flags |= IRQF_SHARED;
254 ISACVersion(cs, "NETjet-S:");
259 static struct pci_dev *dev_netjet __devinitdata = NULL;
262 setup_netjet_s(struct IsdnCard *card)
265 struct IsdnCardState *cs = card->cs;
269 #error "not running on big endian machines now"
271 strcpy(tmp, NETjet_S_revision);
272 printk(KERN_INFO "HiSax: Traverse Tech. NETjet-S driver Rev. %s\n", HiSax_getrev(tmp));
273 if (cs->typ != ISDN_CTYPE_NETJET_S)
275 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
279 if ((dev_netjet = pci_find_device(PCI_VENDOR_ID_TIGERJET,
280 PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) {
281 ret = njs_pci_probe(dev_netjet, cs);
285 printk(KERN_WARNING "NETjet-S: No PCI card found\n");
289 ret = njs_cs_init(card, cs);
294 /* otherwise, ret < 0, continue looping */
297 return njs_cs_init_rest(card, cs);