Merge branch 'powerpc-next' of master.kernel.org:/pub/scm/linux/kernel/git/galak...
[linux-2.6] / drivers / i2c / busses / i2c-davinci.c
1 /*
2  * TI DAVINCI I2C adapter driver.
3  *
4  * Copyright (C) 2006 Texas Instruments.
5  * Copyright (C) 2007 MontaVista Software Inc.
6  *
7  * Updated by Vinod & Sudhakar Feb 2005
8  *
9  * ----------------------------------------------------------------------------
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or
14  * (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24  * ----------------------------------------------------------------------------
25  *
26  */
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/delay.h>
30 #include <linux/i2c.h>
31 #include <linux/clk.h>
32 #include <linux/errno.h>
33 #include <linux/sched.h>
34 #include <linux/err.h>
35 #include <linux/interrupt.h>
36 #include <linux/platform_device.h>
37 #include <linux/io.h>
38
39 #include <asm/hardware.h>
40 #include <asm/mach-types.h>
41
42 #include <asm/arch/i2c.h>
43
44 /* ----- global defines ----------------------------------------------- */
45
46 #define DAVINCI_I2C_TIMEOUT     (1*HZ)
47 #define I2C_DAVINCI_INTR_ALL    (DAVINCI_I2C_IMR_AAS | \
48                                  DAVINCI_I2C_IMR_SCD | \
49                                  DAVINCI_I2C_IMR_ARDY | \
50                                  DAVINCI_I2C_IMR_NACK | \
51                                  DAVINCI_I2C_IMR_AL)
52
53 #define DAVINCI_I2C_OAR_REG     0x00
54 #define DAVINCI_I2C_IMR_REG     0x04
55 #define DAVINCI_I2C_STR_REG     0x08
56 #define DAVINCI_I2C_CLKL_REG    0x0c
57 #define DAVINCI_I2C_CLKH_REG    0x10
58 #define DAVINCI_I2C_CNT_REG     0x14
59 #define DAVINCI_I2C_DRR_REG     0x18
60 #define DAVINCI_I2C_SAR_REG     0x1c
61 #define DAVINCI_I2C_DXR_REG     0x20
62 #define DAVINCI_I2C_MDR_REG     0x24
63 #define DAVINCI_I2C_IVR_REG     0x28
64 #define DAVINCI_I2C_EMDR_REG    0x2c
65 #define DAVINCI_I2C_PSC_REG     0x30
66
67 #define DAVINCI_I2C_IVR_AAS     0x07
68 #define DAVINCI_I2C_IVR_SCD     0x06
69 #define DAVINCI_I2C_IVR_XRDY    0x05
70 #define DAVINCI_I2C_IVR_RDR     0x04
71 #define DAVINCI_I2C_IVR_ARDY    0x03
72 #define DAVINCI_I2C_IVR_NACK    0x02
73 #define DAVINCI_I2C_IVR_AL      0x01
74
75 #define DAVINCI_I2C_STR_BB      (1 << 12)
76 #define DAVINCI_I2C_STR_RSFULL  (1 << 11)
77 #define DAVINCI_I2C_STR_SCD     (1 << 5)
78 #define DAVINCI_I2C_STR_ARDY    (1 << 2)
79 #define DAVINCI_I2C_STR_NACK    (1 << 1)
80 #define DAVINCI_I2C_STR_AL      (1 << 0)
81
82 #define DAVINCI_I2C_MDR_NACK    (1 << 15)
83 #define DAVINCI_I2C_MDR_STT     (1 << 13)
84 #define DAVINCI_I2C_MDR_STP     (1 << 11)
85 #define DAVINCI_I2C_MDR_MST     (1 << 10)
86 #define DAVINCI_I2C_MDR_TRX     (1 << 9)
87 #define DAVINCI_I2C_MDR_XA      (1 << 8)
88 #define DAVINCI_I2C_MDR_IRS     (1 << 5)
89
90 #define DAVINCI_I2C_IMR_AAS     (1 << 6)
91 #define DAVINCI_I2C_IMR_SCD     (1 << 5)
92 #define DAVINCI_I2C_IMR_XRDY    (1 << 4)
93 #define DAVINCI_I2C_IMR_RRDY    (1 << 3)
94 #define DAVINCI_I2C_IMR_ARDY    (1 << 2)
95 #define DAVINCI_I2C_IMR_NACK    (1 << 1)
96 #define DAVINCI_I2C_IMR_AL      (1 << 0)
97
98 #define MOD_REG_BIT(val, mask, set) do { \
99         if (set) { \
100                 val |= mask; \
101         } else { \
102                 val &= ~mask; \
103         } \
104 } while (0)
105
106 struct davinci_i2c_dev {
107         struct device           *dev;
108         void __iomem            *base;
109         struct completion       cmd_complete;
110         struct clk              *clk;
111         int                     cmd_err;
112         u8                      *buf;
113         size_t                  buf_len;
114         int                     irq;
115         struct i2c_adapter      adapter;
116 };
117
118 /* default platform data to use if not supplied in the platform_device */
119 static struct davinci_i2c_platform_data davinci_i2c_platform_data_default = {
120         .bus_freq       = 100,
121         .bus_delay      = 0,
122 };
123
124 static inline void davinci_i2c_write_reg(struct davinci_i2c_dev *i2c_dev,
125                                          int reg, u16 val)
126 {
127         __raw_writew(val, i2c_dev->base + reg);
128 }
129
130 static inline u16 davinci_i2c_read_reg(struct davinci_i2c_dev *i2c_dev, int reg)
131 {
132         return __raw_readw(i2c_dev->base + reg);
133 }
134
135 /*
136  * This functions configures I2C and brings I2C out of reset.
137  * This function is called during I2C init function. This function
138  * also gets called if I2C encounters any errors.
139  */
140 static int i2c_davinci_init(struct davinci_i2c_dev *dev)
141 {
142         struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
143         u16 psc;
144         u32 clk;
145         u32 clkh;
146         u32 clkl;
147         u32 input_clock = clk_get_rate(dev->clk);
148         u16 w;
149
150         if (!pdata)
151                 pdata = &davinci_i2c_platform_data_default;
152
153         /* put I2C into reset */
154         w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
155         MOD_REG_BIT(w, DAVINCI_I2C_MDR_IRS, 0);
156         davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
157
158         /* NOTE: I2C Clock divider programming info
159          * As per I2C specs the following formulas provide prescaler
160          * and low/high divider values
161          * input clk --> PSC Div -----------> ICCL/H Div --> output clock
162          *                       module clk
163          *
164          * output clk = module clk / (PSC + 1) [ (ICCL + d) + (ICCH + d) ]
165          *
166          * Thus,
167          * (ICCL + ICCH) = clk = (input clk / ((psc +1) * output clk)) - 2d;
168          *
169          * where if PSC == 0, d = 7,
170          *       if PSC == 1, d = 6
171          *       if PSC > 1 , d = 5
172          */
173
174         psc = 26; /* To get 1MHz clock */
175
176         clk = ((input_clock / (psc + 1)) / (pdata->bus_freq * 1000)) - 10;
177         clkh = (50 * clk) / 100;
178         clkl = clk - clkh;
179
180         davinci_i2c_write_reg(dev, DAVINCI_I2C_PSC_REG, psc);
181         davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKH_REG, clkh);
182         davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKL_REG, clkl);
183
184         dev_dbg(dev->dev, "CLK  = %d\n", clk);
185         dev_dbg(dev->dev, "PSC  = %d\n",
186                 davinci_i2c_read_reg(dev, DAVINCI_I2C_PSC_REG));
187         dev_dbg(dev->dev, "CLKL = %d\n",
188                 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKL_REG));
189         dev_dbg(dev->dev, "CLKH = %d\n",
190                 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKH_REG));
191
192         /* Take the I2C module out of reset: */
193         w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
194         MOD_REG_BIT(w, DAVINCI_I2C_MDR_IRS, 1);
195         davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
196
197         /* Enable interrupts */
198         davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, I2C_DAVINCI_INTR_ALL);
199
200         return 0;
201 }
202
203 /*
204  * Waiting for bus not busy
205  */
206 static int i2c_davinci_wait_bus_not_busy(struct davinci_i2c_dev *dev,
207                                          char allow_sleep)
208 {
209         unsigned long timeout;
210
211         timeout = jiffies + DAVINCI_I2C_TIMEOUT;
212         while (davinci_i2c_read_reg(dev, DAVINCI_I2C_STR_REG)
213                & DAVINCI_I2C_STR_BB) {
214                 if (time_after(jiffies, timeout)) {
215                         dev_warn(dev->dev,
216                                  "timeout waiting for bus ready\n");
217                         return -ETIMEDOUT;
218                 }
219                 if (allow_sleep)
220                         schedule_timeout(1);
221         }
222
223         return 0;
224 }
225
226 /*
227  * Low level master read/write transaction. This function is called
228  * from i2c_davinci_xfer.
229  */
230 static int
231 i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
232 {
233         struct davinci_i2c_dev *dev = i2c_get_adapdata(adap);
234         struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
235         u32 flag;
236         u32 stat;
237         u16 w;
238         int r;
239
240         if (msg->len == 0)
241                 return -EINVAL;
242
243         if (!pdata)
244                 pdata = &davinci_i2c_platform_data_default;
245         /* Introduce a delay, required for some boards (e.g Davinci EVM) */
246         if (pdata->bus_delay)
247                 udelay(pdata->bus_delay);
248
249         /* set the slave address */
250         davinci_i2c_write_reg(dev, DAVINCI_I2C_SAR_REG, msg->addr);
251
252         dev->buf = msg->buf;
253         dev->buf_len = msg->len;
254
255         davinci_i2c_write_reg(dev, DAVINCI_I2C_CNT_REG, dev->buf_len);
256
257         init_completion(&dev->cmd_complete);
258         dev->cmd_err = 0;
259
260         /* Clear any pending interrupts by reading the IVR */
261         stat = davinci_i2c_read_reg(dev, DAVINCI_I2C_IVR_REG);
262
263         /* Take I2C out of reset, configure it as master and set the
264          * start bit */
265         flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST | DAVINCI_I2C_MDR_STT;
266
267         /* if the slave address is ten bit address, enable XA bit */
268         if (msg->flags & I2C_M_TEN)
269                 flag |= DAVINCI_I2C_MDR_XA;
270         if (!(msg->flags & I2C_M_RD))
271                 flag |= DAVINCI_I2C_MDR_TRX;
272         if (stop)
273                 flag |= DAVINCI_I2C_MDR_STP;
274
275         /* Enable receive or transmit interrupts */
276         w = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG);
277         if (msg->flags & I2C_M_RD)
278                 MOD_REG_BIT(w, DAVINCI_I2C_IMR_RRDY, 1);
279         else
280                 MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 1);
281         davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, w);
282
283         /* write the data into mode register */
284         davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
285
286         r = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
287                                                       DAVINCI_I2C_TIMEOUT);
288         dev->buf_len = 0;
289         if (r < 0)
290                 return r;
291
292         if (r == 0) {
293                 dev_err(dev->dev, "controller timed out\n");
294                 i2c_davinci_init(dev);
295                 return -ETIMEDOUT;
296         }
297
298         /* no error */
299         if (likely(!dev->cmd_err))
300                 return msg->len;
301
302         /* We have an error */
303         if (dev->cmd_err & DAVINCI_I2C_STR_AL) {
304                 i2c_davinci_init(dev);
305                 return -EIO;
306         }
307
308         if (dev->cmd_err & DAVINCI_I2C_STR_NACK) {
309                 if (msg->flags & I2C_M_IGNORE_NAK)
310                         return msg->len;
311                 if (stop) {
312                         w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
313                         MOD_REG_BIT(w, DAVINCI_I2C_MDR_STP, 1);
314                         davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
315                 }
316                 return -EREMOTEIO;
317         }
318         return -EIO;
319 }
320
321 /*
322  * Prepare controller for a transaction and call i2c_davinci_xfer_msg
323  */
324 static int
325 i2c_davinci_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
326 {
327         struct davinci_i2c_dev *dev = i2c_get_adapdata(adap);
328         int i;
329         int ret;
330
331         dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num);
332
333         ret = i2c_davinci_wait_bus_not_busy(dev, 1);
334         if (ret < 0) {
335                 dev_warn(dev->dev, "timeout waiting for bus ready\n");
336                 return ret;
337         }
338
339         for (i = 0; i < num; i++) {
340                 ret = i2c_davinci_xfer_msg(adap, &msgs[i], (i == (num - 1)));
341                 if (ret < 0)
342                         return ret;
343         }
344
345         dev_dbg(dev->dev, "%s:%d ret: %d\n", __func__, __LINE__, ret);
346
347         return num;
348 }
349
350 static u32 i2c_davinci_func(struct i2c_adapter *adap)
351 {
352         return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
353 }
354
355 /*
356  * Interrupt service routine. This gets called whenever an I2C interrupt
357  * occurs.
358  */
359 static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
360 {
361         struct davinci_i2c_dev *dev = dev_id;
362         u32 stat;
363         int count = 0;
364         u16 w;
365
366         while ((stat = davinci_i2c_read_reg(dev, DAVINCI_I2C_IVR_REG))) {
367                 dev_dbg(dev->dev, "%s: stat=0x%x\n", __func__, stat);
368                 if (count++ == 100) {
369                         dev_warn(dev->dev, "Too much work in one IRQ\n");
370                         break;
371                 }
372
373                 switch (stat) {
374                 case DAVINCI_I2C_IVR_AL:
375                         dev->cmd_err |= DAVINCI_I2C_STR_AL;
376                         complete(&dev->cmd_complete);
377                         break;
378
379                 case DAVINCI_I2C_IVR_NACK:
380                         dev->cmd_err |= DAVINCI_I2C_STR_NACK;
381                         complete(&dev->cmd_complete);
382                         break;
383
384                 case DAVINCI_I2C_IVR_ARDY:
385                         davinci_i2c_write_reg(dev,
386                                 DAVINCI_I2C_STR_REG, DAVINCI_I2C_STR_ARDY);
387                         complete(&dev->cmd_complete);
388                         break;
389
390                 case DAVINCI_I2C_IVR_RDR:
391                         if (dev->buf_len) {
392                                 *dev->buf++ =
393                                     davinci_i2c_read_reg(dev,
394                                                          DAVINCI_I2C_DRR_REG);
395                                 dev->buf_len--;
396                                 if (dev->buf_len)
397                                         continue;
398
399                                 davinci_i2c_write_reg(dev,
400                                         DAVINCI_I2C_STR_REG,
401                                         DAVINCI_I2C_IMR_RRDY);
402                         } else
403                                 dev_err(dev->dev, "RDR IRQ while no "
404                                         "data requested\n");
405                         break;
406
407                 case DAVINCI_I2C_IVR_XRDY:
408                         if (dev->buf_len) {
409                                 davinci_i2c_write_reg(dev, DAVINCI_I2C_DXR_REG,
410                                                       *dev->buf++);
411                                 dev->buf_len--;
412                                 if (dev->buf_len)
413                                         continue;
414
415                                 w = davinci_i2c_read_reg(dev,
416                                                          DAVINCI_I2C_IMR_REG);
417                                 MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 0);
418                                 davinci_i2c_write_reg(dev,
419                                                       DAVINCI_I2C_IMR_REG,
420                                                       w);
421                         } else
422                                 dev_err(dev->dev, "TDR IRQ while no data to "
423                                         "send\n");
424                         break;
425
426                 case DAVINCI_I2C_IVR_SCD:
427                         davinci_i2c_write_reg(dev,
428                                 DAVINCI_I2C_STR_REG, DAVINCI_I2C_STR_SCD);
429                         complete(&dev->cmd_complete);
430                         break;
431
432                 case DAVINCI_I2C_IVR_AAS:
433                         dev_warn(dev->dev, "Address as slave interrupt\n");
434                 }/* switch */
435         }/* while */
436
437         return count ? IRQ_HANDLED : IRQ_NONE;
438 }
439
440 static struct i2c_algorithm i2c_davinci_algo = {
441         .master_xfer    = i2c_davinci_xfer,
442         .functionality  = i2c_davinci_func,
443 };
444
445 static int davinci_i2c_probe(struct platform_device *pdev)
446 {
447         struct davinci_i2c_dev *dev;
448         struct i2c_adapter *adap;
449         struct resource *mem, *irq, *ioarea;
450         int r;
451
452         /* NOTE: driver uses the static register mapping */
453         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
454         if (!mem) {
455                 dev_err(&pdev->dev, "no mem resource?\n");
456                 return -ENODEV;
457         }
458
459         irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
460         if (!irq) {
461                 dev_err(&pdev->dev, "no irq resource?\n");
462                 return -ENODEV;
463         }
464
465         ioarea = request_mem_region(mem->start, (mem->end - mem->start) + 1,
466                                     pdev->name);
467         if (!ioarea) {
468                 dev_err(&pdev->dev, "I2C region already claimed\n");
469                 return -EBUSY;
470         }
471
472         dev = kzalloc(sizeof(struct davinci_i2c_dev), GFP_KERNEL);
473         if (!dev) {
474                 r = -ENOMEM;
475                 goto err_release_region;
476         }
477
478         dev->dev = get_device(&pdev->dev);
479         dev->irq = irq->start;
480         platform_set_drvdata(pdev, dev);
481
482         dev->clk = clk_get(&pdev->dev, "I2CCLK");
483         if (IS_ERR(dev->clk)) {
484                 r = -ENODEV;
485                 goto err_free_mem;
486         }
487         clk_enable(dev->clk);
488
489         dev->base = (void __iomem *)IO_ADDRESS(mem->start);
490         i2c_davinci_init(dev);
491
492         r = request_irq(dev->irq, i2c_davinci_isr, 0, pdev->name, dev);
493         if (r) {
494                 dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq);
495                 goto err_unuse_clocks;
496         }
497
498         adap = &dev->adapter;
499         i2c_set_adapdata(adap, dev);
500         adap->owner = THIS_MODULE;
501         adap->class = I2C_CLASS_HWMON;
502         strlcpy(adap->name, "DaVinci I2C adapter", sizeof(adap->name));
503         adap->algo = &i2c_davinci_algo;
504         adap->dev.parent = &pdev->dev;
505
506         /* FIXME */
507         adap->timeout = 1;
508
509         adap->nr = pdev->id;
510         r = i2c_add_numbered_adapter(adap);
511         if (r) {
512                 dev_err(&pdev->dev, "failure adding adapter\n");
513                 goto err_free_irq;
514         }
515
516         return 0;
517
518 err_free_irq:
519         free_irq(dev->irq, dev);
520 err_unuse_clocks:
521         clk_disable(dev->clk);
522         clk_put(dev->clk);
523         dev->clk = NULL;
524 err_free_mem:
525         platform_set_drvdata(pdev, NULL);
526         put_device(&pdev->dev);
527         kfree(dev);
528 err_release_region:
529         release_mem_region(mem->start, (mem->end - mem->start) + 1);
530
531         return r;
532 }
533
534 static int davinci_i2c_remove(struct platform_device *pdev)
535 {
536         struct davinci_i2c_dev *dev = platform_get_drvdata(pdev);
537         struct resource *mem;
538
539         platform_set_drvdata(pdev, NULL);
540         i2c_del_adapter(&dev->adapter);
541         put_device(&pdev->dev);
542
543         clk_disable(dev->clk);
544         clk_put(dev->clk);
545         dev->clk = NULL;
546
547         davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, 0);
548         free_irq(IRQ_I2C, dev);
549         kfree(dev);
550
551         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
552         release_mem_region(mem->start, (mem->end - mem->start) + 1);
553         return 0;
554 }
555
556 /* work with hotplug and coldplug */
557 MODULE_ALIAS("platform:i2c_davinci");
558
559 static struct platform_driver davinci_i2c_driver = {
560         .probe          = davinci_i2c_probe,
561         .remove         = davinci_i2c_remove,
562         .driver         = {
563                 .name   = "i2c_davinci",
564                 .owner  = THIS_MODULE,
565         },
566 };
567
568 /* I2C may be needed to bring up other drivers */
569 static int __init davinci_i2c_init_driver(void)
570 {
571         return platform_driver_register(&davinci_i2c_driver);
572 }
573 subsys_initcall(davinci_i2c_init_driver);
574
575 static void __exit davinci_i2c_exit_driver(void)
576 {
577         platform_driver_unregister(&davinci_i2c_driver);
578 }
579 module_exit(davinci_i2c_exit_driver);
580
581 MODULE_AUTHOR("Texas Instruments India");
582 MODULE_DESCRIPTION("TI DaVinci I2C bus adapter");
583 MODULE_LICENSE("GPL");