3 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
5 * Copyright (C) 2005-2007 Freescale Semiconductor, Inc.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
15 #include <linux/types.h>
16 #include <linux/dmaengine.h>
18 /* IPU DMA Controller channel definitions. */
20 IDMAC_IC_0 = 0, /* IC (encoding task) to memory */
21 IDMAC_IC_1 = 1, /* IC (viewfinder task) to memory */
29 IDMAC_IC_7 = 7, /* IC (sensor data) to memory */
36 IDMAC_SDC_0 = 14, /* Background synchronous display data */
37 IDMAC_SDC_1 = 15, /* Foreground data (overlay) */
56 /* Order significant! */
57 enum ipu_channel_status {
59 IPU_CHANNEL_INITIALIZED,
64 #define IPU_CHANNELS_NUM 32
84 IPU_PIX_FMT_GENERIC_32,
92 enum ipu_color_space {
99 * Enumeration of IPU rotation modes
101 enum ipu_rotate_mode {
102 /* Note the enum values correspond to BAM value */
104 IPU_ROTATE_VERT_FLIP = 1,
105 IPU_ROTATE_HORIZ_FLIP = 2,
107 IPU_ROTATE_90_RIGHT = 4,
108 IPU_ROTATE_90_RIGHT_VFLIP = 5,
109 IPU_ROTATE_90_RIGHT_HFLIP = 6,
110 IPU_ROTATE_90_LEFT = 7,
113 struct ipu_platform_data {
114 unsigned int irq_base;
118 * Enumeration of DI ports for ADC.
127 struct idmac_video_param {
128 unsigned short in_width;
129 unsigned short in_height;
130 uint32_t in_pixel_fmt;
131 unsigned short out_width;
132 unsigned short out_height;
133 uint32_t out_pixel_fmt;
134 unsigned short out_stride;
135 bool graphics_combine_en;
136 bool global_alpha_en;
138 enum display_port disp;
139 unsigned short out_left;
140 unsigned short out_top;
144 * Union of initialization parameters for a logical channel. So far only video
145 * parameters are used.
147 union ipu_channel_param {
148 struct idmac_video_param video;
151 struct idmac_tx_desc {
152 struct dma_async_tx_descriptor txd;
153 struct scatterlist *sg; /* scatterlist for this */
154 unsigned int sg_len; /* tx-descriptor. */
155 struct list_head list;
158 struct idmac_channel {
159 struct dma_chan dma_chan;
160 dma_cookie_t completed; /* last completed cookie */
161 union ipu_channel_param params;
162 enum ipu_channel link; /* input channel, linked to the output */
163 enum ipu_channel_status status;
164 void *client; /* Only one client per channel */
165 unsigned int n_tx_desc;
166 struct idmac_tx_desc *desc; /* allocated tx-descriptors */
167 struct scatterlist *sg[2]; /* scatterlist elements in buffer-0 and -1 */
168 struct list_head free_list; /* free tx-descriptors */
169 struct list_head queue; /* queued tx-descriptors */
170 spinlock_t lock; /* protects sg[0,1], queue */
171 struct mutex chan_mutex; /* protects status, cookie, free_list */
174 unsigned int eof_irq;
175 char eof_name[16]; /* EOF IRQ name for request_irq() */
178 #define to_tx_desc(tx) container_of(tx, struct idmac_tx_desc, txd)
179 #define to_idmac_chan(c) container_of(c, struct idmac_channel, dma_chan)