git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/p54/p54pci.c

   1
   2 /*
   3  * Linux device driver for PCI based Prism54
   4  *
   5  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
   6  * Copyright (c) 2008, Christian Lamparter <chunkeey@web.de>
   7  *
   8  * Based on the islsm (softmac prism54) driver, which is:
   9  * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/pci.h>
  18 #include <linux/firmware.h>
  19 #include <linux/etherdevice.h>
  20 #include <linux/delay.h>
  21 #include <linux/completion.h>
  22 #include <net/mac80211.h>
  23
  24 #include "p54.h"
  25 #include "p54pci.h"
  26
  27 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  28 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
  29 MODULE_LICENSE("GPL");
  30 MODULE_ALIAS("prism54pci");
  31 MODULE_FIRMWARE("isl3886pci");
  32
  33 static struct pci_device_id p54p_table[] __devinitdata = {
  34         /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
  35         { PCI_DEVICE(0x1260, 0x3890) },
  36         /* 3COM 3CRWE154G72 Wireless LAN adapter */
  37         { PCI_DEVICE(0x10b7, 0x6001) },
  38         /* Intersil PRISM Indigo Wireless LAN adapter */
  39         { PCI_DEVICE(0x1260, 0x3877) },
  40         /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
  41         { PCI_DEVICE(0x1260, 0x3886) },
  42         { },
  43 };
  44
  45 MODULE_DEVICE_TABLE(pci, p54p_table);
  46
  47 static int p54p_upload_firmware(struct ieee80211_hw *dev)
  48 {
  49         struct p54p_priv *priv = dev->priv;
  50         __le32 reg;
  51         int err;
  52         __le32 *data;
  53         u32 remains, left, device_addr;
  54
  55         P54P_WRITE(int_enable, cpu_to_le32(0));
  56         P54P_READ(int_enable);
  57         udelay(10);
  58
  59         reg = P54P_READ(ctrl_stat);
  60         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  61         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
  62         P54P_WRITE(ctrl_stat, reg);
  63         P54P_READ(ctrl_stat);
  64         udelay(10);
  65
  66         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
  67         P54P_WRITE(ctrl_stat, reg);
  68         wmb();
  69         udelay(10);
  70
  71         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  72         P54P_WRITE(ctrl_stat, reg);
  73         wmb();
  74
  75         /* wait for the firmware to reset properly */
  76         mdelay(10);
  77
  78         err = p54_parse_firmware(dev, priv->firmware);
  79         if (err)
  80                 return err;
  81
  82         data = (__le32 *) priv->firmware->data;
  83         remains = priv->firmware->size;
  84         device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
  85         while (remains) {
  86                 u32 i = 0;
  87                 left = min((u32)0x1000, remains);
  88                 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
  89                 P54P_READ(int_enable);
  90
  91                 device_addr += 0x1000;
  92                 while (i < left) {
  93                         P54P_WRITE(direct_mem_win[i], *data++);
  94                         i += sizeof(u32);
  95                 }
  96
  97                 remains -= left;
  98                 P54P_READ(int_enable);
  99         }
 100
 101         reg = P54P_READ(ctrl_stat);
 102         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
 103         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 104         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
 105         P54P_WRITE(ctrl_stat, reg);
 106         P54P_READ(ctrl_stat);
 107         udelay(10);
 108
 109         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
 110         P54P_WRITE(ctrl_stat, reg);
 111         wmb();
 112         udelay(10);
 113
 114         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 115         P54P_WRITE(ctrl_stat, reg);
 116         wmb();
 117         udelay(10);
 118
 119         /* wait for the firmware to boot properly */
 120         mdelay(100);
 121
 122         return 0;
 123 }
 124
 125 static void p54p_refill_rx_ring(struct ieee80211_hw *dev,
 126         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 127         struct sk_buff **rx_buf)
 128 {
 129         struct p54p_priv *priv = dev->priv;
 130         struct p54p_ring_control *ring_control = priv->ring_control;
 131         u32 limit, idx, i;
 132
 133         idx = le32_to_cpu(ring_control->host_idx[ring_index]);
 134         limit = idx;
 135         limit -= le32_to_cpu(ring_control->device_idx[ring_index]);
 136         limit = ring_limit - limit;
 137
 138         i = idx % ring_limit;
 139         while (limit-- > 1) {
 140                 struct p54p_desc *desc = &ring[i];
 141
 142                 if (!desc->host_addr) {
 143                         struct sk_buff *skb;
 144                         dma_addr_t mapping;
 145                         skb = dev_alloc_skb(priv->common.rx_mtu + 32);
 146                         if (!skb)
 147                                 break;
 148
 149                         mapping = pci_map_single(priv->pdev,
 150                                                  skb_tail_pointer(skb),
 151                                                  priv->common.rx_mtu + 32,
 152                                                  PCI_DMA_FROMDEVICE);
 153                         desc->host_addr = cpu_to_le32(mapping);
 154                         desc->device_addr = 0;  // FIXME: necessary?
 155                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
 156                         desc->flags = 0;
 157                         rx_buf[i] = skb;
 158                 }
 159
 160                 i++;
 161                 idx++;
 162                 i %= ring_limit;
 163         }
 164
 165         wmb();
 166         ring_control->host_idx[ring_index] = cpu_to_le32(idx);
 167 }
 168
 169 static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
 170         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 171         struct sk_buff **rx_buf)
 172 {
 173         struct p54p_priv *priv = dev->priv;
 174         struct p54p_ring_control *ring_control = priv->ring_control;
 175         struct p54p_desc *desc;
 176         u32 idx, i;
 177
 178         i = (*index) % ring_limit;
 179         (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
 180         idx %= ring_limit;
 181         while (i != idx) {
 182                 u16 len;
 183                 struct sk_buff *skb;
 184                 desc = &ring[i];
 185                 len = le16_to_cpu(desc->len);
 186                 skb = rx_buf[i];
 187
 188                 if (!skb) {
 189                         i++;
 190                         i %= ring_limit;
 191                         continue;
 192                 }
 193                 skb_put(skb, len);
 194
 195                 if (p54_rx(dev, skb)) {
 196                         pci_unmap_single(priv->pdev,
 197                                          le32_to_cpu(desc->host_addr),
 198                                          priv->common.rx_mtu + 32,
 199                                          PCI_DMA_FROMDEVICE);
 200                         rx_buf[i] = NULL;
 201                         desc->host_addr = 0;
 202                 } else {
 203                         skb_trim(skb, 0);
 204                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
 205                 }
 206
 207                 i++;
 208                 i %= ring_limit;
 209         }
 210
 211         p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf);
 212 }
 213
 214 /* caller must hold priv->lock */
 215 static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
 216         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 217         void **tx_buf)
 218 {
 219         struct p54p_priv *priv = dev->priv;
 220         struct p54p_ring_control *ring_control = priv->ring_control;
 221         struct p54p_desc *desc;
 222         u32 idx, i;
 223
 224         i = (*index) % ring_limit;
 225         (*index) = idx = le32_to_cpu(ring_control->device_idx[1]);
 226         idx %= ring_limit;
 227
 228         while (i != idx) {
 229                 desc = &ring[i];
 230                 if (tx_buf[i])
 231                         if (FREE_AFTER_TX((struct sk_buff *) tx_buf[i]))
 232                                 p54_free_skb(dev, tx_buf[i]);
 233                 tx_buf[i] = NULL;
 234
 235                 pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 236                                  le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
 237
 238                 desc->host_addr = 0;
 239                 desc->device_addr = 0;
 240                 desc->len = 0;
 241                 desc->flags = 0;
 242
 243                 i++;
 244                 i %= ring_limit;
 245         }
 246 }
 247
 248 static void p54p_rx_tasklet(unsigned long dev_id)
 249 {
 250         struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id;
 251         struct p54p_priv *priv = dev->priv;
 252         struct p54p_ring_control *ring_control = priv->ring_control;
 253
 254         p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt,
 255                 ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt);
 256
 257         p54p_check_rx_ring(dev, &priv->rx_idx_data, 0, ring_control->rx_data,
 258                 ARRAY_SIZE(ring_control->rx_data), priv->rx_buf_data);
 259
 260         wmb();
 261         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 262 }
 263
 264 static irqreturn_t p54p_interrupt(int irq, void *dev_id)
 265 {
 266         struct ieee80211_hw *dev = dev_id;
 267         struct p54p_priv *priv = dev->priv;
 268         struct p54p_ring_control *ring_control = priv->ring_control;
 269         __le32 reg;
 270
 271         spin_lock(&priv->lock);
 272         reg = P54P_READ(int_ident);
 273         if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
 274                 spin_unlock(&priv->lock);
 275                 return IRQ_HANDLED;
 276         }
 277
 278         P54P_WRITE(int_ack, reg);
 279
 280         reg &= P54P_READ(int_enable);
 281
 282         if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) {
 283                 p54p_check_tx_ring(dev, &priv->tx_idx_mgmt,
 284                                    3, ring_control->tx_mgmt,
 285                                    ARRAY_SIZE(ring_control->tx_mgmt),
 286                                    priv->tx_buf_mgmt);
 287
 288                 p54p_check_tx_ring(dev, &priv->tx_idx_data,
 289                                    1, ring_control->tx_data,
 290                                    ARRAY_SIZE(ring_control->tx_data),
 291                                    priv->tx_buf_data);
 292
 293                 tasklet_schedule(&priv->rx_tasklet);
 294
 295         } else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
 296                 complete(&priv->boot_comp);
 297
 298         spin_unlock(&priv->lock);
 299
 300         return reg ? IRQ_HANDLED : IRQ_NONE;
 301 }
 302
 303 static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 304 {
 305         struct p54p_priv *priv = dev->priv;
 306         struct p54p_ring_control *ring_control = priv->ring_control;
 307         unsigned long flags;
 308         struct p54p_desc *desc;
 309         dma_addr_t mapping;
 310         u32 device_idx, idx, i;
 311
 312         spin_lock_irqsave(&priv->lock, flags);
 313
 314         device_idx = le32_to_cpu(ring_control->device_idx[1]);
 315         idx = le32_to_cpu(ring_control->host_idx[1]);
 316         i = idx % ARRAY_SIZE(ring_control->tx_data);
 317
 318         priv->tx_buf_data[i] = skb;
 319         mapping = pci_map_single(priv->pdev, skb->data, skb->len,
 320                                  PCI_DMA_TODEVICE);
 321         desc = &ring_control->tx_data[i];
 322         desc->host_addr = cpu_to_le32(mapping);
 323         desc->device_addr = ((struct p54_hdr *)skb->data)->req_id;
 324         desc->len = cpu_to_le16(skb->len);
 325         desc->flags = 0;
 326
 327         wmb();
 328         ring_control->host_idx[1] = cpu_to_le32(idx + 1);
 329         spin_unlock_irqrestore(&priv->lock, flags);
 330
 331         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 332         P54P_READ(dev_int);
 333 }
 334
 335 static void p54p_stop(struct ieee80211_hw *dev)
 336 {
 337         struct p54p_priv *priv = dev->priv;
 338         struct p54p_ring_control *ring_control = priv->ring_control;
 339         unsigned int i;
 340         struct p54p_desc *desc;
 341
 342         tasklet_kill(&priv->rx_tasklet);
 343
 344         P54P_WRITE(int_enable, cpu_to_le32(0));
 345         P54P_READ(int_enable);
 346         udelay(10);
 347
 348         free_irq(priv->pdev->irq, dev);
 349
 350         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 351
 352         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) {
 353                 desc = &ring_control->rx_data[i];
 354                 if (desc->host_addr)
 355                         pci_unmap_single(priv->pdev,
 356                                          le32_to_cpu(desc->host_addr),
 357                                          priv->common.rx_mtu + 32,
 358                                          PCI_DMA_FROMDEVICE);
 359                 kfree_skb(priv->rx_buf_data[i]);
 360                 priv->rx_buf_data[i] = NULL;
 361         }
 362
 363         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_mgmt); i++) {
 364                 desc = &ring_control->rx_mgmt[i];
 365                 if (desc->host_addr)
 366                         pci_unmap_single(priv->pdev,
 367                                          le32_to_cpu(desc->host_addr),
 368                                          priv->common.rx_mtu + 32,
 369                                          PCI_DMA_FROMDEVICE);
 370                 kfree_skb(priv->rx_buf_mgmt[i]);
 371                 priv->rx_buf_mgmt[i] = NULL;
 372         }
 373
 374         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_data); i++) {
 375                 desc = &ring_control->tx_data[i];
 376                 if (desc->host_addr)
 377                         pci_unmap_single(priv->pdev,
 378                                          le32_to_cpu(desc->host_addr),
 379                                          le16_to_cpu(desc->len),
 380                                          PCI_DMA_TODEVICE);
 381
 382                 p54_free_skb(dev, priv->tx_buf_data[i]);
 383                 priv->tx_buf_data[i] = NULL;
 384         }
 385
 386         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_mgmt); i++) {
 387                 desc = &ring_control->tx_mgmt[i];
 388                 if (desc->host_addr)
 389                         pci_unmap_single(priv->pdev,
 390                                          le32_to_cpu(desc->host_addr),
 391                                          le16_to_cpu(desc->len),
 392                                          PCI_DMA_TODEVICE);
 393
 394                 p54_free_skb(dev, priv->tx_buf_mgmt[i]);
 395                 priv->tx_buf_mgmt[i] = NULL;
 396         }
 397
 398         memset(ring_control, 0, sizeof(*ring_control));
 399 }
 400
 401 static int p54p_open(struct ieee80211_hw *dev)
 402 {
 403         struct p54p_priv *priv = dev->priv;
 404         int err;
 405
 406         init_completion(&priv->boot_comp);
 407         err = request_irq(priv->pdev->irq, &p54p_interrupt,
 408                           IRQF_SHARED, "p54pci", dev);
 409         if (err) {
 410                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 411                        wiphy_name(dev->wiphy));
 412                 return err;
 413         }
 414
 415         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 416         err = p54p_upload_firmware(dev);
 417         if (err) {
 418                 free_irq(priv->pdev->irq, dev);
 419                 return err;
 420         }
 421         priv->rx_idx_data = priv->tx_idx_data = 0;
 422         priv->rx_idx_mgmt = priv->tx_idx_mgmt = 0;
 423
 424         p54p_refill_rx_ring(dev, 0, priv->ring_control->rx_data,
 425                 ARRAY_SIZE(priv->ring_control->rx_data), priv->rx_buf_data);
 426
 427         p54p_refill_rx_ring(dev, 2, priv->ring_control->rx_mgmt,
 428                 ARRAY_SIZE(priv->ring_control->rx_mgmt), priv->rx_buf_mgmt);
 429
 430         P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
 431         P54P_READ(ring_control_base);
 432         wmb();
 433         udelay(10);
 434
 435         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
 436         P54P_READ(int_enable);
 437         wmb();
 438         udelay(10);
 439
 440         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 441         P54P_READ(dev_int);
 442
 443         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
 444                 printk(KERN_ERR "%s: Cannot boot firmware!\n",
 445                        wiphy_name(dev->wiphy));
 446                 p54p_stop(dev);
 447                 return -ETIMEDOUT;
 448         }
 449
 450         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
 451         P54P_READ(int_enable);
 452         wmb();
 453         udelay(10);
 454
 455         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 456         P54P_READ(dev_int);
 457         wmb();
 458         udelay(10);
 459
 460         return 0;
 461 }
 462
 463 static int __devinit p54p_probe(struct pci_dev *pdev,
 464                                 const struct pci_device_id *id)
 465 {
 466         struct p54p_priv *priv;
 467         struct ieee80211_hw *dev;
 468         unsigned long mem_addr, mem_len;
 469         int err;
 470
 471         err = pci_enable_device(pdev);
 472         if (err) {
 473                 printk(KERN_ERR "%s (p54pci): Cannot enable new PCI device\n",
 474                        pci_name(pdev));
 475                 return err;
 476         }
 477
 478         mem_addr = pci_resource_start(pdev, 0);
 479         mem_len = pci_resource_len(pdev, 0);
 480         if (mem_len < sizeof(struct p54p_csr)) {
 481                 printk(KERN_ERR "%s (p54pci): Too short PCI resources\n",
 482                        pci_name(pdev));
 483                 goto err_disable_dev;
 484         }
 485
 486         err = pci_request_regions(pdev, "p54pci");
 487         if (err) {
 488                 printk(KERN_ERR "%s (p54pci): Cannot obtain PCI resources\n",
 489                        pci_name(pdev));
 490                 goto err_disable_dev;
 491         }
 492
 493         if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) ||
 494             pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
 495                 printk(KERN_ERR "%s (p54pci): No suitable DMA available\n",
 496                        pci_name(pdev));
 497                 goto err_free_reg;
 498         }
 499
 500         pci_set_master(pdev);
 501         pci_try_set_mwi(pdev);
 502
 503         pci_write_config_byte(pdev, 0x40, 0);
 504         pci_write_config_byte(pdev, 0x41, 0);
 505
 506         dev = p54_init_common(sizeof(*priv));
 507         if (!dev) {
 508                 printk(KERN_ERR "%s (p54pci): ieee80211 alloc failed\n",
 509                        pci_name(pdev));
 510                 err = -ENOMEM;
 511                 goto err_free_reg;
 512         }
 513
 514         priv = dev->priv;
 515         priv->pdev = pdev;
 516
 517         SET_IEEE80211_DEV(dev, &pdev->dev);
 518         pci_set_drvdata(pdev, dev);
 519
 520         priv->map = ioremap(mem_addr, mem_len);
 521         if (!priv->map) {
 522                 printk(KERN_ERR "%s (p54pci): Cannot map device memory\n",
 523                        pci_name(pdev));
 524                 err = -EINVAL;  // TODO: use a better error code?
 525                 goto err_free_dev;
 526         }
 527
 528         priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
 529                                                   &priv->ring_control_dma);
 530         if (!priv->ring_control) {
 531                 printk(KERN_ERR "%s (p54pci): Cannot allocate rings\n",
 532                        pci_name(pdev));
 533                 err = -ENOMEM;
 534                 goto err_iounmap;
 535         }
 536         priv->common.open = p54p_open;
 537         priv->common.stop = p54p_stop;
 538         priv->common.tx = p54p_tx;
 539
 540         spin_lock_init(&priv->lock);
 541         tasklet_init(&priv->rx_tasklet, p54p_rx_tasklet, (unsigned long)dev);
 542
 543         err = request_firmware(&priv->firmware, "isl3886pci",
 544                                &priv->pdev->dev);
 545         if (err) {
 546                 printk(KERN_ERR "%s (p54pci): cannot find firmware "
 547                         "(isl3886pci)\n", pci_name(priv->pdev));
 548                 err = request_firmware(&priv->firmware, "isl3886",
 549                                        &priv->pdev->dev);
 550                 if (err)
 551                         goto err_free_common;
 552         }
 553
 554         err = p54p_open(dev);
 555         if (err)
 556                 goto err_free_common;
 557         err = p54_read_eeprom(dev);
 558         p54p_stop(dev);
 559         if (err)
 560                 goto err_free_common;
 561
 562         err = ieee80211_register_hw(dev);
 563         if (err) {
 564                 printk(KERN_ERR "%s (p54pci): Cannot register netdevice\n",
 565                        pci_name(pdev));
 566                 goto err_free_common;
 567         }
 568
 569         return 0;
 570
 571  err_free_common:
 572         release_firmware(priv->firmware);
 573         p54_free_common(dev);
 574         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 575                             priv->ring_control, priv->ring_control_dma);
 576
 577  err_iounmap:
 578         iounmap(priv->map);
 579
 580  err_free_dev:
 581         pci_set_drvdata(pdev, NULL);
 582         ieee80211_free_hw(dev);
 583
 584  err_free_reg:
 585         pci_release_regions(pdev);
 586  err_disable_dev:
 587         pci_disable_device(pdev);
 588         return err;
 589 }
 590
 591 static void __devexit p54p_remove(struct pci_dev *pdev)
 592 {
 593         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 594         struct p54p_priv *priv;
 595
 596         if (!dev)
 597                 return;
 598
 599         ieee80211_unregister_hw(dev);
 600         priv = dev->priv;
 601         release_firmware(priv->firmware);
 602         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 603                             priv->ring_control, priv->ring_control_dma);
 604         p54_free_common(dev);
 605         iounmap(priv->map);
 606         pci_release_regions(pdev);
 607         pci_disable_device(pdev);
 608         ieee80211_free_hw(dev);
 609 }
 610
 611 #ifdef CONFIG_PM
 612 static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
 613 {
 614         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 615         struct p54p_priv *priv = dev->priv;
 616
 617         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
 618                 ieee80211_stop_queues(dev);
 619                 p54p_stop(dev);
 620         }
 621
 622         pci_save_state(pdev);
 623         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 624         return 0;
 625 }
 626
 627 static int p54p_resume(struct pci_dev *pdev)
 628 {
 629         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 630         struct p54p_priv *priv = dev->priv;
 631
 632         pci_set_power_state(pdev, PCI_D0);
 633         pci_restore_state(pdev);
 634
 635         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
 636                 p54p_open(dev);
 637                 ieee80211_wake_queues(dev);
 638         }
 639
 640         return 0;
 641 }
 642 #endif /* CONFIG_PM */
 643
 644 static struct pci_driver p54p_driver = {
 645         .name           = "p54pci",
 646         .id_table       = p54p_table,
 647         .probe          = p54p_probe,
 648         .remove         = __devexit_p(p54p_remove),
 649 #ifdef CONFIG_PM
 650         .suspend        = p54p_suspend,
 651         .resume         = p54p_resume,
 652 #endif /* CONFIG_PM */
 653 };
 654
 655 static int __init p54p_init(void)
 656 {
 657         return pci_register_driver(&p54p_driver);
 658 }
 659
 660 static void __exit p54p_exit(void)
 661 {
 662         pci_unregister_driver(&p54p_driver);
 663 }
 664
 665 module_init(p54p_init);
 666 module_exit(p54p_exit);