2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/latency.h>
42 #include <linux/clockchips.h>
45 * Include the apic definitions for x86 to have the APIC timer related defines
46 * available also for UP (on SMP it gets magically included via linux/smp.h).
47 * asm/acpi.h is not an option, as it would require more include magic. Also
48 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
55 * Include the apic definitions for x86 to have the APIC timer related defines
56 * available also for UP (on SMP it gets magically included via linux/smp.h).
63 #include <asm/uaccess.h>
65 #include <acpi/acpi_bus.h>
66 #include <acpi/processor.h>
68 #define ACPI_PROCESSOR_COMPONENT 0x01000000
69 #define ACPI_PROCESSOR_CLASS "processor"
70 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
71 ACPI_MODULE_NAME("processor_idle");
72 #define ACPI_PROCESSOR_FILE_POWER "power"
73 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
74 #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
75 #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
76 static void (*pm_idle_save) (void) __read_mostly;
77 module_param(max_cstate, uint, 0644);
79 static unsigned int nocst __read_mostly;
80 module_param(nocst, uint, 0000);
83 * bm_history -- bit-mask with a bit per jiffy of bus-master activity
84 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
85 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
86 * 100 HZ: 0x0000000F: 4 jiffies = 40ms
87 * reduce history for more aggressive entry into C3
89 static unsigned int bm_history __read_mostly =
90 (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
91 module_param(bm_history, uint, 0644);
93 static unsigned use_ipi = 2;
94 module_param(use_ipi, uint, 0644);
95 MODULE_PARM_DESC(use_ipi, "IPI (vs. LAPIC) irqs for not waking up from C2/C3"
96 " machines. 0=apic, 1=ipi, 2=auto\n");
98 /* --------------------------------------------------------------------------
100 -------------------------------------------------------------------------- */
103 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
104 * For now disable this. Probably a bug somewhere else.
106 * To skip this limit, boot/load with a large max_cstate limit.
108 static int set_max_cstate(struct dmi_system_id *id)
110 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
113 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
114 " Override with \"processor.max_cstate=%d\"\n", id->ident,
115 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
117 max_cstate = (long)id->driver_data;
122 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
123 callers to only run once -AK */
124 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
125 { set_max_cstate, "IBM ThinkPad R40e", {
126 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
127 DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
128 { set_max_cstate, "IBM ThinkPad R40e", {
129 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
130 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
131 { set_max_cstate, "IBM ThinkPad R40e", {
132 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
133 DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
134 { set_max_cstate, "IBM ThinkPad R40e", {
135 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
136 DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
137 { set_max_cstate, "IBM ThinkPad R40e", {
138 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
139 DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
140 { set_max_cstate, "IBM ThinkPad R40e", {
141 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
142 DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
143 { set_max_cstate, "IBM ThinkPad R40e", {
144 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
145 DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
146 { set_max_cstate, "IBM ThinkPad R40e", {
147 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
148 DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
149 { set_max_cstate, "IBM ThinkPad R40e", {
150 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
151 DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
152 { set_max_cstate, "IBM ThinkPad R40e", {
153 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
154 DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
155 { set_max_cstate, "IBM ThinkPad R40e", {
156 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
157 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
158 { set_max_cstate, "IBM ThinkPad R40e", {
159 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
160 DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
161 { set_max_cstate, "IBM ThinkPad R40e", {
162 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
163 DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
164 { set_max_cstate, "IBM ThinkPad R40e", {
165 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
166 DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
167 { set_max_cstate, "IBM ThinkPad R40e", {
168 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
169 DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
170 { set_max_cstate, "IBM ThinkPad R40e", {
171 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
172 DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
173 { set_max_cstate, "Medion 41700", {
174 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
175 DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
176 { set_max_cstate, "Clevo 5600D", {
177 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
178 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
183 static inline u32 ticks_elapsed(u32 t1, u32 t2)
187 else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
188 return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
190 return ((0xFFFFFFFF - t1) + t2);
194 acpi_processor_power_activate(struct acpi_processor *pr,
195 struct acpi_processor_cx *new)
197 struct acpi_processor_cx *old;
202 old = pr->power.state;
205 old->promotion.count = 0;
206 new->demotion.count = 0;
208 /* Cleanup from old state. */
212 /* Disable bus master reload */
213 if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
214 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
219 /* Prepare to use new state. */
222 /* Enable bus master reload */
223 if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
224 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
228 pr->power.state = new;
233 static void acpi_safe_halt(void)
235 current_thread_info()->status &= ~TS_POLLING;
237 * TS_POLLING-cleared state must be visible before we
243 current_thread_info()->status |= TS_POLLING;
246 static atomic_t c3_cpu_count;
248 /* Common C-state entry for C2, C3, .. */
249 static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
251 if (cstate->space_id == ACPI_CSTATE_FFH) {
252 /* Call into architectural FFH based C-state */
253 acpi_processor_ffh_cstate_enter(cstate);
256 /* IO port based C-state */
257 inb(cstate->address);
258 /* Dummy wait op - must do something useless after P_LVL2 read
259 because chipsets cannot guarantee that STPCLK# signal
260 gets asserted in time to freeze execution properly. */
261 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
265 #ifdef ARCH_APICTIMER_STOPS_ON_C3
268 * Some BIOS implementations switch to C3 in the published C2 state.
269 * This seems to be a common problem on AMD boxen and Intel Dothan/Banias
270 * Pentium M machines.
272 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
273 struct acpi_processor_cx *cx)
275 struct acpi_processor_power *pwr = &pr->power;
278 * Check, if one of the previous states already marked the lapic
281 if (pwr->timer_broadcast_on_state < state)
284 if (cx->type >= ACPI_STATE_C2) {
285 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
286 pr->power.timer_broadcast_on_state = state;
287 else if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
288 boot_cpu_data.x86 == 6) &&
289 (boot_cpu_data.x86_model == 13 ||
290 boot_cpu_data.x86_model == 9))
292 pr->power.timer_broadcast_on_state = state;
297 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
299 #ifdef CONFIG_GENERIC_CLOCKEVENTS
300 unsigned long reason;
302 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
303 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
305 clockevents_notify(reason, &pr->id);
307 cpumask_t mask = cpumask_of_cpu(pr->id);
310 on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
311 else if (use_ipi == 1)
312 on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
314 if (pr->power.timer_broadcast_on_state < INT_MAX)
315 on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
317 on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
322 /* Power(C) State timer broadcast control */
323 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
324 struct acpi_processor_cx *cx,
327 #ifdef CONFIG_GENERIC_CLOCKEVENTS
329 int state = cx - pr->power.states;
331 if (state >= pr->power.timer_broadcast_on_state) {
332 unsigned long reason;
334 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
335 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
336 clockevents_notify(reason, &pr->id);
343 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
344 struct acpi_processor_cx *cstate) { }
345 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
346 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
347 struct acpi_processor_cx *cx,
354 static void acpi_processor_idle(void)
356 struct acpi_processor *pr = NULL;
357 struct acpi_processor_cx *cx = NULL;
358 struct acpi_processor_cx *next_state = NULL;
362 pr = processors[smp_processor_id()];
367 * Interrupts must be disabled during bus mastering calculations and
368 * for C2/C3 transitions.
373 * Check whether we truly need to go idle, or should
376 if (unlikely(need_resched())) {
381 cx = pr->power.state;
393 * Check for bus mastering activity (if required), record, and check
396 if (pr->flags.bm_check) {
398 unsigned long diff = jiffies - pr->power.bm_check_timestamp;
403 pr->power.bm_activity <<= diff;
405 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
407 pr->power.bm_activity |= 0x1;
408 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
411 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
412 * the true state of bus mastering activity; forcing us to
413 * manually check the BMIDEA bit of each IDE channel.
415 else if (errata.piix4.bmisx) {
416 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
417 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
418 pr->power.bm_activity |= 0x1;
421 pr->power.bm_check_timestamp = jiffies;
424 * If bus mastering is or was active this jiffy, demote
425 * to avoid a faulty transition. Note that the processor
426 * won't enter a low-power state during this call (to this
427 * function) but should upon the next.
429 * TBD: A better policy might be to fallback to the demotion
430 * state (use it for this quantum only) istead of
431 * demoting -- and rely on duration as our sole demotion
432 * qualification. This may, however, introduce DMA
433 * issues (e.g. floppy DMA transfer overrun/underrun).
435 if ((pr->power.bm_activity & 0x1) &&
436 cx->demotion.threshold.bm) {
438 next_state = cx->demotion.state;
443 #ifdef CONFIG_HOTPLUG_CPU
445 * Check for P_LVL2_UP flag before entering C2 and above on
446 * an SMP system. We do it here instead of doing it at _CST/P_LVL
447 * detection phase, to work cleanly with logical CPU hotplug.
449 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
450 !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
451 cx = &pr->power.states[ACPI_STATE_C1];
457 * Invoke the current Cx state to put the processor to sleep.
459 if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
460 current_thread_info()->status &= ~TS_POLLING;
462 * TS_POLLING-cleared state must be visible before we
466 if (need_resched()) {
467 current_thread_info()->status |= TS_POLLING;
478 * Use the appropriate idle routine, the one that would
479 * be used without acpi C-states.
487 * TBD: Can't get time duration while in C1, as resumes
488 * go to an ISR rather than here. Need to instrument
489 * base interrupt handler.
491 sleep_ticks = 0xFFFFFFFF;
495 /* Get start time (ticks) */
496 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
498 acpi_state_timer_broadcast(pr, cx, 1);
499 acpi_cstate_enter(cx);
500 /* Get end time (ticks) */
501 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
503 #ifdef CONFIG_GENERIC_TIME
504 /* TSC halts in C2, so notify users */
507 /* Re-enable interrupts */
509 current_thread_info()->status |= TS_POLLING;
510 /* Compute time (ticks) that we were actually asleep */
512 ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD;
513 acpi_state_timer_broadcast(pr, cx, 0);
518 if (pr->flags.bm_check) {
519 if (atomic_inc_return(&c3_cpu_count) ==
522 * All CPUs are trying to go to C3
523 * Disable bus master arbitration
525 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
528 /* SMP with no shared cache... Invalidate cache */
529 ACPI_FLUSH_CPU_CACHE();
532 /* Get start time (ticks) */
533 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
535 acpi_state_timer_broadcast(pr, cx, 1);
536 acpi_cstate_enter(cx);
537 /* Get end time (ticks) */
538 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
539 if (pr->flags.bm_check) {
540 /* Enable bus master arbitration */
541 atomic_dec(&c3_cpu_count);
542 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
545 #ifdef CONFIG_GENERIC_TIME
546 /* TSC halts in C3, so notify users */
549 /* Re-enable interrupts */
551 current_thread_info()->status |= TS_POLLING;
552 /* Compute time (ticks) that we were actually asleep */
554 ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD;
555 acpi_state_timer_broadcast(pr, cx, 0);
563 if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
564 cx->time += sleep_ticks;
566 next_state = pr->power.state;
568 #ifdef CONFIG_HOTPLUG_CPU
569 /* Don't do promotion/demotion */
570 if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
571 !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) {
580 * Track the number of longs (time asleep is greater than threshold)
581 * and promote when the count threshold is reached. Note that bus
582 * mastering activity may prevent promotions.
583 * Do not promote above max_cstate.
585 if (cx->promotion.state &&
586 ((cx->promotion.state - pr->power.states) <= max_cstate)) {
587 if (sleep_ticks > cx->promotion.threshold.ticks &&
588 cx->promotion.state->latency <= system_latency_constraint()) {
589 cx->promotion.count++;
590 cx->demotion.count = 0;
591 if (cx->promotion.count >=
592 cx->promotion.threshold.count) {
593 if (pr->flags.bm_check) {
595 (pr->power.bm_activity & cx->
596 promotion.threshold.bm)) {
602 next_state = cx->promotion.state;
612 * Track the number of shorts (time asleep is less than time threshold)
613 * and demote when the usage threshold is reached.
615 if (cx->demotion.state) {
616 if (sleep_ticks < cx->demotion.threshold.ticks) {
617 cx->demotion.count++;
618 cx->promotion.count = 0;
619 if (cx->demotion.count >= cx->demotion.threshold.count) {
620 next_state = cx->demotion.state;
628 * Demote if current state exceeds max_cstate
629 * or if the latency of the current state is unacceptable
631 if ((pr->power.state - pr->power.states) > max_cstate ||
632 pr->power.state->latency > system_latency_constraint()) {
633 if (cx->demotion.state)
634 next_state = cx->demotion.state;
640 * If we're going to start using a new Cx state we must clean up
641 * from the previous and prepare to use the new.
643 if (next_state != pr->power.state)
644 acpi_processor_power_activate(pr, next_state);
647 static int acpi_processor_set_power_policy(struct acpi_processor *pr)
650 unsigned int state_is_set = 0;
651 struct acpi_processor_cx *lower = NULL;
652 struct acpi_processor_cx *higher = NULL;
653 struct acpi_processor_cx *cx;
660 * This function sets the default Cx state policy (OS idle handler).
661 * Our scheme is to promote quickly to C2 but more conservatively
662 * to C3. We're favoring C2 for its characteristics of low latency
663 * (quick response), good power savings, and ability to allow bus
664 * mastering activity. Note that the Cx state policy is completely
665 * customizable and can be altered dynamically.
669 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
670 cx = &pr->power.states[i];
675 pr->power.state = cx;
684 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
685 cx = &pr->power.states[i];
690 cx->demotion.state = lower;
691 cx->demotion.threshold.ticks = cx->latency_ticks;
692 cx->demotion.threshold.count = 1;
693 if (cx->type == ACPI_STATE_C3)
694 cx->demotion.threshold.bm = bm_history;
701 for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
702 cx = &pr->power.states[i];
707 cx->promotion.state = higher;
708 cx->promotion.threshold.ticks = cx->latency_ticks;
709 if (cx->type >= ACPI_STATE_C2)
710 cx->promotion.threshold.count = 4;
712 cx->promotion.threshold.count = 10;
713 if (higher->type == ACPI_STATE_C3)
714 cx->promotion.threshold.bm = bm_history;
723 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
732 /* if info is obtained from pblk/fadt, type equals state */
733 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
734 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
736 #ifndef CONFIG_HOTPLUG_CPU
738 * Check for P_LVL2_UP flag before entering C2 and above on
741 if ((num_online_cpus() > 1) &&
742 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
746 /* determine C2 and C3 address from pblk */
747 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
748 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
750 /* determine latencies from FADT */
751 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
752 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
754 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
755 "lvl2[0x%08x] lvl3[0x%08x]\n",
756 pr->power.states[ACPI_STATE_C2].address,
757 pr->power.states[ACPI_STATE_C3].address));
762 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
764 if (!pr->power.states[ACPI_STATE_C1].valid) {
765 /* set the first C-State to C1 */
766 /* all processors need to support C1 */
767 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
768 pr->power.states[ACPI_STATE_C1].valid = 1;
770 /* the C0 state only exists as a filler in our array */
771 pr->power.states[ACPI_STATE_C0].valid = 1;
775 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
777 acpi_status status = 0;
781 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
782 union acpi_object *cst;
790 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
791 if (ACPI_FAILURE(status)) {
792 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
796 cst = buffer.pointer;
798 /* There must be at least 2 elements */
799 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
800 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
805 count = cst->package.elements[0].integer.value;
807 /* Validate number of power states. */
808 if (count < 1 || count != cst->package.count - 1) {
809 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
814 /* Tell driver that at least _CST is supported. */
815 pr->flags.has_cst = 1;
817 for (i = 1; i <= count; i++) {
818 union acpi_object *element;
819 union acpi_object *obj;
820 struct acpi_power_register *reg;
821 struct acpi_processor_cx cx;
823 memset(&cx, 0, sizeof(cx));
825 element = &(cst->package.elements[i]);
826 if (element->type != ACPI_TYPE_PACKAGE)
829 if (element->package.count != 4)
832 obj = &(element->package.elements[0]);
834 if (obj->type != ACPI_TYPE_BUFFER)
837 reg = (struct acpi_power_register *)obj->buffer.pointer;
839 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
840 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
843 /* There should be an easy way to extract an integer... */
844 obj = &(element->package.elements[1]);
845 if (obj->type != ACPI_TYPE_INTEGER)
848 cx.type = obj->integer.value;
850 * Some buggy BIOSes won't list C1 in _CST -
851 * Let acpi_processor_get_power_info_default() handle them later
853 if (i == 1 && cx.type != ACPI_STATE_C1)
856 cx.address = reg->address;
857 cx.index = current_count + 1;
859 cx.space_id = ACPI_CSTATE_SYSTEMIO;
860 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
861 if (acpi_processor_ffh_cstate_probe
862 (pr->id, &cx, reg) == 0) {
863 cx.space_id = ACPI_CSTATE_FFH;
864 } else if (cx.type != ACPI_STATE_C1) {
866 * C1 is a special case where FIXED_HARDWARE
867 * can be handled in non-MWAIT way as well.
868 * In that case, save this _CST entry info.
869 * That is, we retain space_id of SYSTEM_IO for
871 * Otherwise, ignore this info and continue.
877 obj = &(element->package.elements[2]);
878 if (obj->type != ACPI_TYPE_INTEGER)
881 cx.latency = obj->integer.value;
883 obj = &(element->package.elements[3]);
884 if (obj->type != ACPI_TYPE_INTEGER)
887 cx.power = obj->integer.value;
890 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
893 * We support total ACPI_PROCESSOR_MAX_POWER - 1
894 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
896 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
898 "Limiting number of power states to max (%d)\n",
899 ACPI_PROCESSOR_MAX_POWER);
901 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
906 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
909 /* Validate number of power states discovered */
910 if (current_count < 2)
914 kfree(buffer.pointer);
919 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
926 * C2 latency must be less than or equal to 100
929 else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
930 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
931 "latency too large [%d]\n", cx->latency));
936 * Otherwise we've met all of our C2 requirements.
937 * Normalize the C2 latency to expidite policy
940 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
945 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
946 struct acpi_processor_cx *cx)
948 static int bm_check_flag;
955 * C3 latency must be less than or equal to 1000
958 else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
959 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
960 "latency too large [%d]\n", cx->latency));
965 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
966 * DMA transfers are used by any ISA device to avoid livelock.
967 * Note that we could disable Type-F DMA (as recommended by
968 * the erratum), but this is known to disrupt certain ISA
969 * devices thus we take the conservative approach.
971 else if (errata.piix4.fdma) {
972 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
973 "C3 not supported on PIIX4 with Type-F DMA\n"));
977 /* All the logic here assumes flags.bm_check is same across all CPUs */
978 if (!bm_check_flag) {
979 /* Determine whether bm_check is needed based on CPU */
980 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
981 bm_check_flag = pr->flags.bm_check;
983 pr->flags.bm_check = bm_check_flag;
986 if (pr->flags.bm_check) {
987 /* bus mastering control is necessary */
988 if (!pr->flags.bm_control) {
989 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
990 "C3 support requires bus mastering control\n"));
995 * WBINVD should be set in fadt, for C3 state to be
996 * supported on when bm_check is not required.
998 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
999 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1000 "Cache invalidation should work properly"
1001 " for C3 to be enabled on SMP systems\n"));
1004 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
1008 * Otherwise we've met all of our C3 requirements.
1009 * Normalize the C3 latency to expidite policy. Enable
1010 * checking of bus mastering status (bm_check) so we can
1011 * use this in our C3 policy
1014 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
1019 static int acpi_processor_power_verify(struct acpi_processor *pr)
1022 unsigned int working = 0;
1024 pr->power.timer_broadcast_on_state = INT_MAX;
1026 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1027 struct acpi_processor_cx *cx = &pr->power.states[i];
1035 acpi_processor_power_verify_c2(cx);
1036 if (cx->valid && use_ipi != 0 && use_ipi != 1)
1037 acpi_timer_check_state(i, pr, cx);
1041 acpi_processor_power_verify_c3(pr, cx);
1042 if (cx->valid && use_ipi != 0 && use_ipi != 1)
1043 acpi_timer_check_state(i, pr, cx);
1051 acpi_propagate_timer_broadcast(pr);
1056 static int acpi_processor_get_power_info(struct acpi_processor *pr)
1062 /* NOTE: the idle thread may not be running while calling
1065 /* Zero initialize all the C-states info. */
1066 memset(pr->power.states, 0, sizeof(pr->power.states));
1068 result = acpi_processor_get_power_info_cst(pr);
1069 if (result == -ENODEV)
1070 result = acpi_processor_get_power_info_fadt(pr);
1075 acpi_processor_get_power_info_default(pr);
1077 pr->power.count = acpi_processor_power_verify(pr);
1080 * Set Default Policy
1081 * ------------------
1082 * Now that we know which states are supported, set the default
1083 * policy. Note that this policy can be changed dynamically
1084 * (e.g. encourage deeper sleeps to conserve battery life when
1087 result = acpi_processor_set_power_policy(pr);
1092 * if one state of type C2 or C3 is available, mark this
1093 * CPU as being "idle manageable"
1095 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1096 if (pr->power.states[i].valid) {
1097 pr->power.count = i;
1098 if (pr->power.states[i].type >= ACPI_STATE_C2)
1099 pr->flags.power = 1;
1106 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1118 if (!pr->flags.power_setup_done)
1121 /* Fall back to the default idle loop */
1122 pm_idle = pm_idle_save;
1123 synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
1125 pr->flags.power = 0;
1126 result = acpi_processor_get_power_info(pr);
1127 if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
1128 pm_idle = acpi_processor_idle;
1133 /* proc interface */
1135 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
1137 struct acpi_processor *pr = seq->private;
1144 seq_printf(seq, "active state: C%zd\n"
1146 "bus master activity: %08x\n"
1147 "maximum allowed latency: %d usec\n",
1148 pr->power.state ? pr->power.state - pr->power.states : 0,
1149 max_cstate, (unsigned)pr->power.bm_activity,
1150 system_latency_constraint());
1152 seq_puts(seq, "states:\n");
1154 for (i = 1; i <= pr->power.count; i++) {
1155 seq_printf(seq, " %cC%d: ",
1156 (&pr->power.states[i] ==
1157 pr->power.state ? '*' : ' '), i);
1159 if (!pr->power.states[i].valid) {
1160 seq_puts(seq, "<not supported>\n");
1164 switch (pr->power.states[i].type) {
1166 seq_printf(seq, "type[C1] ");
1169 seq_printf(seq, "type[C2] ");
1172 seq_printf(seq, "type[C3] ");
1175 seq_printf(seq, "type[--] ");
1179 if (pr->power.states[i].promotion.state)
1180 seq_printf(seq, "promotion[C%zd] ",
1181 (pr->power.states[i].promotion.state -
1184 seq_puts(seq, "promotion[--] ");
1186 if (pr->power.states[i].demotion.state)
1187 seq_printf(seq, "demotion[C%zd] ",
1188 (pr->power.states[i].demotion.state -
1191 seq_puts(seq, "demotion[--] ");
1193 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
1194 pr->power.states[i].latency,
1195 pr->power.states[i].usage,
1196 (unsigned long long)pr->power.states[i].time);
1203 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
1205 return single_open(file, acpi_processor_power_seq_show,
1209 static const struct file_operations acpi_processor_power_fops = {
1210 .open = acpi_processor_power_open_fs,
1212 .llseek = seq_lseek,
1213 .release = single_release,
1217 static void smp_callback(void *v)
1219 /* we already woke the CPU up, nothing more to do */
1223 * This function gets called when a part of the kernel has a new latency
1224 * requirement. This means we need to get all processors out of their C-state,
1225 * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
1226 * wakes them all right up.
1228 static int acpi_processor_latency_notify(struct notifier_block *b,
1229 unsigned long l, void *v)
1231 smp_call_function(smp_callback, NULL, 0, 1);
1235 static struct notifier_block acpi_processor_latency_notifier = {
1236 .notifier_call = acpi_processor_latency_notify,
1240 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1241 struct acpi_device *device)
1243 acpi_status status = 0;
1244 static int first_run;
1245 struct proc_dir_entry *entry = NULL;
1250 dmi_check_system(processor_power_dmi_table);
1251 if (max_cstate < ACPI_C_STATES_MAX)
1253 "ACPI: processor limited to max C-state %d\n",
1257 register_latency_notifier(&acpi_processor_latency_notifier);
1264 if (acpi_gbl_FADT.cst_control && !nocst) {
1266 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1267 if (ACPI_FAILURE(status)) {
1268 ACPI_EXCEPTION((AE_INFO, status,
1269 "Notifying BIOS of _CST ability failed"));
1273 acpi_processor_get_power_info(pr);
1276 * Install the idle handler if processor power management is supported.
1277 * Note that we use previously set idle handler will be used on
1278 * platforms that only support C1.
1280 if ((pr->flags.power) && (!boot_option_idle_override)) {
1281 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
1282 for (i = 1; i <= pr->power.count; i++)
1283 if (pr->power.states[i].valid)
1284 printk(" C%d[C%d]", i,
1285 pr->power.states[i].type);
1289 pm_idle_save = pm_idle;
1290 pm_idle = acpi_processor_idle;
1295 entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1296 S_IRUGO, acpi_device_dir(device));
1300 entry->proc_fops = &acpi_processor_power_fops;
1301 entry->data = acpi_driver_data(device);
1302 entry->owner = THIS_MODULE;
1305 pr->flags.power_setup_done = 1;
1310 int acpi_processor_power_exit(struct acpi_processor *pr,
1311 struct acpi_device *device)
1314 pr->flags.power_setup_done = 0;
1316 if (acpi_device_dir(device))
1317 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1318 acpi_device_dir(device));
1320 /* Unregister the idle handler when processor #0 is removed. */
1322 pm_idle = pm_idle_save;
1325 * We are about to unload the current idle thread pm callback
1326 * (pm_idle), Wait for all processors to update cached/local
1327 * copies of pm_idle before proceeding.
1331 unregister_latency_notifier(&acpi_processor_latency_notifier);